1 This file is a list of the people responsible for ensuring that patches for a
2 particular part of LLVM are reviewed, either by themself or by someone else.
3 They are also the gatekeepers for their part of LLVM, with the final word on
6 The list is sorted by surname and formatted to allow easy grepping and
7 beautification by scripts. The fields are: name (N), email (E), web-address
8 (W), PGP key ID and fingerprint (P), description (D), and snail-mail address
13 D: LLVM Bitcode (lib/Bitcode/* include/llvm/Bitcode/*)
17 D: SelectionDAG (lib/CodeGen/SelectionDAG/*)
19 N: Rafael Avila de Espindola
20 E: rafael.espindola@gmail.com
21 D: Gold plugin (tools/gold/*)
24 E: chandlerc@gmail.com
25 E: chandlerc@google.com
26 D: Config, ADT, Support, inlining & related passse, SROA/mem2reg & related passes, CMake, library layering
29 E: evan.cheng@apple.com
30 D: ARM target, parts of code generator not covered by someone else
34 D: Debug Information, autotools/configure/make build, inline assembly
39 N: Peter Collingbourne
43 E: adasgupt@codeaurora.org
48 D: BBVectorize and the PowerPC target
50 N: Venkatraman Govindaraju
51 E: venkatra@cs.wisc.edu
52 D: Sparc Backend (lib/Target/Sparc/*)
55 D: All parts of Clang not covered by someone else
68 E: jholewinski@nvidia.com
69 D: NVPTX Target (lib/Target/NVPTX/*)
72 E: andrew.kaylor@intel.com
73 D: MCJIT, RuntimeDyld and JIT event listeners
76 E: gkistanova@gmail.com
80 E: anton@korobeynikov.info
81 D: Exception handling, Windows codegen, ARM EABI
84 E: benny.kra@gmail.com
88 D: Clang Static Analyzer
91 E: slarin@codeaurora.org
92 D: VLIW Instruction Scheduling, Packetization
96 W: http://nondot.org/~sabre/
97 D: Everything not covered by someone else
100 E: rjmccall@apple.com
101 D: Clang LLVM IR generation
104 D: Register allocators and TableGen
111 E: mcrosier@apple.com
112 D: MS-inline asm, Fast-Isel, and the compiler driver
116 D: X86 Backend, Loop Vectorizer
123 E: richard@metafoo.co.uk
124 D: Clang Semantic Analysis (tools/clang/lib/Sema/* tools/clang/include/clang/Sema/*)
128 D: Instruction Scheduling