1 This file is a partial list of people who have contributed to the LLVM
2 project. If you have contributed a patch or made some other contribution to
3 LLVM, please submit a patch to this file to add yourself, and it will be
6 The list is sorted by surname and formatted to allow easy grepping and
7 beautification by scripts. The fields are: name (N), email (E), web-address
8 (W), PGP key ID and fingerprint (P), description (D), and snail-mail address
13 W: http://www.cs.uiuc.edu/~vadve/
14 D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM
18 D: LCSSA pass and related LoopUnswitch work
19 D: GVNPRE pass, TargetData refactoring, random improvements
22 D: MingW Win32 API portability layer
25 E: natebegeman@mac.com
26 D: PowerPC backend developer
27 D: Target-independent code generator and analysis improvements
30 E: dberlin@dberlin.org
31 D: ET-Forest implementation.
35 E: neil@daikokuya.co.uk
36 D: APFloat implementation.
39 E: brukman+llvm@uiuc.edu
40 W: http://misha.brukman.net
41 D: Portions of X86 and Sparc JIT compilers, PowerPC backend
42 D: Incremental bytecode loader
46 D: The `mem2reg' pass - promotes values stored in memory to registers
49 E: chandlerc@gmail.com
50 D: LinkTimeOptimizer for Linux, via binutils integration, and C API
54 D: Fixes to the Reassociation pass, various improvement patches
57 E: evan.cheng@apple.com
58 D: ARM and X86 backends
59 D: Instruction scheduler improvements
60 D: Register allocator improvements
61 D: Loop optimizer improvements
62 D: Target-independent code generator improvements
64 N: Dan Villiom Podlaski Christiansen
68 D: LLVM Makefile improvements
69 D: Clang diagnostic & driver tweaks
73 E: jeffc@jolt-lang.org
74 W: http://jolt-lang.org
75 D: Native Win32 API portability layer
79 D: Original Autoconf support, documentation improvements, bug fixes
82 E: stefanus.dutoit@rapidmind.com
83 D: Bug fixes and minor improvements
85 N: Rafael Avila de Espindola
86 E: rafael.espindola@gmail.com
90 E: alkis@evlogimenos.com
91 D: Linear scan register allocator, many codegen improvements, Java frontend
95 W: http://www.students.uiuc.edu/~gaeke/
96 D: Portions of X86 static and JIT compilers; initial SparcV8 backend
97 D: Dynamic trace optimizer
98 D: FreeBSD/X86 compatibility fixes, the llvm-nm tool
101 E: nicolas.geoffray@lip6.fr
102 W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/
103 D: PPC backend fixes for Linux
106 D: Portions of the PowerPC backend
109 E: saemghani@gmail.com
110 D: Callgraph class cleanups
112 N: Mikhail Glushenkov
113 E: foldr@codedgers.com
118 D: Miscellaneous bug fixes
121 E: david@goodwinz.net
122 D: Thumb-2 code generator
125 E: greened@obbligato.org
126 D: Miscellaneous bug fixes
127 D: Register allocation refactoring
131 D: Improvements for space efficiency
135 D: PBQP-based register allocator
138 E: gordonhenriksen@mac.com
139 D: Pluggable GC support
143 N: Raul Fernandes Herbster
144 E: raul@dsc.ufcg.edu.br
145 D: JIT support for ARM
148 E: arathorn@fastwebnet.it
149 D: Visual C++ compatibility fixes
152 E: patjenk@wam.umd.edu
157 D: ARM constant islands improvements
158 D: Tail merging improvements
159 D: Rewrite X87 back end
160 D: Use APFloat for floating point constants widely throughout compiler
161 D: Implement X87 long double
164 E: kungfoomaster@nondot.org
165 D: Support for packed types
168 W: http://randomhacks.net/
169 D: llvm-config script
171 N: Anton Korobeynikov
173 D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv.
174 D: x86/linux PIC codegen, aliases, regparm/visibility attributes
175 D: Switch lowering refactoring
179 D: Author of the original C backend
182 E: christopher.lamb@gmail.com
183 D: aligned load/store support, parts of noalias and restrict support
184 D: vreg subreg infrastructure, X86 codegen improvements based on subregs
189 D: Improvements to the PPC backend, instruction scheduling
190 D: Debug and Dwarf implementation
191 D: Auto upgrade mangler
192 D: llvm-gcc4 svn wrangler
196 W: http://nondot.org/~sabre/
197 D: Primary architect of LLVM
199 N: Tanya Lattner (Tanya Brethour)
201 W: http://nondot.org/~tonic/
202 D: The initial llvm-ar tool, converted regression testsuite to dejagnu
203 D: Modulo scheduling in the SparcV9 backend
204 D: Release manager (1.7+)
207 E: alenhar2@cs.uiuc.edu
208 W: http://www.lenharth.org/~andrewl/
210 D: Sampling based profiling
214 D: PredicateSimplifier pass
216 N: Bruno Cardoso Lopes
217 E: bruno.cardoso@gmail.com
218 W: http://www.brunocardoso.org
222 E: duraid@octopus.com.au
223 W: http://kinoko.c.u-tokyo.ac.jp/~duraid/
224 D: IA64 backend, BigBlock register allocator
227 E: michael.mccracken@gmail.com
228 D: Line number support for llvmgcc
230 N: Vladimir Merzliakov
232 D: Test suite fixes for FreeBSD
236 D: Added STI Cell SPU backend.
238 N: Edward O'Callaghan
239 E: eocallaghan@auroraux.org
240 W: http://www.auroraux.org
241 D: Add Clang support with various other improvements to utils/NewNightlyTest.pl
242 D: Fix and maintain Solaris & AuroraUX support for llvm, various build warnings
243 D: and error clean ups.
247 D: Visual C++ compatibility fixes
255 D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
256 D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
257 D: Optimizer improvements, Loop Index Split
260 W: http://vladimir_prus.blogspot.com
262 D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass
265 E: roman@codedgers.com
270 D: Ada front-end, exception handling improvements
274 D: Graph coloring register allocator for the Sparc64 backend
276 N: Arnold Schwaighofer
277 E: arnold.schwaighofer@gmail.com
278 D: Tail call optimization for the x86 backend
282 D: Miscellaneous bug fixes
285 E: ashukla@cs.uiuc.edu
289 E: rspencer@reidspencer.com
290 W: http://reidspencer.com/
291 D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid
294 E: edwintorok@gmail.com
295 D: Miscellaneous bug fixes
299 D: C++ bugs filed, and C++ front-end bug fixes.
301 N: Lauro Ramos Venancio
302 E: lauro.venancio@indt.org.br
303 D: ARM backend improvements
304 D: Thread Local Storage implementation
307 E: isanbard@gmail.com
311 E: bob.wilson@acm.org
312 D: Advanced SIMD (NEON) support in the ARM backend