1 This file is a partial list of people who have contributed to the LLVM
2 project. If you have contributed a patch or made some other contribution to
3 LLVM, please submit a patch to this file to add yourself, and it will be
6 The list is sorted by surname and formatted to allow easy grepping and
7 beautification by scripts. The fields are: name (N), email (E), web-address
8 (W), PGP key ID and fingerprint (P), description (D), and snail-mail address
14 W: http://www.cs.uiuc.edu/~vadve/
15 D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM
19 D: LCSSA pass and related LoopUnswitch work
20 D: GVNPRE pass, TargetData refactoring, random improvements
23 D: MingW Win32 API portability layer
26 E: natebegeman@mac.com
27 D: PowerPC backend developer
28 D: Target-independent code generator and analysis improvements
31 E: dberlin@dberlin.org
32 D: ET-Forest implementation.
37 D: General bug fixing/fit & finish, mostly in Clang
40 E: neil@daikokuya.co.uk
41 D: APFloat implementation.
44 E: brukman+llvm@uiuc.edu
45 W: http://misha.brukman.net
46 D: Portions of X86 and Sparc JIT compilers, PowerPC backend
47 D: Incremental bitcode loader
51 D: The `mem2reg' pass - promotes values stored in memory to registers
54 E: bcahoon@codeaurora.org
55 D: Loop unrolling with run-time trip counts.
58 E: chandlerc@gmail.com
59 D: Hashing algorithms and interfaces
60 D: Inline cost analysis
61 D: Machine block placement pass
65 D: Fixes to the Reassociation pass, various improvement patches
68 E: evan.cheng@apple.com
69 D: ARM and X86 backends
70 D: Instruction scheduler improvements
71 D: Register allocator improvements
72 D: Loop optimizer improvements
73 D: Target-independent code generator improvements
75 N: Dan Villiom Podlaski Christiansen
79 D: LLVM Makefile improvements
80 D: Clang diagnostic & driver tweaks
84 E: jeffc@jolt-lang.org
85 W: http://jolt-lang.org
86 D: Native Win32 API portability layer
90 D: Original Autoconf support, documentation improvements, bug fixes
93 E: adasgupt@codeaurora.org
94 D: Deterministic finite automaton based infrastructure for VLIW packetization
97 E: stefanus.dutoit@rapidmind.com
98 D: Bug fixes and minor improvements
100 N: Rafael Avila de Espindola
101 E: rafael.espindola@gmail.com
105 E: alkis@evlogimenos.com
106 D: Linear scan register allocator, many codegen improvements, Java frontend
110 D: Basic-block autovectorization, PowerPC backend improvements
113 E: pizza@parseerror.com
114 D: Miscellaneous bug fixes
118 W: http://www.students.uiuc.edu/~gaeke/
119 D: Portions of X86 static and JIT compilers; initial SparcV8 backend
120 D: Dynamic trace optimizer
121 D: FreeBSD/X86 compatibility fixes, the llvm-nm tool
124 E: nicolas.geoffray@lip6.fr
125 W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/
126 D: PPC backend fixes for Linux
129 D: Portions of the PowerPC backend
132 E: saemghani@gmail.com
133 D: Callgraph class cleanups
135 N: Mikhail Glushenkov
136 E: foldr@codedgers.com
141 D: Miscellaneous bug fixes
144 E: david@goodwinz.net
145 D: Thumb-2 code generator
148 E: greened@obbligato.org
149 D: Miscellaneous bug fixes
150 D: Register allocation refactoring
154 D: Improvements for space efficiency
157 E: grosbach@apple.com
158 D: SjLj exception handling support
159 D: General fixes and improvements for the ARM back-end
161 D: ARM integrated assembler and assembly parser
165 D: PBQP-based register allocator
168 E: gordonhenriksen@mac.com
169 D: Pluggable GC support
173 N: Raul Fernandes Herbster
174 E: raul@dsc.ufcg.edu.br
175 D: JIT support for ARM
178 E: arathorn@fastwebnet.it
179 D: Visual C++ compatibility fixes
182 E: patjenk@wam.umd.edu
187 D: ARM constant islands improvements
188 D: Tail merging improvements
189 D: Rewrite X87 back end
190 D: Use APFloat for floating point constants widely throughout compiler
191 D: Implement X87 long double
194 E: kungfoomaster@nondot.org
195 D: Support for packed types
199 D: Author of LLVM Ada bindings
202 W: http://randomhacks.net/
203 D: llvm-config script
205 N: Anton Korobeynikov
207 D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv.
208 D: x86/linux PIC codegen, aliases, regparm/visibility attributes
209 D: Switch lowering refactoring
213 D: Author of the original C backend
216 E: benny.kra@gmail.com
217 D: Miscellaneous bug fixes
220 E: sundeepk@codeaurora.org
221 D: Implemented DFA-based target independent VLIW packetizer
224 E: christopher.lamb@gmail.com
225 D: aligned load/store support, parts of noalias and restrict support
226 D: vreg subreg infrastructure, X86 codegen improvements based on subregs
231 D: Improvements to the PPC backend, instruction scheduling
232 D: Debug and Dwarf implementation
233 D: Auto upgrade mangler
234 D: llvm-gcc4 svn wrangler
238 W: http://nondot.org/~sabre/
239 D: Primary architect of LLVM
241 N: Tanya Lattner (Tanya Brethour)
243 W: http://nondot.org/~tonic/
244 D: The initial llvm-ar tool, converted regression testsuite to dejagnu
245 D: Modulo scheduling in the SparcV9 backend
246 D: Release manager (1.7+)
249 E: alenhar2@cs.uiuc.edu
250 W: http://www.lenharth.org/~andrewl/
252 D: Sampling based profiling
256 D: PredicateSimplifier pass
258 N: Tony Linthicum, et. al.
259 E: tlinth@codeaurora.org
260 D: Backend for Qualcomm's Hexagon VLIW processor.
262 N: Bruno Cardoso Lopes
263 E: bruno.cardoso@gmail.com
264 W: http://www.brunocardoso.org
268 E: duraid@octopus.com.au
269 W: http://kinoko.c.u-tokyo.ac.jp/~duraid/
270 D: IA64 backend, BigBlock register allocator
273 E: rjmccall@apple.com
274 D: Clang semantic analysis and IR generation
277 E: michael.mccracken@gmail.com
278 D: Line number support for llvmgcc
280 N: Vladimir Merzliakov
282 D: Test suite fixes for FreeBSD
286 D: Added STI Cell SPU backend.
290 D: Support for implicit TLS model used with MS VC runtime
293 E: geek4civic@gmail.com
294 E: chapuni@hf.rim.or.jp
295 D: Cygwin and MinGW support.
299 N: Edward O'Callaghan
300 E: eocallaghan@auroraux.org
301 W: http://www.auroraux.org
302 D: Add Clang support with various other improvements to utils/NewNightlyTest.pl
303 D: Fix and maintain Solaris & AuroraUX support for llvm, various build warnings
304 D: and error clean ups.
308 D: Visual C++ compatibility fixes
310 N: Jakob Stoklund Olesen
312 D: Machine code verifier
314 D: Fast register allocator
315 D: Greedy register allocator
323 D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
324 D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
325 D: Optimizer improvements, Loop Index Split
328 E: deeppatel1987@gmail.com
329 D: ARM calling conventions rewrite, hard float support
332 E: peckw@wesleypeck.com
333 W: http://wesleypeck.com/
334 D: MicroBlaze backend
337 E: pichet2000@gmail.com
341 W: http://vladimir_prus.blogspot.com
343 D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass
346 E: kalle.rasikila@nokia.com
347 D: Some bugfixes to CellSPU
351 D: Cmake dependency chain and various bug fixes
354 E: mcrosier@apple.com
355 D: ARM fast-isel improvements
356 D: Performance monitoring
359 E: nadav.rotem@intel.com
360 D: Vector code generation improvements.
363 E: roman@codedgers.com
368 D: Ada support in llvm-gcc
370 D: Exception handling improvements
371 D: Type legalizer rewrite
375 D: Graph coloring register allocator for the Sparc64 backend
377 N: Arnold Schwaighofer
378 E: arnold.schwaighofer@gmail.com
379 D: Tail call optimization for the x86 backend
383 D: Miscellaneous bug fixes
386 E: ashukla@cs.uiuc.edu
389 N: Michael J. Spencer
390 E: bigcheesegs@gmail.com
391 D: Shepherding Windows COFF support into MC.
392 D: Lots of Windows stuff.
395 E: rspencer@reidspencer.com
396 W: http://reidspencer.com/
397 D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid
400 E: edwintorok@gmail.com
401 D: Miscellaneous bug fixes
405 D: C++ bugs filed, and C++ front-end bug fixes.
407 N: Lauro Ramos Venancio
408 E: lauro.venancio@indt.org.br
409 D: ARM backend improvements
410 D: Thread Local Storage implementation
413 E: wendling@apple.com
414 D: Exception handling
418 E: bob.wilson@acm.org
419 D: Advanced SIMD (NEON) support in the ARM backend