1 This file is a partial list of people who have contributed to the LLVM
2 project. If you have contributed a patch or made some other contribution to
3 LLVM, please submit a patch to this file to add yourself, and it will be
6 The list is sorted by surname and formatted to allow easy grepping and
7 beautification by scripts. The fields are: name (N), email (E), web-address
8 (W), PGP key ID and fingerprint (P), description (D), and snail-mail address
13 W: http://www.cs.uiuc.edu/~vadve/
14 D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM
18 D: LCSSA pass and related LoopUnswitch work
19 D: GVNPRE pass, TargetData refactoring, random improvements
22 D: MingW Win32 API portability layer
25 E: natebegeman@mac.com
26 D: PowerPC backend developer
27 D: Target-independent code generator and analysis improvements
30 E: dberlin@dberlin.org
31 D: ET-Forest implementation.
35 E: neil@daikokuya.co.uk
36 D: APFloat implementation.
39 E: brukman+llvm@uiuc.edu
40 W: http://misha.brukman.net
41 D: Portions of X86 and Sparc JIT compilers, PowerPC backend
42 D: Incremental bytecode loader
46 D: The `mem2reg' pass - promotes values stored in memory to registers
49 E: chandlerc@gmail.com
50 D: LinkTimeOptimizer for Linux, via binutils integration, and C API
54 D: Fixes to the Reassociation pass, various improvement patches
57 E: evan.cheng@apple.com
58 D: ARM and X86 backends
59 D: Instruction scheduler improvements
60 D: Register allocator improvements
61 D: Loop optimizer improvements
62 D: Target-independent code generator improvements
64 N: Dan Villiom Podlaski Christiansen
68 D: LLVM Makefile improvements
69 D: Clang diagnostic & driver tweaks
73 E: jeffc@jolt-lang.org
74 W: http://jolt-lang.org
75 D: Native Win32 API portability layer
79 D: Original Autoconf support, documentation improvements, bug fixes
82 E: stefanus.dutoit@rapidmind.com
83 D: Bug fixes and minor improvements
85 N: Rafael Avila de Espindola
86 E: rafael.espindola@gmail.com
90 E: alkis@evlogimenos.com
91 D: Linear scan register allocator, many codegen improvements, Java frontend
94 E: pizza@parseerror.com
95 D: Miscellaneous bug fixes
99 W: http://www.students.uiuc.edu/~gaeke/
100 D: Portions of X86 static and JIT compilers; initial SparcV8 backend
101 D: Dynamic trace optimizer
102 D: FreeBSD/X86 compatibility fixes, the llvm-nm tool
105 E: nicolas.geoffray@lip6.fr
106 W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/
107 D: PPC backend fixes for Linux
110 D: Portions of the PowerPC backend
113 E: saemghani@gmail.com
114 D: Callgraph class cleanups
116 N: Mikhail Glushenkov
117 E: foldr@codedgers.com
122 D: Miscellaneous bug fixes
125 E: david@goodwinz.net
126 D: Thumb-2 code generator
129 E: greened@obbligato.org
130 D: Miscellaneous bug fixes
131 D: Register allocation refactoring
135 D: Improvements for space efficiency
138 E: grosbach@apple.com
139 D: SjLj exception handling support
140 D: General fixes and improvements for the ARM back-end
144 D: PBQP-based register allocator
147 E: gordonhenriksen@mac.com
148 D: Pluggable GC support
152 N: Raul Fernandes Herbster
153 E: raul@dsc.ufcg.edu.br
154 D: JIT support for ARM
157 E: arathorn@fastwebnet.it
158 D: Visual C++ compatibility fixes
161 E: patjenk@wam.umd.edu
166 D: ARM constant islands improvements
167 D: Tail merging improvements
168 D: Rewrite X87 back end
169 D: Use APFloat for floating point constants widely throughout compiler
170 D: Implement X87 long double
173 E: kungfoomaster@nondot.org
174 D: Support for packed types
178 D: Author of LLVM Ada bindings
181 W: http://randomhacks.net/
182 D: llvm-config script
184 N: Anton Korobeynikov
186 D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv.
187 D: x86/linux PIC codegen, aliases, regparm/visibility attributes
188 D: Switch lowering refactoring
192 D: Author of the original C backend
195 E: benny.kra@gmail.com
196 D: Miscellaneous bug fixes
199 E: christopher.lamb@gmail.com
200 D: aligned load/store support, parts of noalias and restrict support
201 D: vreg subreg infrastructure, X86 codegen improvements based on subregs
206 D: Improvements to the PPC backend, instruction scheduling
207 D: Debug and Dwarf implementation
208 D: Auto upgrade mangler
209 D: llvm-gcc4 svn wrangler
213 W: http://nondot.org/~sabre/
214 D: Primary architect of LLVM
216 N: Tanya Lattner (Tanya Brethour)
218 W: http://nondot.org/~tonic/
219 D: The initial llvm-ar tool, converted regression testsuite to dejagnu
220 D: Modulo scheduling in the SparcV9 backend
221 D: Release manager (1.7+)
224 E: alenhar2@cs.uiuc.edu
225 W: http://www.lenharth.org/~andrewl/
227 D: Sampling based profiling
231 D: PredicateSimplifier pass
233 N: Bruno Cardoso Lopes
234 E: bruno.cardoso@gmail.com
235 W: http://www.brunocardoso.org
239 E: duraid@octopus.com.au
240 W: http://kinoko.c.u-tokyo.ac.jp/~duraid/
241 D: IA64 backend, BigBlock register allocator
244 E: michael.mccracken@gmail.com
245 D: Line number support for llvmgcc
247 N: Vladimir Merzliakov
249 D: Test suite fixes for FreeBSD
253 D: Added STI Cell SPU backend.
256 E: geek4civic@gmail.com
257 E: chapuni@hf.rim.or.jp
258 D: Cygwin and MinGW support.
261 N: Edward O'Callaghan
262 E: eocallaghan@auroraux.org
263 W: http://www.auroraux.org
264 D: Add Clang support with various other improvements to utils/NewNightlyTest.pl
265 D: Fix and maintain Solaris & AuroraUX support for llvm, various build warnings
266 D: and error clean ups.
270 D: Visual C++ compatibility fixes
272 N: Jakob Stoklund Olesen
274 D: Machine code verifier
283 D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
284 D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
285 D: Optimizer improvements, Loop Index Split
288 E: deeppatel1987@gmail.com
289 D: ARM calling conventions rewrite, hard float support
292 E: peckw@wesleypeck.com
293 W: http://wesleypeck.com/
294 D: MicroBlaze backend
297 W: http://vladimir_prus.blogspot.com
299 D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass
302 E: roman@codedgers.com
307 D: Ada support in llvm-gcc
309 D: Exception handling improvements
310 D: Type legalizer rewrite
314 D: Graph coloring register allocator for the Sparc64 backend
316 N: Arnold Schwaighofer
317 E: arnold.schwaighofer@gmail.com
318 D: Tail call optimization for the x86 backend
322 D: Miscellaneous bug fixes
325 E: ashukla@cs.uiuc.edu
328 N: Michael J. Spencer
329 E: bigcheesegs@gmail.com
330 D: Shepherding Windows COFF support into MC.
333 E: rspencer@reidspencer.com
334 W: http://reidspencer.com/
335 D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid
338 E: edwintorok@gmail.com
339 D: Miscellaneous bug fixes
343 D: C++ bugs filed, and C++ front-end bug fixes.
345 N: Lauro Ramos Venancio
346 E: lauro.venancio@indt.org.br
347 D: ARM backend improvements
348 D: Thread Local Storage implementation
352 D: Cmake dependency chain and various bug fixes
355 E: wendling@apple.com
359 E: bob.wilson@acm.org
360 D: Advanced SIMD (NEON) support in the ARM backend