Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt

   1 device-tree bindings for rockchip soc display controller (vop)
   2
   3 VOP (Visual Output Processor) is the Display Controller for the Rockchip
   4 series of SoCs which transfers the image data from a video memory
   5 buffer to an external LCD interface.
   6
   7 Required properties:
   8 - compatible: value should be one of the following
   9                 "rockchip,rk3036-vop";
  10                 "rockchip,rk3288-vop";
  11                 "rockchip,rk3368-vop";
  12                 "rockchip,rk3366-vop";
  13                 "rockchip,rk3399-vop-big";
  14                 "rockchip,rk3399-vop-lit";
  15                 "rockchip,rk322x-vop";
  16                 "rockchip,rk3328-vop";
  17
  18 - reg: Address and length of the register set for the device.
  19 - reg-names: The names of register regions. contain following regions:
  20   - "regs" : (Required) Base address and size of the controllers.
  21   - "cabc_lut" : (Optinal) cabc function lut table registers,
  22                    take care of this register's length, driver would use
  23                    register's length to decide cabc lut table size.
  24   - "gamma_lut" : (Optinal) gamma function lut table registers,
  25                    take care of this register's length, driver would use
  26                    register's length to decide gamma table size.
  27
  28 - interrupts: should contain a list of all VOP IP block interrupts in the
  29                  order: VSYNC, LCD_SYSTEM. The interrupt specifier
  30                  format depends on the interrupt controller used.
  31
  32 - clocks: must include clock specifiers corresponding to entries in the
  33                 clock-names property.
  34
  35 - clock-names: Must contain
  36                 aclk_vop: for ddr buffer transfer.
  37                 hclk_vop: for ahb bus to R/W the phy regs.
  38                 dclk_vop: pixel clock.
  39                 dclk_source: optinal, dclk sources from display plls.
  40
  41 - resets: Must contain an entry for each entry in reset-names.
  42   See ../reset/reset.txt for details.
  43 - reset-names: Must include the following entries:
  44   - axi
  45   - ahb
  46   - dclk
  47
  48 - iommus: required a iommu node
  49
  50 - port: A port node with endpoint definitions as defined in
  51   Documentation/devicetree/bindings/media/video-interfaces.txt.
  52
  53 Example:
  54 SoC specific DT entry:
  55         vopb: vopb@ff930000 {
  56                 compatible = "rockchip,rk3288-vop";
  57                 reg = <0xff930000 0x19c>, <0xff931000 0x1000>;
  58                 reg-names = "regs", "gamma_lut";
  59                 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
  60                 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
  61                 clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
  62                 resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
  63                 reset-names = "axi", "ahb", "dclk";
  64                 iommus = <&vopb_mmu>;
  65                 vopb_out: port {
  66                         #address-cells = <1>;
  67                         #size-cells = <0>;
  68                         vopb_out_edp: endpoint@0 {
  69                                 reg = <0>;
  70                                 remote-endpoint=<&edp_in_vopb>;
  71                         };
  72                         vopb_out_hdmi: endpoint@1 {
  73                                 reg = <1>;
  74                                 remote-endpoint=<&hdmi_in_vopb>;
  75                         };
  76                 };
  77         };