Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt

   1 device-tree bindings for rockchip soc display controller (vop)
   2
   3 VOP (Visual Output Processor) is the Display Controller for the Rockchip
   4 series of SoCs which transfers the image data from a video memory
   5 buffer to an external LCD interface.
   6
   7 Required properties:
   8 - compatible: value should be one of the following
   9                 "rockchip,rk3036-vop";
  10                 "rockchip,rk3288-vop";
  11                 "rockchip,rk3368-vop";
  12                 "rockchip,rk3366-vop";
  13                 "rockchip,rk3366-vop-lit";
  14                 "rockchip,rk3399-vop-big";
  15                 "rockchip,rk3399-vop-lit";
  16                 "rockchip,rk322x-vop";
  17                 "rockchip,rk3328-vop";
  18
  19 - reg: Address and length of the register set for the device.
  20 - reg-names: The names of register regions. contain following regions:
  21   - "regs" : (Required) Base address and size of the controllers.
  22   - "cabc_lut" : (Optinal) cabc function lut table registers,
  23                    take care of this register's length, driver would use
  24                    register's length to decide cabc lut table size.
  25   - "gamma_lut" : (Optinal) gamma function lut table registers,
  26                    take care of this register's length, driver would use
  27                    register's length to decide gamma table size.
  28
  29 - interrupts: should contain a list of all VOP IP block interrupts in the
  30                  order: VSYNC, LCD_SYSTEM. The interrupt specifier
  31                  format depends on the interrupt controller used.
  32
  33 - clocks: must include clock specifiers corresponding to entries in the
  34                 clock-names property.
  35
  36 - clock-names: Must contain
  37                 aclk_vop: for ddr buffer transfer.
  38                 hclk_vop: for ahb bus to R/W the phy regs.
  39                 dclk_vop: pixel clock.
  40                 dclk_source: optinal, dclk sources from display plls.
  41
  42 - resets: Must contain an entry for each entry in reset-names.
  43   See ../reset/reset.txt for details.
  44 - reset-names: Must include the following entries:
  45   - axi
  46   - ahb
  47   - dclk
  48
  49 - iommus: required a iommu node
  50
  51 - port: A port node with endpoint definitions as defined in
  52   Documentation/devicetree/bindings/media/video-interfaces.txt.
  53
  54 Example:
  55 SoC specific DT entry:
  56         vopb: vopb@ff930000 {
  57                 compatible = "rockchip,rk3288-vop";
  58                 reg = <0xff930000 0x19c>, <0xff931000 0x1000>;
  59                 reg-names = "regs", "gamma_lut";
  60                 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
  61                 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
  62                 clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
  63                 resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;
  64                 reset-names = "axi", "ahb", "dclk";
  65                 iommus = <&vopb_mmu>;
  66                 vopb_out: port {
  67                         #address-cells = <1>;
  68                         #size-cells = <0>;
  69                         vopb_out_edp: endpoint@0 {
  70                                 reg = <0>;
  71                                 remote-endpoint=<&edp_in_vopb>;
  72                         };
  73                         vopb_out_hdmi: endpoint@1 {
  74                                 reg = <1>;
  75                                 remote-endpoint=<&hdmi_in_vopb>;
  76                         };
  77                 };
  78         };