1 * Freescale Enhanced Secure Digital Host Controller (eSDHC)
3 The Enhanced Secure Digital Host Controller provides an interface
4 for MMC, SD, and SDIO types of memory cards.
7 - compatible : should be
8 "fsl,<chip>-esdhc", "fsl,esdhc"
9 - reg : should contain eSDHC registers location and length.
10 - interrupts : should contain eSDHC interrupt.
11 - interrupt-parent : interrupt source phandle.
12 - clock-frequency : specifies eSDHC base clock frequency.
13 - sdhci,wp-inverted : (optional) specifies that eSDHC controller
14 reports inverted write-protect state; New devices should use
15 the generic "wp-inverted" property.
16 - sdhci,1-bit-only : (optional) specifies that a controller can
17 only handle 1-bit data transfers. New devices should use the
18 generic "bus-width = <1>" property.
19 - sdhci,auto-cmd12: (optional) specifies that a controller can
20 only handle auto CMD12.
25 compatible = "fsl,mpc8378-esdhc", "fsl,esdhc";
26 reg = <0x2e000 0x1000>;
27 interrupts = <42 0x8>;
28 interrupt-parent = <&ipic>;
29 /* Filled in by U-Boot */
30 clock-frequency = <0>;