Documentation/devicetree/bindings/phy/phy-rockchip-inno-mipi-dphy.txt

   1 ROCKCHIP MIPI DPHY WITH INNO IP BLOCK
   2
   3 Required properties:
   4  - compatible : must be one of:
   5         "rockchip,rk3366-mipi-dphy";
   6         "rockchip,rk3368-mipi-dphy";
   7  - reg : the address offset of register for mipi-dphy configuration.
   8  - #phy-cells : must be 0. See ./phy-bindings.txt for details.
   9  - clocks and clock-names:
  10         - the "pclk" clock is required by the phy module, used to register
  11           configuration
  12         - the "ref" clock is used to get the rate of the reference clock
  13           provided to the PHY module
  14  - clock-output-names: from common clock binding.
  15         See ../clocks/clock-bindings.txt for details.
  16  - #clock-cells : from common clock binding; shall be set to 0.
  17
  18 Optional properties
  19  - resets : phandle to the reset of MIPI DSI PHY APB clock.
  20  - reset-names : should be "apb".
  21
  22 Example:
  23
  24 For Rockchip RK3368
  25
  26         mipi_dphy: mipi-dphy@ff968000 {
  27                 compatible = "rockchip,rk3368-mipi-dphy";
  28                 reg = <0x0 0xff968000 0x0 0x4000>;
  29                 clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_DPHYTX0>;
  30                 clock-names = "ref", "pclk";
  31                 clock-output-names = "mipi_dphy_pll";
  32                 #clock-cells = <0>;
  33                 resets = <&cru SRST_MIPIDPHYTX>;
  34                 reset-names = "apb";
  35                 #phy-cells = <0>;
  36         };
  37
  38 Then the PHY can be used in other nodes such as:
  39
  40         dsi@ff960000 {
  41                 ...
  42                 clocks = <&cru PCLK_MIPI_DSI0>, <&mipi_dphy>;
  43                 clock-names = "pclk", "hs_clk";
  44                 phys = <&mipi_dphy>;
  45                 phy-names = "mipi_dphy";
  46                 ...
  47         };