1 Freescale Synchronous Serial Interface
3 The SSI is a serial device that communicates with audio codecs. It can
4 be programmed in AC97, I2S, left-justified, or right-justified modes.
7 - compatible: Compatible list, should contain one of the following
13 - cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on.
14 - reg: Offset and length of the register set for the device.
15 - interrupts: <a b> where a is the interrupt number and b is a
16 field that represents an encoding of the sense and
17 level information for the interrupt. This should be
18 encoded based on the information in section 2)
19 depending on the type of interrupt controller you
21 - interrupt-parent: The phandle for the interrupt controller that
22 services interrupts for this device.
23 - fsl,mode: The operating mode for the SSI interface.
24 "i2s-slave" - I2S mode, SSI is clock slave
25 "i2s-master" - I2S mode, SSI is clock master
26 "lj-slave" - left-justified mode, SSI is clock slave
27 "lj-master" - l.j. mode, SSI is clock master
28 "rj-slave" - right-justified mode, SSI is clock slave
29 "rj-master" - r.j., SSI is clock master
30 "ac97-slave" - AC97 mode, SSI is clock slave
31 "ac97-master" - AC97 mode, SSI is clock master
32 - fsl,playback-dma: Phandle to a node for the DMA channel to use for
33 playback of audio. This is typically dictated by SOC
34 design. See the notes below.
35 - fsl,capture-dma: Phandle to a node for the DMA channel to use for
36 capture (recording) of audio. This is typically dictated
37 by SOC design. See the notes below.
38 - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
39 This number is the maximum allowed value for SFCSR[TFWM0].
40 - fsl,ssi-asynchronous:
41 If specified, the SSI is to be programmed in asynchronous
42 mode. In this mode, pins SRCK, STCK, SRFS, and STFS must
43 all be connected to valid signals. In synchronous mode,
44 SRCK and SRFS are ignored. Asynchronous mode allows
45 playback and capture to use different sample sizes and
46 sample rates. Some drivers may require that SRCK and STCK
47 be connected together, and SRFS and STFS be connected
48 together. This would still allow different sample sizes,
49 but not different sample rates.
51 Required are also ac97 link bindings if ac97 is used. See
52 Documentation/devicetree/bindings/sound/soc-ac97link.txt for the necessary
56 - codec-handle: Phandle to a 'codec' node that defines an audio
57 codec connected to this SSI. This node is typically
58 a child of an I2C or other control node.
59 - fsl,fiq-stream-filter: Bool property. Disabled DMA and use FIQ instead to
60 filter the codec stream. This is necessary for some boards
61 where an incompatible codec is connected to this SSI, e.g.
63 - dmas: Generic dma devicetree binding as described in
64 Documentation/devicetree/bindings/dma/dma.txt.
65 - dma-names: Two dmas have to be defined, "tx" and "rx", if fsl,imx-fiq
68 Child 'codec' node required properties:
69 - compatible: Compatible list, contains the name of the codec
71 Child 'codec' node optional properties:
72 - clock-frequency: The frequency of the input clock, which typically comes
73 from an on-board dedicated oscillator.
75 Notes on fsl,playback-dma and fsl,capture-dma:
77 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
78 and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for
79 playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
80 playback and DMA channel 3 for capture. The developer can choose which
81 DMA controller to use, but the channels themselves are hard-wired. The
82 purpose of these two properties is to represent this hardware design.
84 The device tree nodes for the DMA channels that are referenced by
85 "fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with
86 "fsl,ssi-dma-channel". The SOC-specific compatible string (e.g.
87 "fsl,mpc8610-dma-channel") can remain. If these nodes are left as
88 "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel", then the generic Elo DMA
89 drivers (fsldma) will attempt to use them, and it will conflict with the