Documentation/devicetree/bindings/video/rockchip_lcdc.txt

   1 Device-Tree bindings for Rockchip SoC display controller (VOP / LCDC)
   2 VOP (Video Output Process) / LCDC is the Display Controller for the
   3 ROCKCHIP series of SoCs which transfers the image data from a video memory
   4 buffer to an external LCD interface.
   5
   6 Required properties:
   7 - compatible: value should be one of the following
   8                 "rockchip,rk3288-lcdc"; /* for RK3288 SoCs */
   9 - rockchip,prop: set the lcdc as primary or extend display.
  10 - rochchip,pwr18: set the controller IO voltage,0 is 3.3v,1 is 1.8v.
  11 - reg: physical base address and length of the LCDC registers set.
  12 - interrupts: interrupt number to the cpu and interrupt proterties.
  13 - pinctrl-names: must contain a "default" entry.
  14 - pinctrl-0: pin control group to be used for this controller.
  15 - pinctrl-1: pin control group to be used for gpio.
  16 - clocks: must include clock specifiers corresponding to entries in the
  17          clock-names property.
  18 - clock-names: list of clock names sorted in the same order as the clocks
  19                property..
  20
  21 Optional Properties:
  22 - rockchip,debug: printk debug message.
  23 - rockchip,mirror: the lcdc mirror function.
  24 - lcd_en:lcd_en: contain power control for lcd.
  25         - rockchip,power_type: power type,GPIO or REGULATOR.
  26         - gpios: pin number for gpio.
  27         - rockchip,delay: delay time after set power.
  28
  29 Example:
  30
  31 SoC specific DT entry:
  32         lcdc1: lcdc@ff940000 {
  33                 compatible = "rockchip,rk3288-lcdc";
  34                 rockchip,prop = <PRMRY>;
  35                 rochchip,pwr18 = <0>;
  36                 reg = <0xff940000 0x10000>;
  37                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
  38                 pinctrl-names = "default", "gpio";
  39                 pinctrl-0 = <&lcdc0_lcdc>;
  40                 pinctrl-1 = <&lcdc0_gpio>;
  41                 status = "disabled";
  42                 clocks = <&clk_gates15 7>, <&dclk_lcdc1>, <&clk_gates15 8>, <&pd_vop1>;
  43                 clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc", "pd_lcdc";
  44         };
  45
  46
  47 Board specific DT entry:
  48
  49 &lcdc1 {
  50         status = "okay";
  51         power_ctr: power_ctr {
  52                 rockchip,debug = <0>;
  53                 rockchip,mirror = <NO_MIRROR>;
  54                 lcd_en:lcd_en {
  55                         rockchip,power_type = <GPIO>;
  56                         gpios = <&gpio7 GPIO_A3 GPIO_ACTIVE_HIGH>;
  57                         rockchip,delay = <10>;
  58                 };
  59                 lcd_cs:lcd_cs {
  60                         rockchip,power_type = <GPIO>;
  61                         gpios = <&gpio7 GPIO_A4 GPIO_ACTIVE_HIGH>;
  62                         rockchip,delay = <10>;
  63                 };
  64         };
  65 };
  66