Robust/src/Runtime/RAW/raw_interrupt2.s

   1 #include <raw_asm.h>
   2
   3         .text
   4         .align  2
   5         .globl  setup_ints
   6         .ent    setup_ints
   7 setup_ints:
   8         # set up dynamic network
   9         uintoff
  10         intoff
  11
  12         # set gdn_cfg
  13         xor $8,$8,$8
  14         aui $8,$8,(3<<11)|(1 <<6)|(0 <<1)
  15         ori $8, (0 <<12)|(2<<9)
  16         mtsr    GDN_CFG,$8
  17 #       mtsr    PASS,$8
  18
  19         # set exception vector
  20     la $3, interrupt_table
  21 #       mtsri PASS, 0xaaa
  22 #       mtsr PASS, $3
  23     mtsr EX_BASE_ADDR, $3
  24
  25         # set EX_MASK
  26         mfsr    $8,EX_MASK
  27         ori     $8,$8,0x20          # 1 << kVEC_GDN_AVAIL
  28         mtsr    EX_MASK,$8
  29
  30         inton
  31         uinton
  32         jr $31
  33         .end    setup_ints
  34
  35 .macro empty_vec fail_code
  36         mtsri FAIL, \fail_code
  37 1:      b 1b
  38         nop
  39         nop
  40 .endm
  41
  42 interrupt_table:
  43
  44 vec_gdn_refill:
  45         empty_vec 0x2300
  46 vec_gdn_complete:
  47         empty_vec 0x2301
  48 vec_trace:
  49         empty_vec 0x2302
  50 vec_extern:
  51         empty_vec 0x2303
  52 vec_timer:
  53         empty_vec 0x2304
  54 vec_gdn_avail:
  55 #       mtsri PASS, 0xef00
  56         uintoff
  57
  58         addiu   $sp,$sp,-112
  59         sw      $31,0x64($sp)
  60         sw      $30,0x60($sp)
  61         sw      $23,0x5c($sp)
  62         sw      $22,0x58($sp)
  63         sw      $21,0x54($sp)
  64         sw      $20,0x50($sp)
  65         sw      $19,0x4c($sp)
  66         sw      $18,0x48($sp)
  67         sw      $17,0x44($sp)
  68         sw      $16,0x40($sp)
  69         sw      $15,0x3c($sp)
  70         sw      $14,0x38($sp)
  71         sw      $13,0x34($sp)
  72         sw      $12,0x30($sp)
  73         sw      $11,0x2c($sp)
  74         sw      $10,0x28($sp)
  75         sw      $9,0x24($sp)
  76         sw      $8,0x20($sp)
  77         sw      $7,0x1c($sp)
  78         sw      $6,0x18($sp)
  79         sw      $5,0x14($sp)
  80         sw      $4,0x10($sp)
  81         sw      $3,0xc($sp)
  82         sw      $2,0x8($sp)
  83         .set noat
  84         sw      $1,0x4($sp)
  85         .set at
  86         mfhi    $8
  87         mflo    $9
  88         sw      $8,0x68($sp)
  89         sw      $9,0x6c($sp)
  90         lw      $8,0x20($sp)
  91         lw      $9,0x24($sp)
  92
  93         jal receiveObject
  94
  95         lw      $8,0x68($sp)
  96         lw      $9,0x6c($sp)
  97         mthi    $8
  98         mtlo    $9
  99         lw      $31,0x64($sp)
 100         lw      $30,0x60($sp)
 101         lw      $23,0x5c($sp)
 102         lw      $22,0x58($sp)
 103         lw      $21,0x54($sp)
 104         lw      $20,0x50($sp)
 105         lw      $19,0x4c($sp)
 106         lw      $18,0x48($sp)
 107         lw      $17,0x44($sp)
 108         lw      $16,0x40($sp)
 109         lw      $15,0x3c($sp)
 110         lw      $14,0x38($sp)
 111         lw      $13,0x34($sp)
 112         lw      $12,0x30($sp)
 113         lw      $11,0x2c($sp)
 114         lw      $10,0x28($sp)
 115         lw      $9,0x24($sp)
 116         lw      $8,0x20($sp)
 117         lw      $7,0x1c($sp)
 118         lw      $6,0x18($sp)
 119         lw      $5,0x14($sp)
 120         lw      $4,0x10($sp)
 121         lw      $3,0xc($sp)
 122         lw      $2,0x8($sp)
 123         .set noat
 124         lw      $1,0x4($sp)
 125         .set at
 126         addiu   $sp,$sp,112
 127
 128 #       mtsri PASS, 0xefff
 129         dret
 130 vec_event_counters:
 131         empty_vec 0x2306
 132