2 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 # This program is free software; you can redistribute it and/or modify
5 # it under the terms of the GNU General Public License version 2 as
6 # published by the Free Software Foundation.
11 select CLONE_BACKWARDS
12 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
13 select DEVTMPFS if !INITRAMFS_SOURCE=""
14 select GENERIC_ATOMIC64
15 select GENERIC_CLOCKEVENTS
16 select GENERIC_FIND_FIRST_BIT
17 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
18 select GENERIC_IRQ_SHOW
19 select GENERIC_KERNEL_EXECVE
20 select GENERIC_KERNEL_THREAD
21 select GENERIC_PENDING_IRQ if SMP
22 select GENERIC_SMP_IDLE_THREAD
24 select HAVE_ARCH_TRACEHOOK
25 select HAVE_GENERIC_HARDIRQS
26 select HAVE_IOREMAP_PROT
28 select HAVE_KRETPROBES
30 select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
32 select HAVE_PERF_EVENTS
34 select MODULES_USE_ELF_RELA
37 select OF_EARLY_FLATTREE
38 select PERF_USE_VMALLOC
40 config SCHED_OMIT_FRAME_POINTER
46 config RWSEM_GENERIC_SPINLOCK
49 config ARCH_FLATMEM_ENABLE
58 config GENERIC_CALIBRATE_DELAY
61 config GENERIC_HWEIGHT
67 config STACKTRACE_SUPPORT
71 config HAVE_LATENCYTOP_SUPPORT
78 source "kernel/Kconfig.freezer"
80 menu "ARC Architecture Configuration"
82 menu "ARC Platform/SoC/Board"
84 source "arch/arc/plat-arcfpga/Kconfig"
85 #New platform adds here
89 menu "ARC CPU Configuration"
98 Support for ARC750 core
102 select ARC_CPU_REL_4_10
104 Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
105 This core has a bunch of cool new features:
106 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
107 Shared Address Spaces (for sharing TLB entires in MMU)
108 -Caches: New Prog Model, Region Flush
109 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
113 config CPU_BIG_ENDIAN
114 bool "Enable Big Endian Mode"
117 Build kernel for Big Endian Mode of ARC CPU
119 # If a platform can't work with 0x8000_0000 based dma_addr_t
120 config ARC_PLAT_NEEDS_CPU_TO_DMA
124 bool "Symmetric Multi-Processing (Incomplete)"
126 select USE_GENERIC_SMP_HELPERS
128 This enables support for systems with more than one CPU. If you have
129 a system with only one CPU, like most personal computers, say N. If
130 you have a system with more than one CPU, say Y.
134 config ARC_HAS_COH_CACHES
137 config ARC_HAS_COH_LLSC
140 config ARC_HAS_COH_RTSC
143 config ARC_HAS_REENTRANT_IRQ_LV2
149 int "Maximum number of CPUs (2-32)"
155 bool "Enable Cache Support"
157 # if SMP, cache enabled ONLY if ARC implementation has cache coherency
158 depends on !SMP || ARC_HAS_COH_CACHES
162 config ARC_CACHE_LINE_SHIFT
163 int "Cache Line Length (as power of 2)"
167 Starting with ARC700 4.9, Cache line length is configurable,
168 This option specifies "N", with Line-len = 2 power N
169 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
170 Linux only supports same line lengths for I and D caches.
172 config ARC_HAS_ICACHE
173 bool "Use Instruction Cache"
176 config ARC_HAS_DCACHE
177 bool "Use Data Cache"
180 config ARC_CACHE_PAGES
181 bool "Per Page Cache Control"
183 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
185 This can be used to over-ride the global I/D Cache Enable on a
186 per-page basis (but only for pages accessed via MMU such as
187 Kernel Virtual address or User Virtual Address)
188 TLB entries have a per-page Cache Enable Bit.
189 Note that Global I/D ENABLE + Per Page DISABLE works but corollary
190 Global DISABLE + Per Page ENABLE won't work
197 Single Cycle RAMS to store Fast Path Code
201 int "ICCM Size in KB"
203 depends on ARC_HAS_ICCM
208 Single Cycle RAMS to store Fast Path Data
212 int "DCCM Size in KB"
214 depends on ARC_HAS_DCCM
217 hex "DCCM map address"
219 depends on ARC_HAS_DCCM
221 config ARC_HAS_HW_MPY
222 bool "Use Hardware Multiplier (Normal or Faster XMAC)"
225 Influences how gcc generates code for MPY operations.
226 If enabled, MPYxx insns are generated, provided by Standard/XMAC
227 Multipler. Otherwise software multipy lib is used
230 prompt "ARC700 MMU Version"
231 default ARC_MMU_V3 if ARC_CPU_770
232 default ARC_MMU_V2 if ARC_CPU_750D
242 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
243 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
247 depends on ARC_CPU_770
249 Introduced with ARC700 4.10: New Features
250 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
251 Shared Address Spaces (SASID)
257 prompt "MMU Page Size"
258 default ARC_PAGE_SIZE_8K
260 config ARC_PAGE_SIZE_8K
263 Choose between 8k vs 16k
265 config ARC_PAGE_SIZE_16K
267 depends on ARC_MMU_V3
269 config ARC_PAGE_SIZE_4K
271 depends on ARC_MMU_V3
275 config ARC_COMPACT_IRQ_LEVELS
276 bool "ARCompact IRQ Priorities: High(2)/Low(1)"
278 # Timer HAS to be high priority, for any other high priority config
280 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
281 depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
283 if ARC_COMPACT_IRQ_LEVELS
296 config ARC_FPU_SAVE_RESTORE
297 bool "Enable FPU state persistence across context switch"
300 Double Precision Floating Point unit had dedictaed regs which
301 need to be saved/restored across context-switch.
302 Note that ARC FPU is overly simplistic, unlike say x86, which has
303 hardware pieces to allow software to conditionally save/restore,
304 based on actual usage of FPU by a task. Thus our implemn does
305 this for all tasks in system.
307 menuconfig ARC_CPU_REL_4_10
308 bool "Enable support for Rel 4.10 features"
311 -ARC770 (and dependent features) enabled
312 -ARC750 also shares some of the new features with 770
315 bool "Insn: LLOCK/SCOND (efficient atomic ops)"
317 depends on ARC_CPU_770
318 # if SMP, enable LLSC ONLY if ARC implementation has coherent atomics
319 depends on !SMP || ARC_HAS_COH_LLSC
322 bool "Insn: SWAPE (endian-swap)"
324 depends on ARC_CPU_REL_4_10
327 bool "Insn: RTSC (64-bit r/o cycle counter)"
329 depends on ARC_CPU_REL_4_10
330 # if SMP, enable RTSC only if counter is coherent across cores
331 depends on !SMP || ARC_HAS_COH_RTSC
333 endmenu # "ARC CPU Configuration"
335 config LINUX_LINK_BASE
336 hex "Linux Link Address"
339 ARC700 divides the 32 bit phy address space into two equal halves
340 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
341 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
342 Typically Linux kernel is linked at the start of untransalted addr,
343 hence the default value of 0x8zs.
344 However some customers have peripherals mapped at this addr, so
345 Linux needs to be scooted a bit.
346 If you don't know what the above means, leave this setting alone.
348 config ARC_CURR_IN_REG
349 bool "Dedicate Register r25 for current_task pointer"
352 This reserved Register R25 to point to Current Task in
353 kernel mode. This saves memory access for each such access
356 config ARC_MISALIGN_ACCESS
357 bool "Emulate unaligned memory access (userspace only)"
359 select SYSCTL_ARCH_UNALIGN_NO_WARN
360 select SYSCTL_ARCH_UNALIGN_ALLOW
362 This enables misaligned 16 & 32 bit memory access from user space.
363 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
364 potential bugs in code
366 config ARC_STACK_NONEXEC
367 bool "Make stack non-executable"
370 To disable the execute permissions of stack/heap of processes
371 which are enabled by default.
374 int "Timer Frequency"
377 config ARC_METAWARE_HLINK
378 bool "Support for Metaware debugger assisted Host access"
381 This options allows a Linux userland apps to directly access
382 host file system (open/creat/read/write etc) with help from
383 Metaware Debugger. This can come in handy for Linux-host communication
384 when there is no real usable peripheral such as EMAC.
390 config ARC_DW2_UNWIND
391 bool "Enable DWARF specific kernel stack unwind"
396 Compiles the kernel with DWARF unwind information and can be used
397 to get stack backtraces.
399 If you say Y here the resulting kernel image will be slightly larger
400 but not slower, and it will give very useful debugging information.
401 If you don't debug the kernel, you can say N, but we may not be able
402 to solve problems without frame unwind information
404 config ARC_DBG_TLB_PARANOIA
405 bool "Paranoia Checks in Low Level TLB Handlers"
409 config ARC_DBG_TLB_MISS_COUNT
410 bool "Profile TLB Misses"
415 Counts number of I and D TLB Misses and exports them via Debugfs
416 The counters can be cleared via Debugfs as well
419 string "Kernel command line to built-in"
420 default "print-fatal-signals=1"
422 The default command line which will be appended to the optional
423 u-boot provided command line (see below)
426 bool "Support U-boot kernel command line passing"
429 If you are using U-boot (www.denx.de) and wish to pass the kernel
430 command line from the U-boot environment to the Linux kernel then
431 switch this option on.
432 ARC U-boot will setup the cmdline in RAM/flash and set r2 to point
433 to it. kernel startup code will copy the string into cmdline buffer
434 and also append CONFIG_CMDLINE.
436 config ARC_BUILTIN_DTB_NAME
437 string "Built in DTB"
439 Set the name of the DTB to embed in the vmlinux binary
440 Leaving it blank selects the minimal "skeleton" dtb
442 source "kernel/Kconfig.preempt"
444 endmenu # "ARC Architecture Configuration"
448 source "drivers/Kconfig"
450 source "arch/arc/Kconfig.debug"
451 source "security/Kconfig"
452 source "crypto/Kconfig"