2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/seq_file.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/console.h>
14 #include <linux/module.h>
15 #include <linux/cpu.h>
16 #include <linux/of_fdt.h>
17 #include <linux/cache.h>
18 #include <asm/sections.h>
19 #include <asm/arcregs.h>
21 #include <asm/setup.h>
24 #include <asm/unwind.h>
26 #include <asm/mach_desc.h>
28 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
30 int running_on_hw = 1; /* vs. on ISS */
32 /* Part of U-boot ABI: see head.S */
33 int __initdata uboot_tag;
34 char __initdata *uboot_arg;
36 const struct machine_desc *machine_desc;
38 struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
40 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
42 static void read_arc_build_cfg_regs(void)
44 struct bcr_perip uncached_space;
45 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
48 READ_BCR(AUX_IDENTITY, cpu->core);
50 cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR);
51 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
53 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
54 cpu->uncached_base = uncached_space.start << 24;
56 cpu->extn.mul = read_aux_reg(ARC_REG_MUL_BCR);
57 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR);
58 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR);
59 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR);
60 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR);
61 READ_BCR(ARC_REG_MAC_BCR, cpu->extn_mac_mul);
63 cpu->extn.ext_arith = read_aux_reg(ARC_REG_EXTARITH_BCR);
64 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR);
66 /* Note that we read the CCM BCRs independent of kernel config
67 * This is to catch the cases where user doesn't know that
68 * CCMs are present in hardware build
73 struct bcr_dccm_base dccm_base;
74 unsigned int bcr_32bit_val;
76 bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
78 iccm = *((struct bcr_iccm *)&bcr_32bit_val);
79 cpu->iccm.base_addr = iccm.base << 16;
80 cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
83 bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
85 dccm = *((struct bcr_dccm *)&bcr_32bit_val);
86 cpu->dccm.sz = 0x800 << (dccm.sz);
88 READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
89 cpu->dccm.base_addr = dccm_base.addr << 8;
93 READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
95 read_decode_mmu_bcr();
96 read_decode_cache_bcr();
98 READ_BCR(ARC_REG_FP_BCR, cpu->fp);
99 READ_BCR(ARC_REG_DPFP_BCR, cpu->dpfp);
102 static const struct cpuinfo_data arc_cpu_tbl[] = {
103 { {0x10, "ARCTangent A5"}, 0x1F},
104 { {0x20, "ARC 600" }, 0x2F},
105 { {0x30, "ARC 700" }, 0x33},
106 { {0x34, "ARC 700 R4.10"}, 0x34},
110 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
113 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
114 struct bcr_identity *core = &cpu->core;
115 const struct cpuinfo_data *tbl;
117 #ifdef CONFIG_CPU_BIG_ENDIAN
122 n += scnprintf(buf + n, len - n,
123 "\nARC IDENTITY\t: Family [%#02x]"
124 " Cpu-id [%#02x] Chip-id [%#4x]\n",
125 core->family, core->cpu_id,
128 for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
129 if ((core->family >= tbl->info.id) &&
130 (core->family <= tbl->up_range)) {
131 n += scnprintf(buf + n, len - n,
132 "processor\t: %s %s\n",
134 be ? "[Big Endian]" : "");
139 if (tbl->info.id == 0)
140 n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
142 n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
143 (unsigned int)(arc_get_core_freq() / 1000000),
144 (unsigned int)(arc_get_core_freq() / 10000) % 100);
146 n += scnprintf(buf + n, len - n, "Timers\t\t: %s %s\n",
147 (cpu->timers & 0x200) ? "TIMER1" : "",
148 (cpu->timers & 0x100) ? "TIMER0" : "");
150 n += scnprintf(buf + n, len - n, "Vect Tbl Base\t: %#x\n",
153 n += scnprintf(buf + n, len - n, "UNCACHED Base\t: %#x\n",
159 static const struct id_to_str mul_type_nm[] = {
161 { 0x1, "32x32 (spl Result Reg)" },
162 { 0x2, "32x32 (ANY Result Reg)" }
165 static const struct id_to_str mac_mul_nm[] = {
168 {0x2, "Dual 16 x 16"},
172 {0x6, "Dual 16x16 and 32x16"}
175 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
178 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
181 #define IS_AVAIL1(var, str) ((var) ? str : "")
182 #define IS_AVAIL2(var, str) ((var == 0x2) ? str : "")
183 #define IS_USED(cfg) (IS_ENABLED(cfg) ? "(in-use)" : "(not used)")
185 n += scnprintf(buf + n, len - n,
186 "Extn [700-Base]\t: %s %s %s %s %s %s\n",
187 IS_AVAIL2(cpu->extn.norm, "norm,"),
188 IS_AVAIL2(cpu->extn.barrel, "barrel-shift,"),
189 IS_AVAIL1(cpu->extn.swap, "swap,"),
190 IS_AVAIL2(cpu->extn.minmax, "minmax,"),
191 IS_AVAIL1(cpu->extn.crc, "crc,"),
192 IS_AVAIL2(cpu->extn.ext_arith, "ext-arith"));
194 n += scnprintf(buf + n, len - n, "Extn [700-MPY]\t: %s",
195 mul_type_nm[cpu->extn.mul].str);
197 n += scnprintf(buf + n, len - n, " MAC MPY: %s\n",
198 mac_mul_nm[cpu->extn_mac_mul.type].str);
200 if (cpu->core.family == 0x34) {
201 n += scnprintf(buf + n, len - n,
202 "Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n",
203 IS_USED(CONFIG_ARC_HAS_LLSC),
204 IS_USED(CONFIG_ARC_HAS_SWAPE),
205 IS_USED(CONFIG_ARC_HAS_RTSC));
208 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: %s",
209 !(cpu->dccm.sz || cpu->iccm.sz) ? "N/A" : "");
212 n += scnprintf(buf + n, len - n, "DCCM: @ %x, %d KB ",
213 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz));
216 n += scnprintf(buf + n, len - n, "ICCM: @ %x, %d KB",
217 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
219 n += scnprintf(buf + n, len - n, "\nExtn [FPU]\t: %s",
220 !(cpu->fp.ver || cpu->dpfp.ver) ? "N/A" : "");
223 n += scnprintf(buf + n, len - n, "SP [v%d] %s",
224 cpu->fp.ver, cpu->fp.fast ? "(fast)" : "");
227 n += scnprintf(buf + n, len - n, "DP [v%d] %s",
228 cpu->dpfp.ver, cpu->dpfp.fast ? "(fast)" : "");
230 n += scnprintf(buf + n, len - n, "\n");
232 n += scnprintf(buf + n, len - n,
233 "OS ABI [v3]\t: no-legacy-syscalls\n");
238 static void arc_chk_ccms(void)
240 #if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM)
241 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
243 #ifdef CONFIG_ARC_HAS_DCCM
245 * DCCM can be arbit placed in hardware.
246 * Make sure it's placement/sz matches what Linux is built with
248 if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
249 panic("Linux built with incorrect DCCM Base address\n");
251 if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
252 panic("Linux built with incorrect DCCM Size\n");
255 #ifdef CONFIG_ARC_HAS_ICCM
256 if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
257 panic("Linux built with incorrect ICCM Size\n");
263 * Ensure that FP hardware and kernel config match
264 * -If hardware contains DPFP, kernel needs to save/restore FPU state
265 * across context switches
266 * -If hardware lacks DPFP, but kernel configured to save FPU state then
267 * kernel trying to access non-existant DPFP regs will crash
269 * We only check for Dbl precision Floating Point, because only DPFP
270 * hardware has dedicated regs which need to be saved/restored on ctx-sw
271 * (Single Precision uses core regs), thus kernel is kind of oblivious to it
273 static void arc_chk_fpu(void)
275 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
278 #ifndef CONFIG_ARC_FPU_SAVE_RESTORE
279 pr_warn("DPFP support broken in this kernel...\n");
282 #ifdef CONFIG_ARC_FPU_SAVE_RESTORE
283 panic("H/w lacks DPFP support, apps won't work\n");
289 * Initialize and setup the processor core
290 * This is called by all the CPUs thus should not do special case stuff
291 * such as only for boot CPU etc
294 void setup_processor(void)
297 int cpu_id = smp_processor_id();
299 read_arc_build_cfg_regs();
302 printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
308 printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
311 printk(arc_platform_smp_cpuinfo());
317 static inline int is_kernel(unsigned long addr)
319 if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
324 void __init setup_arch(char **cmdline_p)
326 /* make sure that uboot passed pointer to cmdline/dtb is valid */
327 if (uboot_tag && is_kernel((unsigned long)uboot_arg))
328 panic("Invalid uboot arg\n");
330 /* See if u-boot passed an external Device Tree blob */
331 machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */
333 /* No, so try the embedded one */
334 machine_desc = setup_machine_fdt(__dtb_start);
336 panic("Embedded DT invalid\n");
339 * If we are here, it is established that @uboot_arg didn't
340 * point to DT blob. Instead if u-boot says it is cmdline,
341 * Appent to embedded DT cmdline.
342 * setup_machine_fdt() would have populated @boot_command_line
344 if (uboot_tag == 1) {
345 /* Ensure a whitespace between the 2 cmdlines */
346 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
347 strlcat(boot_command_line, uboot_arg,
352 /* Save unparsed command line copy for /proc/cmdline */
353 *cmdline_p = boot_command_line;
355 /* To force early parsing of things like mem=xxx */
358 /* Platform/board specific: e.g. early console registration */
359 if (machine_desc->init_early)
360 machine_desc->init_early();
370 /* copy flat DT out of .init and then unflatten it */
371 unflatten_and_copy_device_tree();
373 /* Can be issue if someone passes cmd line arg "ro"
374 * But that is unlikely so keeping it as it is
376 root_mountflags &= ~MS_RDONLY;
378 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
379 conswitchp = &dummy_con;
386 static int __init customize_machine(void)
388 /* Add platform devices */
389 if (machine_desc->init_machine)
390 machine_desc->init_machine();
394 arch_initcall(customize_machine);
396 static int __init init_late_machine(void)
398 if (machine_desc->init_late)
399 machine_desc->init_late();
403 late_initcall(init_late_machine);
405 * Get CPU information for use by the procfs.
408 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
409 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
411 static int show_cpuinfo(struct seq_file *m, void *v)
414 int cpu_id = ptr_to_cpu(v);
416 str = (char *)__get_free_page(GFP_TEMPORARY);
420 seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
422 seq_printf(m, "Bogo MIPS : \t%lu.%02lu\n",
423 loops_per_jiffy / (500000 / HZ),
424 (loops_per_jiffy / (5000 / HZ)) % 100);
426 seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
428 seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
430 seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
433 seq_printf(m, arc_platform_smp_cpuinfo());
436 free_page((unsigned long)str);
438 seq_printf(m, "\n\n");
443 static void *c_start(struct seq_file *m, loff_t *pos)
446 * Callback returns cpu-id to iterator for show routine, NULL to stop.
447 * However since NULL is also a valid cpu-id (0), we use a round-about
448 * way to pass it w/o having to kmalloc/free a 2 byte string.
449 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
451 return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
454 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
457 return c_start(m, pos);
460 static void c_stop(struct seq_file *m, void *v)
464 const struct seq_operations cpuinfo_op = {
471 static DEFINE_PER_CPU(struct cpu, cpu_topology);
473 static int __init topology_init(void)
477 for_each_present_cpu(cpu)
478 register_cpu(&per_cpu(cpu_topology, cpu), cpu);
483 subsys_initcall(topology_init);