8 select SYS_SUPPORTS_APM_EMULATION
9 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_KPROBES if (!XIP_KERNEL)
13 select HAVE_KRETPROBES if (HAVE_KPROBES)
14 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
15 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
16 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
17 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
18 select HAVE_GENERIC_DMA_COHERENT
19 select HAVE_KERNEL_GZIP
20 select HAVE_KERNEL_LZO
21 select HAVE_KERNEL_LZMA
23 select HAVE_PERF_EVENTS
24 select PERF_USE_VMALLOC
25 select HAVE_REGS_AND_STACK_ACCESS_API
26 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
28 The ARM series is a line of low-power-consumption RISC chip designs
29 licensed by ARM Ltd and targeted at embedded applications and
30 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
31 manufactured, but legacy ARM-based PC hardware remains popular in
32 Europe. There is an ARM Linux project with a web page at
33 <http://www.arm.linux.org.uk/>.
38 config SYS_SUPPORTS_APM_EMULATION
41 config HAVE_SCHED_CLOCK
47 config ARCH_USES_GETTIMEOFFSET
51 config GENERIC_CLOCKEVENTS
54 config GENERIC_CLOCKEVENTS_BROADCAST
56 depends on GENERIC_CLOCKEVENTS
61 select GENERIC_ALLOCATOR
72 The Extended Industry Standard Architecture (EISA) bus was
73 developed as an open alternative to the IBM MicroChannel bus.
75 The EISA bus provided some of the features of the IBM MicroChannel
76 bus while maintaining backward compatibility with cards made for
77 the older ISA bus. The EISA bus saw limited use between 1988 and
78 1995 when it was made obsolete by the PCI bus.
80 Say Y here if you are building a kernel for an EISA-based machine.
90 MicroChannel Architecture is found in some IBM PS/2 machines and
91 laptops. It is a bus system similar to PCI or ISA. See
92 <file:Documentation/mca.txt> (and especially the web page given
93 there) before attempting to build an MCA bus kernel.
95 config GENERIC_HARDIRQS
99 config STACKTRACE_SUPPORT
103 config HAVE_LATENCYTOP_SUPPORT
108 config LOCKDEP_SUPPORT
112 config TRACE_IRQFLAGS_SUPPORT
116 config HARDIRQS_SW_RESEND
120 config GENERIC_IRQ_PROBE
124 config GENERIC_LOCKBREAK
127 depends on SMP && PREEMPT
129 config RWSEM_GENERIC_SPINLOCK
133 config RWSEM_XCHGADD_ALGORITHM
136 config ARCH_HAS_ILOG2_U32
139 config ARCH_HAS_ILOG2_U64
142 config ARCH_HAS_CPUFREQ
145 Internal node to signify that the ARCH has CPUFREQ support
146 and that the relevant menu configurations are displayed for
149 config ARCH_HAS_CPU_IDLE_WAIT
152 config GENERIC_HWEIGHT
156 config GENERIC_CALIBRATE_DELAY
160 config ARCH_MAY_HAVE_PC_FDC
166 config NEED_DMA_MAP_STATE
169 config GENERIC_ISA_DMA
178 config GENERIC_HARDIRQS_NO__DO_IRQ
181 config ARM_L1_CACHE_SHIFT_6
184 Setting ARM L1 cache line size to 64 Bytes.
188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
189 default DRAM_BASE if REMAP_VECTORS_TO_RAM
192 The base address of exception vectors.
194 source "init/Kconfig"
196 source "kernel/Kconfig.freezer"
201 bool "MMU-based Paged Memory Management Support"
204 Select if you want MMU-based virtualised addressing space
205 support by paged memory management. If unsure, say 'Y'.
208 # The "ARM system type" choice list is ordered alphabetically by option
209 # text. Please add new entries in the option alphabetic order.
212 prompt "ARM system type"
213 default ARCH_VERSATILE
216 bool "Agilent AAEC-2000 based"
220 select ARCH_USES_GETTIMEOFFSET
222 This enables support for systems based on the Agilent AAEC-2000
224 config ARCH_INTEGRATOR
225 bool "ARM Ltd. Integrator family"
227 select ARCH_HAS_CPUFREQ
230 select GENERIC_CLOCKEVENTS
231 select PLAT_VERSATILE
233 Support for ARM's Integrator platform.
236 bool "ARM Ltd. RealView family"
240 select GENERIC_CLOCKEVENTS
241 select ARCH_WANT_OPTIONAL_GPIOLIB
242 select PLAT_VERSATILE
243 select ARM_TIMER_SP804
244 select GPIO_PL061 if GPIOLIB
246 This enables support for ARM Ltd RealView boards.
248 config ARCH_VERSATILE
249 bool "ARM Ltd. Versatile family"
254 select GENERIC_CLOCKEVENTS
255 select ARCH_WANT_OPTIONAL_GPIOLIB
256 select PLAT_VERSATILE
257 select ARM_TIMER_SP804
259 This enables support for ARM Ltd Versatile board.
262 bool "ARM Ltd. Versatile Express family"
263 select ARCH_WANT_OPTIONAL_GPIOLIB
265 select ARM_TIMER_SP804
267 select GENERIC_CLOCKEVENTS
270 select PLAT_VERSATILE
272 This enables support for the ARM Ltd Versatile Express boards.
276 select ARCH_REQUIRE_GPIOLIB
279 This enables support for systems based on the Atmel AT91RM9200,
280 AT91SAM9 and AT91CAP9 processors.
283 bool "Broadcom BCMRING"
288 select GENERIC_CLOCKEVENTS
289 select ARCH_WANT_OPTIONAL_GPIOLIB
291 Support for Broadcom's BCMRing platform.
294 bool "Cirrus Logic CLPS711x/EP721x-based"
296 select ARCH_USES_GETTIMEOFFSET
298 Support for Cirrus Logic 711x/721x based boards.
301 bool "Cavium Networks CNS3XXX family"
303 select GENERIC_CLOCKEVENTS
305 select PCI_DOMAINS if PCI
307 Support for Cavium Networks CNS3XXX platform.
310 bool "Cortina Systems Gemini"
312 select ARCH_REQUIRE_GPIOLIB
313 select ARCH_USES_GETTIMEOFFSET
315 Support for the Cortina Systems Gemini family SoCs
322 select ARCH_USES_GETTIMEOFFSET
324 This is an evaluation board for the StrongARM processor available
325 from Digital. It has limited hardware on-board, including an
326 Ethernet interface, two PCMCIA sockets, two serial ports and a
335 select ARCH_REQUIRE_GPIOLIB
336 select ARCH_HAS_HOLES_MEMORYMODEL
337 select ARCH_USES_GETTIMEOFFSET
339 This enables support for the Cirrus EP93xx series of CPUs.
341 config ARCH_FOOTBRIDGE
345 select ARCH_USES_GETTIMEOFFSET
347 Support for systems based on the DC21285 companion chip
348 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
351 bool "Freescale MXC/iMX-based"
352 select GENERIC_CLOCKEVENTS
353 select ARCH_REQUIRE_GPIOLIB
356 Support for Freescale MXC/iMX-based family of processors
359 bool "Freescale STMP3xxx"
362 select ARCH_REQUIRE_GPIOLIB
363 select GENERIC_CLOCKEVENTS
364 select USB_ARCH_HAS_EHCI
366 Support for systems based on the Freescale 3xxx CPUs.
369 bool "Hilscher NetX based"
372 select GENERIC_CLOCKEVENTS
374 This enables support for systems based on the Hilscher NetX Soc
377 bool "Hynix HMS720x-based"
380 select ARCH_USES_GETTIMEOFFSET
382 This enables support for systems based on the Hynix HMS720x
390 select ARCH_SUPPORTS_MSI
393 Support for Intel's IOP13XX (XScale) family of processors.
401 select ARCH_REQUIRE_GPIOLIB
403 Support for Intel's 80219 and IOP32X (XScale) family of
412 select ARCH_REQUIRE_GPIOLIB
414 Support for Intel's IOP33X (XScale) family of processors.
421 select ARCH_USES_GETTIMEOFFSET
423 Support for Intel's IXP23xx (XScale) family of processors.
426 bool "IXP2400/2800-based"
430 select ARCH_USES_GETTIMEOFFSET
432 Support for Intel's IXP2400/2800 (XScale) family of processors.
439 select GENERIC_CLOCKEVENTS
440 select HAVE_SCHED_CLOCK
441 select DMABOUNCE if PCI
443 Support for Intel's IXP4XX (XScale) family of processors.
448 select ARCH_REQUIRE_GPIOLIB
449 select GENERIC_CLOCKEVENTS
452 Support for the Marvell Dove SoC 88AP510
455 bool "Marvell Kirkwood"
458 select ARCH_REQUIRE_GPIOLIB
459 select GENERIC_CLOCKEVENTS
462 Support for the following Marvell Kirkwood series SoCs:
463 88F6180, 88F6192 and 88F6281.
466 bool "Marvell Loki (88RC8480)"
468 select GENERIC_CLOCKEVENTS
471 Support for the Marvell Loki (88RC8480) SoC.
476 select ARCH_REQUIRE_GPIOLIB
479 select USB_ARCH_HAS_OHCI
482 select GENERIC_CLOCKEVENTS
484 Support for the NXP LPC32XX family of processors
487 bool "Marvell MV78xx0"
490 select ARCH_REQUIRE_GPIOLIB
491 select GENERIC_CLOCKEVENTS
494 Support for the following Marvell MV78xx0 series SoCs:
502 select ARCH_REQUIRE_GPIOLIB
503 select GENERIC_CLOCKEVENTS
506 Support for the following Marvell Orion 5x series SoCs:
507 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
508 Orion-2 (5281), Orion-1-90 (6183).
511 bool "Marvell PXA168/910/MMP2"
513 select ARCH_REQUIRE_GPIOLIB
515 select GENERIC_CLOCKEVENTS
516 select HAVE_SCHED_CLOCK
521 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
524 bool "Micrel/Kendin KS8695"
526 select ARCH_REQUIRE_GPIOLIB
527 select ARCH_USES_GETTIMEOFFSET
529 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
530 System-on-Chip devices.
533 bool "NetSilicon NS9xxx"
536 select GENERIC_CLOCKEVENTS
539 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
542 <http://www.digi.com/products/microprocessors/index.jsp>
545 bool "Nuvoton W90X900 CPU"
547 select ARCH_REQUIRE_GPIOLIB
549 select GENERIC_CLOCKEVENTS
551 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
552 At present, the w90x900 has been renamed nuc900, regarding
553 the ARM series product line, you can login the following
554 link address to know more.
556 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
557 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
560 bool "Nuvoton NUC93X CPU"
564 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
565 low-power and high performance MPEG-4/JPEG multimedia controller chip.
570 select GENERIC_CLOCKEVENTS
573 select HAVE_SCHED_CLOCK
575 select ARCH_HAS_BARRIERS if CACHE_L2X0
576 select ARCH_HAS_CPUFREQ
578 This enables support for NVIDIA Tegra based systems (Tegra APX,
579 Tegra 6xx and Tegra 2 series).
582 bool "Philips Nexperia PNX4008 Mobile"
585 select ARCH_USES_GETTIMEOFFSET
587 This enables support for Philips PNX4008 mobile platform.
590 bool "PXA2xx/PXA3xx-based"
593 select ARCH_HAS_CPUFREQ
595 select ARCH_REQUIRE_GPIOLIB
596 select GENERIC_CLOCKEVENTS
597 select HAVE_SCHED_CLOCK
602 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
607 select GENERIC_CLOCKEVENTS
608 select ARCH_REQUIRE_GPIOLIB
610 Support for Qualcomm MSM/QSD based systems. This runs on the
611 apps processor of the MSM/QSD and depends on a shared memory
612 interface to the modem processor which runs the baseband
613 stack and controls some vital subsystems
614 (clock and power control, etc).
617 bool "Renesas SH-Mobile"
619 Support for Renesas's SH-Mobile ARM platforms
626 select ARCH_MAY_HAVE_PC_FDC
627 select HAVE_PATA_PLATFORM
630 select ARCH_SPARSEMEM_ENABLE
631 select ARCH_USES_GETTIMEOFFSET
633 On the Acorn Risc-PC, Linux can support the internal IDE disk and
634 CD-ROM interface, serial and parallel port, and the floppy drive.
640 select ARCH_SPARSEMEM_ENABLE
642 select ARCH_HAS_CPUFREQ
644 select GENERIC_CLOCKEVENTS
646 select HAVE_SCHED_CLOCK
648 select ARCH_REQUIRE_GPIOLIB
650 Support for StrongARM 11x0 based boards.
653 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
655 select ARCH_HAS_CPUFREQ
657 select ARCH_USES_GETTIMEOFFSET
658 select HAVE_S3C2410_I2C if I2C
660 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
661 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
662 the Samsung SMDK2410 development board (and derivatives).
664 Note, the S3C2416 and the S3C2450 are so close that they even share
665 the same SoC ID code. This means that there is no seperate machine
666 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
669 bool "Samsung S3C64XX"
675 select ARCH_USES_GETTIMEOFFSET
676 select ARCH_HAS_CPUFREQ
677 select ARCH_REQUIRE_GPIOLIB
678 select SAMSUNG_CLKSRC
679 select SAMSUNG_IRQ_VIC_TIMER
680 select SAMSUNG_IRQ_UART
681 select S3C_GPIO_TRACK
682 select S3C_GPIO_PULL_UPDOWN
683 select S3C_GPIO_CFG_S3C24XX
684 select S3C_GPIO_CFG_S3C64XX
686 select USB_ARCH_HAS_OHCI
687 select SAMSUNG_GPIOLIB_4BIT
688 select HAVE_S3C2410_I2C if I2C
689 select HAVE_S3C2410_WATCHDOG if WATCHDOG
691 Samsung S3C64XX series based systems
694 bool "Samsung S5P6440 S5P6450"
698 select HAVE_S3C2410_WATCHDOG if WATCHDOG
699 select ARCH_USES_GETTIMEOFFSET
700 select HAVE_S3C2410_I2C if I2C
701 select HAVE_S3C_RTC if RTC_CLASS
703 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
707 bool "Samsung S5P6442"
711 select ARCH_USES_GETTIMEOFFSET
712 select HAVE_S3C2410_WATCHDOG if WATCHDOG
714 Samsung S5P6442 CPU based systems
717 bool "Samsung S5PC100"
721 select ARM_L1_CACHE_SHIFT_6
722 select ARCH_USES_GETTIMEOFFSET
723 select HAVE_S3C2410_I2C if I2C
724 select HAVE_S3C_RTC if RTC_CLASS
725 select HAVE_S3C2410_WATCHDOG if WATCHDOG
727 Samsung S5PC100 series based systems
730 bool "Samsung S5PV210/S5PC110"
732 select ARCH_SPARSEMEM_ENABLE
735 select ARM_L1_CACHE_SHIFT_6
736 select ARCH_HAS_CPUFREQ
737 select ARCH_USES_GETTIMEOFFSET
738 select HAVE_S3C2410_I2C if I2C
739 select HAVE_S3C_RTC if RTC_CLASS
740 select HAVE_S3C2410_WATCHDOG if WATCHDOG
742 Samsung S5PV210/S5PC110 series based systems
745 bool "Samsung S5PV310/S5PC210"
747 select ARCH_SPARSEMEM_ENABLE
750 select GENERIC_CLOCKEVENTS
751 select HAVE_S3C_RTC if RTC_CLASS
752 select HAVE_S3C2410_I2C if I2C
753 select HAVE_S3C2410_WATCHDOG if WATCHDOG
755 Samsung S5PV310 series based systems
764 select ARCH_USES_GETTIMEOFFSET
766 Support for the StrongARM based Digital DNARD machine, also known
767 as "Shark" (<http://www.shark-linux.de/shark.html>).
770 bool "Telechips TCC ARM926-based systems"
774 select GENERIC_CLOCKEVENTS
776 Support for Telechips TCC ARM926-based systems.
781 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
782 select ARCH_USES_GETTIMEOFFSET
784 Say Y here for systems based on one of the Sharp LH7A40X
785 System on a Chip processors. These CPUs include an ARM922T
786 core with a wide array of integrated devices for
787 hand-held and low-power applications.
790 bool "ST-Ericsson U300 Series"
793 select HAVE_SCHED_CLOCK
797 select GENERIC_CLOCKEVENTS
801 Support for ST-Ericsson U300 series mobile platforms.
804 bool "ST-Ericsson U8500 Series"
807 select GENERIC_CLOCKEVENTS
809 select ARCH_REQUIRE_GPIOLIB
811 Support for ST-Ericsson's Ux500 architecture
814 bool "STMicroelectronics Nomadik"
819 select GENERIC_CLOCKEVENTS
820 select ARCH_REQUIRE_GPIOLIB
822 Support for the Nomadik platform by ST-Ericsson
826 select GENERIC_CLOCKEVENTS
827 select ARCH_REQUIRE_GPIOLIB
831 select GENERIC_ALLOCATOR
832 select ARCH_HAS_HOLES_MEMORYMODEL
834 Support for TI's DaVinci platform.
839 select ARCH_REQUIRE_GPIOLIB
840 select ARCH_HAS_CPUFREQ
841 select GENERIC_CLOCKEVENTS
842 select ARCH_HAS_HOLES_MEMORYMODEL
844 Support for TI's OMAP platform (OMAP1/2/3/4).
849 select ARCH_REQUIRE_GPIOLIB
851 select GENERIC_CLOCKEVENTS
854 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
859 # This is sorted alphabetically by mach-* pathname. However, plat-*
860 # Kconfigs may be included either alphabetically (according to the
861 # plat- suffix) or along side the corresponding mach-* source.
863 source "arch/arm/mach-aaec2000/Kconfig"
865 source "arch/arm/mach-at91/Kconfig"
867 source "arch/arm/mach-bcmring/Kconfig"
869 source "arch/arm/mach-clps711x/Kconfig"
871 source "arch/arm/mach-cns3xxx/Kconfig"
873 source "arch/arm/mach-davinci/Kconfig"
875 source "arch/arm/mach-dove/Kconfig"
877 source "arch/arm/mach-ep93xx/Kconfig"
879 source "arch/arm/mach-footbridge/Kconfig"
881 source "arch/arm/mach-gemini/Kconfig"
883 source "arch/arm/mach-h720x/Kconfig"
885 source "arch/arm/mach-integrator/Kconfig"
887 source "arch/arm/mach-iop32x/Kconfig"
889 source "arch/arm/mach-iop33x/Kconfig"
891 source "arch/arm/mach-iop13xx/Kconfig"
893 source "arch/arm/mach-ixp4xx/Kconfig"
895 source "arch/arm/mach-ixp2000/Kconfig"
897 source "arch/arm/mach-ixp23xx/Kconfig"
899 source "arch/arm/mach-kirkwood/Kconfig"
901 source "arch/arm/mach-ks8695/Kconfig"
903 source "arch/arm/mach-lh7a40x/Kconfig"
905 source "arch/arm/mach-loki/Kconfig"
907 source "arch/arm/mach-lpc32xx/Kconfig"
909 source "arch/arm/mach-msm/Kconfig"
911 source "arch/arm/mach-mv78xx0/Kconfig"
913 source "arch/arm/plat-mxc/Kconfig"
915 source "arch/arm/mach-netx/Kconfig"
917 source "arch/arm/mach-nomadik/Kconfig"
918 source "arch/arm/plat-nomadik/Kconfig"
920 source "arch/arm/mach-ns9xxx/Kconfig"
922 source "arch/arm/mach-nuc93x/Kconfig"
924 source "arch/arm/plat-omap/Kconfig"
926 source "arch/arm/mach-omap1/Kconfig"
928 source "arch/arm/mach-omap2/Kconfig"
930 source "arch/arm/mach-orion5x/Kconfig"
932 source "arch/arm/mach-pxa/Kconfig"
933 source "arch/arm/plat-pxa/Kconfig"
935 source "arch/arm/mach-mmp/Kconfig"
937 source "arch/arm/mach-realview/Kconfig"
939 source "arch/arm/mach-sa1100/Kconfig"
941 source "arch/arm/plat-samsung/Kconfig"
942 source "arch/arm/plat-s3c24xx/Kconfig"
943 source "arch/arm/plat-s5p/Kconfig"
945 source "arch/arm/plat-spear/Kconfig"
947 source "arch/arm/plat-tcc/Kconfig"
950 source "arch/arm/mach-s3c2400/Kconfig"
951 source "arch/arm/mach-s3c2410/Kconfig"
952 source "arch/arm/mach-s3c2412/Kconfig"
953 source "arch/arm/mach-s3c2416/Kconfig"
954 source "arch/arm/mach-s3c2440/Kconfig"
955 source "arch/arm/mach-s3c2443/Kconfig"
959 source "arch/arm/mach-s3c64xx/Kconfig"
962 source "arch/arm/mach-s5p64x0/Kconfig"
964 source "arch/arm/mach-s5p6442/Kconfig"
966 source "arch/arm/mach-s5pc100/Kconfig"
968 source "arch/arm/mach-s5pv210/Kconfig"
970 source "arch/arm/mach-s5pv310/Kconfig"
972 source "arch/arm/mach-shmobile/Kconfig"
974 source "arch/arm/plat-stmp3xxx/Kconfig"
976 source "arch/arm/mach-tegra/Kconfig"
978 source "arch/arm/mach-u300/Kconfig"
980 source "arch/arm/mach-ux500/Kconfig"
982 source "arch/arm/mach-versatile/Kconfig"
984 source "arch/arm/mach-vexpress/Kconfig"
986 source "arch/arm/mach-w90x900/Kconfig"
988 # Definitions to make life easier
994 select GENERIC_CLOCKEVENTS
1002 config PLAT_VERSATILE
1005 config ARM_TIMER_SP804
1008 source arch/arm/mm/Kconfig
1011 bool "Enable iWMMXt support"
1012 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
1013 default y if PXA27x || PXA3xx || ARCH_MMP
1015 Enable support for iWMMXt context switching at run time if
1016 running on a CPU that supports it.
1018 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1021 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1025 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1026 (!ARCH_OMAP3 || OMAP3_EMU)
1031 source "arch/arm/Kconfig-nommu"
1034 config ARM_ERRATA_411920
1035 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1038 Invalidation of the Instruction Cache operation can
1039 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1040 It does not affect the MPCore. This option enables the ARM Ltd.
1041 recommended workaround.
1043 config ARM_ERRATA_430973
1044 bool "ARM errata: Stale prediction on replaced interworking branch"
1047 This option enables the workaround for the 430973 Cortex-A8
1048 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1049 interworking branch is replaced with another code sequence at the
1050 same virtual address, whether due to self-modifying code or virtual
1051 to physical address re-mapping, Cortex-A8 does not recover from the
1052 stale interworking branch prediction. This results in Cortex-A8
1053 executing the new code sequence in the incorrect ARM or Thumb state.
1054 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1055 and also flushes the branch target cache at every context switch.
1056 Note that setting specific bits in the ACTLR register may not be
1057 available in non-secure mode.
1059 config ARM_ERRATA_458693
1060 bool "ARM errata: Processor deadlock when a false hazard is created"
1063 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1064 erratum. For very specific sequences of memory operations, it is
1065 possible for a hazard condition intended for a cache line to instead
1066 be incorrectly associated with a different cache line. This false
1067 hazard might then cause a processor deadlock. The workaround enables
1068 the L1 caching of the NEON accesses and disables the PLD instruction
1069 in the ACTLR register. Note that setting specific bits in the ACTLR
1070 register may not be available in non-secure mode.
1072 config ARM_ERRATA_460075
1073 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1076 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1077 erratum. Any asynchronous access to the L2 cache may encounter a
1078 situation in which recent store transactions to the L2 cache are lost
1079 and overwritten with stale memory contents from external memory. The
1080 workaround disables the write-allocate mode for the L2 cache via the
1081 ACTLR register. Note that setting specific bits in the ACTLR register
1082 may not be available in non-secure mode.
1084 config ARM_ERRATA_742230
1085 bool "ARM errata: DMB operation may be faulty"
1086 depends on CPU_V7 && SMP
1088 This option enables the workaround for the 742230 Cortex-A9
1089 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1090 between two write operations may not ensure the correct visibility
1091 ordering of the two writes. This workaround sets a specific bit in
1092 the diagnostic register of the Cortex-A9 which causes the DMB
1093 instruction to behave as a DSB, ensuring the correct behaviour of
1096 config ARM_ERRATA_742231
1097 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1098 depends on CPU_V7 && SMP
1100 This option enables the workaround for the 742231 Cortex-A9
1101 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1102 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1103 accessing some data located in the same cache line, may get corrupted
1104 data due to bad handling of the address hazard when the line gets
1105 replaced from one of the CPUs at the same time as another CPU is
1106 accessing it. This workaround sets specific bits in the diagnostic
1107 register of the Cortex-A9 which reduces the linefill issuing
1108 capabilities of the processor.
1110 config PL310_ERRATA_588369
1111 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1112 depends on CACHE_L2X0 && ARCH_OMAP4
1114 The PL310 L2 cache controller implements three types of Clean &
1115 Invalidate maintenance operations: by Physical Address
1116 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1117 They are architecturally defined to behave as the execution of a
1118 clean operation followed immediately by an invalidate operation,
1119 both performing to the same memory location. This functionality
1120 is not correctly implemented in PL310 as clean lines are not
1121 invalidated as a result of these operations. Note that this errata
1122 uses Texas Instrument's secure monitor api.
1124 config ARM_ERRATA_720789
1125 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1126 depends on CPU_V7 && SMP
1128 This option enables the workaround for the 720789 Cortex-A9 (prior to
1129 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1130 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1131 As a consequence of this erratum, some TLB entries which should be
1132 invalidated are not, resulting in an incoherency in the system page
1133 tables. The workaround changes the TLB flushing routines to invalidate
1134 entries regardless of the ASID.
1136 config ARM_ERRATA_743622
1137 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1140 This option enables the workaround for the 743622 Cortex-A9
1141 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1142 optimisation in the Cortex-A9 Store Buffer may lead to data
1143 corruption. This workaround sets a specific bit in the diagnostic
1144 register of the Cortex-A9 which disables the Store Buffer
1145 optimisation, preventing the defect from occurring. This has no
1146 visible impact on the overall performance or power consumption of the
1151 source "arch/arm/common/Kconfig"
1161 Find out whether you have ISA slots on your motherboard. ISA is the
1162 name of a bus system, i.e. the way the CPU talks to the other stuff
1163 inside your box. Other bus systems are PCI, EISA, MicroChannel
1164 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1165 newer boards don't support it. If you have ISA, say Y, otherwise N.
1167 # Select ISA DMA controller support
1172 # Select ISA DMA interface
1177 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1179 Find out whether you have a PCI motherboard. PCI is the name of a
1180 bus system, i.e. the way the CPU talks to the other stuff inside
1181 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1182 VESA. If you have PCI, say Y, otherwise N.
1191 # Select the host bridge type
1192 config PCI_HOST_VIA82C505
1194 depends on PCI && ARCH_SHARK
1197 config PCI_HOST_ITE8152
1199 depends on PCI && MACH_ARMCORE
1203 source "drivers/pci/Kconfig"
1205 source "drivers/pcmcia/Kconfig"
1209 menu "Kernel Features"
1211 source "kernel/time/Kconfig"
1214 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1215 depends on EXPERIMENTAL
1216 depends on GENERIC_CLOCKEVENTS
1217 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1218 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1219 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1221 select USE_GENERIC_SMP_HELPERS
1222 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1224 This enables support for systems with more than one CPU. If you have
1225 a system with only one CPU, like most personal computers, say N. If
1226 you have a system with more than one CPU, say Y.
1228 If you say N here, the kernel will run on single and multiprocessor
1229 machines, but will use only one CPU of a multiprocessor machine. If
1230 you say Y here, the kernel will run on many, but not all, single
1231 processor machines. On a single processor machine, the kernel will
1232 run faster if you say N here.
1234 See also <file:Documentation/i386/IO-APIC.txt>,
1235 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1236 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1238 If you don't know what to do here, say N.
1241 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1242 depends on EXPERIMENTAL
1243 depends on SMP && !XIP && !THUMB2_KERNEL
1246 SMP kernels contain instructions which fail on non-SMP processors.
1247 Enabling this option allows the kernel to modify itself to make
1248 these instructions safe. Disabling it allows about 1K of space
1251 If you don't know what to do here, say Y.
1257 This option enables support for the ARM system coherency unit
1263 This options enables support for the ARM timer and watchdog unit
1266 prompt "Memory split"
1269 Select the desired split between kernel and user memory.
1271 If you are not absolutely sure what you are doing, leave this
1275 bool "3G/1G user/kernel split"
1277 bool "2G/2G user/kernel split"
1279 bool "1G/3G user/kernel split"
1284 default 0x40000000 if VMSPLIT_1G
1285 default 0x80000000 if VMSPLIT_2G
1289 int "Maximum number of CPUs (2-32)"
1295 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1296 depends on SMP && HOTPLUG && EXPERIMENTAL
1297 depends on !ARCH_MSM
1299 Say Y here to experiment with turning CPUs off and on. CPUs
1300 can be controlled through /sys/devices/system/cpu.
1303 bool "Use local timer interrupts"
1306 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
1308 Enable support for local timers on SMP platforms, rather then the
1309 legacy IPI broadcast method. Local timers allows the system
1310 accounting to be spread across the timer interval, preventing a
1311 "thundering herd" at every timer tick.
1313 source kernel/Kconfig.preempt
1317 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1318 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1319 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1320 default AT91_TIMER_HZ if ARCH_AT91
1321 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1324 config THUMB2_KERNEL
1325 bool "Compile the kernel in Thumb-2 mode"
1326 depends on CPU_V7 && EXPERIMENTAL
1328 select ARM_ASM_UNIFIED
1330 By enabling this option, the kernel will be compiled in
1331 Thumb-2 mode. A compiler/assembler that understand the unified
1332 ARM-Thumb syntax is needed.
1336 config ARM_ASM_UNIFIED
1340 bool "Use the ARM EABI to compile the kernel"
1342 This option allows for the kernel to be compiled using the latest
1343 ARM ABI (aka EABI). This is only useful if you are using a user
1344 space environment that is also compiled with EABI.
1346 Since there are major incompatibilities between the legacy ABI and
1347 EABI, especially with regard to structure member alignment, this
1348 option also changes the kernel syscall calling convention to
1349 disambiguate both ABIs and allow for backward compatibility support
1350 (selected with CONFIG_OABI_COMPAT).
1352 To use this you need GCC version 4.0.0 or later.
1355 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1356 depends on AEABI && EXPERIMENTAL
1359 This option preserves the old syscall interface along with the
1360 new (ARM EABI) one. It also provides a compatibility layer to
1361 intercept syscalls that have structure arguments which layout
1362 in memory differs between the legacy ABI and the new ARM EABI
1363 (only for non "thumb" binaries). This option adds a tiny
1364 overhead to all syscalls and produces a slightly larger kernel.
1365 If you know you'll be using only pure EABI user space then you
1366 can say N here. If this option is not selected and you attempt
1367 to execute a legacy ABI binary then the result will be
1368 UNPREDICTABLE (in fact it can be predicted that it won't work
1369 at all). If in doubt say Y.
1371 config ARCH_HAS_HOLES_MEMORYMODEL
1374 config ARCH_SPARSEMEM_ENABLE
1377 config ARCH_SPARSEMEM_DEFAULT
1378 def_bool ARCH_SPARSEMEM_ENABLE
1380 config ARCH_SELECT_MEMORY_MODEL
1381 def_bool ARCH_SPARSEMEM_ENABLE
1384 bool "High Memory Support (EXPERIMENTAL)"
1385 depends on MMU && EXPERIMENTAL
1387 The address space of ARM processors is only 4 Gigabytes large
1388 and it has to accommodate user address space, kernel address
1389 space as well as some memory mapped IO. That means that, if you
1390 have a large amount of physical memory and/or IO, not all of the
1391 memory can be "permanently mapped" by the kernel. The physical
1392 memory that is not permanently mapped is called "high memory".
1394 Depending on the selected kernel/user memory split, minimum
1395 vmalloc space and actual amount of RAM, you may not need this
1396 option which should result in a slightly faster kernel.
1401 bool "Allocate 2nd-level pagetables from highmem"
1403 depends on !OUTER_CACHE
1405 config HW_PERF_EVENTS
1406 bool "Enable hardware performance counter support for perf events"
1407 depends on PERF_EVENTS && CPU_HAS_PMU
1410 Enable hardware performance counter support for perf events. If
1411 disabled, perf events will use software events only.
1416 This enables support for sparse irqs. This is useful in general
1417 as most CPUs have a fairly sparse array of IRQ vectors, which
1418 the irq_desc then maps directly on to. Systems with a high
1419 number of off-chip IRQs will want to treat this as
1420 experimental until they have been independently verified.
1424 config FORCE_MAX_ZONEORDER
1425 int "Maximum zone order" if ARCH_SHMOBILE
1426 range 11 64 if ARCH_SHMOBILE
1427 default "9" if SA1111
1430 The kernel memory allocator divides physically contiguous memory
1431 blocks into "zones", where each zone is a power of two number of
1432 pages. This option selects the largest power of two that the kernel
1433 keeps in the memory allocator. If you need to allocate very large
1434 blocks of physically contiguous memory, then you may need to
1435 increase this value.
1437 This config option is actually maximum order plus one. For example,
1438 a value of 11 means that the largest free memory block is 2^10 pages.
1441 bool "Timer and CPU usage LEDs"
1442 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1443 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1444 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1445 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1446 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1447 ARCH_AT91 || ARCH_DAVINCI || \
1448 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1450 If you say Y here, the LEDs on your machine will be used
1451 to provide useful information about your current system status.
1453 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1454 be able to select which LEDs are active using the options below. If
1455 you are compiling a kernel for the EBSA-110 or the LART however, the
1456 red LED will simply flash regularly to indicate that the system is
1457 still functional. It is safe to say Y here if you have a CATS
1458 system, but the driver will do nothing.
1461 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1462 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1463 || MACH_OMAP_PERSEUS2
1465 depends on !GENERIC_CLOCKEVENTS
1466 default y if ARCH_EBSA110
1468 If you say Y here, one of the system LEDs (the green one on the
1469 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1470 will flash regularly to indicate that the system is still
1471 operational. This is mainly useful to kernel hackers who are
1472 debugging unstable kernels.
1474 The LART uses the same LED for both Timer LED and CPU usage LED
1475 functions. You may choose to use both, but the Timer LED function
1476 will overrule the CPU usage LED.
1479 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1481 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1482 || MACH_OMAP_PERSEUS2
1485 If you say Y here, the red LED will be used to give a good real
1486 time indication of CPU usage, by lighting whenever the idle task
1487 is not currently executing.
1489 The LART uses the same LED for both Timer LED and CPU usage LED
1490 functions. You may choose to use both, but the Timer LED function
1491 will overrule the CPU usage LED.
1493 config ALIGNMENT_TRAP
1495 depends on CPU_CP15_MMU
1496 default y if !ARCH_EBSA110
1497 select HAVE_PROC_CPU if PROC_FS
1499 ARM processors cannot fetch/store information which is not
1500 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1501 address divisible by 4. On 32-bit ARM processors, these non-aligned
1502 fetch/store instructions will be emulated in software if you say
1503 here, which has a severe performance impact. This is necessary for
1504 correct operation of some network protocols. With an IP-only
1505 configuration it is safe to say N, otherwise say Y.
1507 config UACCESS_WITH_MEMCPY
1508 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1509 depends on MMU && EXPERIMENTAL
1510 default y if CPU_FEROCEON
1512 Implement faster copy_to_user and clear_user methods for CPU
1513 cores where a 8-word STM instruction give significantly higher
1514 memory write throughput than a sequence of individual 32bit stores.
1516 A possible side effect is a slight increase in scheduling latency
1517 between threads sharing the same address space if they invoke
1518 such copy operations with large buffers.
1520 However, if the CPU data cache is using a write-allocate mode,
1521 this option is unlikely to provide any performance gain.
1525 prompt "Enable seccomp to safely compute untrusted bytecode"
1527 This kernel feature is useful for number crunching applications
1528 that may need to compute untrusted bytecode during their
1529 execution. By using pipes or other transports made available to
1530 the process as file descriptors supporting the read/write
1531 syscalls, it's possible to isolate those applications in
1532 their own address space using seccomp. Once seccomp is
1533 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1534 and the task is only allowed to execute a few safe syscalls
1535 defined by each seccomp mode.
1537 config CC_STACKPROTECTOR
1538 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1540 This option turns on the -fstack-protector GCC feature. This
1541 feature puts, at the beginning of functions, a canary value on
1542 the stack just before the return address, and validates
1543 the value just before actually returning. Stack based buffer
1544 overflows (that need to overwrite this return address) now also
1545 overwrite the canary, which gets detected and the attack is then
1546 neutralized via a kernel panic.
1547 This feature requires gcc version 4.2 or above.
1549 config DEPRECATED_PARAM_STRUCT
1550 bool "Provide old way to pass kernel parameters"
1552 This was deprecated in 2001 and announced to live on for 5 years.
1553 Some old boot loaders still use this way.
1559 # Compressed boot loader in ROM. Yes, we really want to ask about
1560 # TEXT and BSS so we preserve their values in the config files.
1561 config ZBOOT_ROM_TEXT
1562 hex "Compressed ROM boot loader base address"
1565 The physical address at which the ROM-able zImage is to be
1566 placed in the target. Platforms which normally make use of
1567 ROM-able zImage formats normally set this to a suitable
1568 value in their defconfig file.
1570 If ZBOOT_ROM is not enabled, this has no effect.
1572 config ZBOOT_ROM_BSS
1573 hex "Compressed ROM boot loader BSS address"
1576 The base address of an area of read/write memory in the target
1577 for the ROM-able zImage which must be available while the
1578 decompressor is running. It must be large enough to hold the
1579 entire decompressed kernel plus an additional 128 KiB.
1580 Platforms which normally make use of ROM-able zImage formats
1581 normally set this to a suitable value in their defconfig file.
1583 If ZBOOT_ROM is not enabled, this has no effect.
1586 bool "Compressed boot loader in ROM/flash"
1587 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1589 Say Y here if you intend to execute your compressed kernel image
1590 (zImage) directly from ROM or flash. If unsure, say N.
1593 string "Default kernel command string"
1596 On some architectures (EBSA110 and CATS), there is currently no way
1597 for the boot loader to pass arguments to the kernel. For these
1598 architectures, you should supply some command-line options at build
1599 time by entering them here. As a minimum, you should specify the
1600 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1602 config CMDLINE_FORCE
1603 bool "Always use the default kernel command string"
1604 depends on CMDLINE != ""
1606 Always use the default kernel command string, even if the boot
1607 loader passes other arguments to the kernel.
1608 This is useful if you cannot or don't want to change the
1609 command-line options your boot loader passes to the kernel.
1614 bool "Kernel Execute-In-Place from ROM"
1615 depends on !ZBOOT_ROM
1617 Execute-In-Place allows the kernel to run from non-volatile storage
1618 directly addressable by the CPU, such as NOR flash. This saves RAM
1619 space since the text section of the kernel is not loaded from flash
1620 to RAM. Read-write sections, such as the data section and stack,
1621 are still copied to RAM. The XIP kernel is not compressed since
1622 it has to run directly from flash, so it will take more space to
1623 store it. The flash address used to link the kernel object files,
1624 and for storing it, is configuration dependent. Therefore, if you
1625 say Y here, you must know the proper physical address where to
1626 store the kernel image depending on your own flash memory usage.
1628 Also note that the make target becomes "make xipImage" rather than
1629 "make zImage" or "make Image". The final kernel binary to put in
1630 ROM memory will be arch/arm/boot/xipImage.
1634 config XIP_PHYS_ADDR
1635 hex "XIP Kernel Physical Location"
1636 depends on XIP_KERNEL
1637 default "0x00080000"
1639 This is the physical address in your flash memory the kernel will
1640 be linked for and stored to. This address is dependent on your
1644 bool "Kexec system call (EXPERIMENTAL)"
1645 depends on EXPERIMENTAL
1647 kexec is a system call that implements the ability to shutdown your
1648 current kernel, and to start another kernel. It is like a reboot
1649 but it is independent of the system firmware. And like a reboot
1650 you can start any kernel with it, not just Linux.
1652 It is an ongoing process to be certain the hardware in a machine
1653 is properly shutdown, so do not be surprised if this code does not
1654 initially work for you. It may help to enable device hotplugging
1658 bool "Export atags in procfs"
1662 Should the atags used to boot the kernel be exported in an "atags"
1663 file in procfs. Useful with kexec.
1665 config AUTO_ZRELADDR
1666 bool "Auto calculation of the decompressed kernel image address"
1667 depends on !ZBOOT_ROM && !ARCH_U300
1669 ZRELADDR is the physical address where the decompressed kernel
1670 image will be placed. If AUTO_ZRELADDR is selected, the address
1671 will be determined at run-time by masking the current IP with
1672 0xf8000000. This assumes the zImage being placed in the first 128MB
1673 from start of memory.
1677 menu "CPU Power Management"
1681 source "drivers/cpufreq/Kconfig"
1684 tristate "CPUfreq driver for i.MX CPUs"
1685 depends on ARCH_MXC && CPU_FREQ
1687 This enables the CPUfreq driver for i.MX CPUs.
1689 config CPU_FREQ_SA1100
1692 config CPU_FREQ_SA1110
1695 config CPU_FREQ_INTEGRATOR
1696 tristate "CPUfreq driver for ARM Integrator CPUs"
1697 depends on ARCH_INTEGRATOR && CPU_FREQ
1700 This enables the CPUfreq driver for ARM Integrator CPUs.
1702 For details, take a look at <file:Documentation/cpu-freq>.
1708 depends on CPU_FREQ && ARCH_PXA && PXA25x
1710 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1712 config CPU_FREQ_S3C64XX
1713 bool "CPUfreq support for Samsung S3C64XX CPUs"
1714 depends on CPU_FREQ && CPU_S3C6410
1719 Internal configuration node for common cpufreq on Samsung SoC
1721 config CPU_FREQ_S3C24XX
1722 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1723 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1726 This enables the CPUfreq driver for the Samsung S3C24XX family
1729 For details, take a look at <file:Documentation/cpu-freq>.
1733 config CPU_FREQ_S3C24XX_PLL
1734 bool "Support CPUfreq changing of PLL frequency"
1735 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1737 Compile in support for changing the PLL frequency from the
1738 S3C24XX series CPUfreq driver. The PLL takes time to settle
1739 after a frequency change, so by default it is not enabled.
1741 This also means that the PLL tables for the selected CPU(s) will
1742 be built which may increase the size of the kernel image.
1744 config CPU_FREQ_S3C24XX_DEBUG
1745 bool "Debug CPUfreq Samsung driver core"
1746 depends on CPU_FREQ_S3C24XX
1748 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1750 config CPU_FREQ_S3C24XX_IODEBUG
1751 bool "Debug CPUfreq Samsung driver IO timing"
1752 depends on CPU_FREQ_S3C24XX
1754 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1756 config CPU_FREQ_S3C24XX_DEBUGFS
1757 bool "Export debugfs for CPUFreq"
1758 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1760 Export status information via debugfs.
1764 source "drivers/cpuidle/Kconfig"
1768 menu "Floating point emulation"
1770 comment "At least one emulation must be selected"
1773 bool "NWFPE math emulation"
1774 depends on !AEABI || OABI_COMPAT
1776 Say Y to include the NWFPE floating point emulator in the kernel.
1777 This is necessary to run most binaries. Linux does not currently
1778 support floating point hardware so you need to say Y here even if
1779 your machine has an FPA or floating point co-processor podule.
1781 You may say N here if you are going to load the Acorn FPEmulator
1782 early in the bootup.
1785 bool "Support extended precision"
1786 depends on FPE_NWFPE
1788 Say Y to include 80-bit support in the kernel floating-point
1789 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1790 Note that gcc does not generate 80-bit operations by default,
1791 so in most cases this option only enlarges the size of the
1792 floating point emulator without any good reason.
1794 You almost surely want to say N here.
1797 bool "FastFPE math emulation (EXPERIMENTAL)"
1798 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1800 Say Y here to include the FAST floating point emulator in the kernel.
1801 This is an experimental much faster emulator which now also has full
1802 precision for the mantissa. It does not support any exceptions.
1803 It is very simple, and approximately 3-6 times faster than NWFPE.
1805 It should be sufficient for most programs. It may be not suitable
1806 for scientific calculations, but you have to check this for yourself.
1807 If you do not feel you need a faster FP emulation you should better
1811 bool "VFP-format floating point maths"
1812 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1814 Say Y to include VFP support code in the kernel. This is needed
1815 if your hardware includes a VFP unit.
1817 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1818 release notes and additional status information.
1820 Say N if your target does not have VFP hardware.
1828 bool "Advanced SIMD (NEON) Extension support"
1829 depends on VFPv3 && CPU_V7
1831 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1836 menu "Userspace binary formats"
1838 source "fs/Kconfig.binfmt"
1841 tristate "RISC OS personality"
1844 Say Y here to include the kernel code necessary if you want to run
1845 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1846 experimental; if this sounds frightening, say N and sleep in peace.
1847 You can also say M here to compile this support as a module (which
1848 will be called arthur).
1852 menu "Power management options"
1854 source "kernel/power/Kconfig"
1856 config ARCH_SUSPEND_POSSIBLE
1861 source "net/Kconfig"
1863 source "drivers/Kconfig"
1867 source "arch/arm/Kconfig.debug"
1869 source "security/Kconfig"
1871 source "crypto/Kconfig"
1873 source "lib/Kconfig"