8 select SYS_SUPPORTS_APM_EMULATION
9 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_KPROBES if (!XIP_KERNEL)
13 select HAVE_KRETPROBES if (HAVE_KPROBES)
14 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
15 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
16 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
17 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
18 select HAVE_GENERIC_DMA_COHERENT
19 select HAVE_KERNEL_GZIP
20 select HAVE_KERNEL_LZO
21 select HAVE_KERNEL_LZMA
23 select HAVE_PERF_EVENTS
24 select PERF_USE_VMALLOC
25 select HAVE_REGS_AND_STACK_ACCESS_API
26 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
28 The ARM series is a line of low-power-consumption RISC chip designs
29 licensed by ARM Ltd and targeted at embedded applications and
30 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
31 manufactured, but legacy ARM-based PC hardware remains popular in
32 Europe. There is an ARM Linux project with a web page at
33 <http://www.arm.linux.org.uk/>.
38 config SYS_SUPPORTS_APM_EMULATION
41 config HAVE_SCHED_CLOCK
47 config ARCH_USES_GETTIMEOFFSET
51 config GENERIC_CLOCKEVENTS
54 config GENERIC_CLOCKEVENTS_BROADCAST
56 depends on GENERIC_CLOCKEVENTS
61 select GENERIC_ALLOCATOR
72 The Extended Industry Standard Architecture (EISA) bus was
73 developed as an open alternative to the IBM MicroChannel bus.
75 The EISA bus provided some of the features of the IBM MicroChannel
76 bus while maintaining backward compatibility with cards made for
77 the older ISA bus. The EISA bus saw limited use between 1988 and
78 1995 when it was made obsolete by the PCI bus.
80 Say Y here if you are building a kernel for an EISA-based machine.
90 MicroChannel Architecture is found in some IBM PS/2 machines and
91 laptops. It is a bus system similar to PCI or ISA. See
92 <file:Documentation/mca.txt> (and especially the web page given
93 there) before attempting to build an MCA bus kernel.
95 config GENERIC_HARDIRQS
99 config STACKTRACE_SUPPORT
103 config HAVE_LATENCYTOP_SUPPORT
108 config LOCKDEP_SUPPORT
112 config TRACE_IRQFLAGS_SUPPORT
116 config HARDIRQS_SW_RESEND
120 config GENERIC_IRQ_PROBE
124 config GENERIC_LOCKBREAK
127 depends on SMP && PREEMPT
129 config RWSEM_GENERIC_SPINLOCK
133 config RWSEM_XCHGADD_ALGORITHM
136 config ARCH_HAS_ILOG2_U32
139 config ARCH_HAS_ILOG2_U64
142 config ARCH_HAS_CPUFREQ
145 Internal node to signify that the ARCH has CPUFREQ support
146 and that the relevant menu configurations are displayed for
149 config ARCH_HAS_CPU_IDLE_WAIT
152 config GENERIC_HWEIGHT
156 config GENERIC_CALIBRATE_DELAY
160 config ARCH_MAY_HAVE_PC_FDC
166 config NEED_DMA_MAP_STATE
169 config GENERIC_ISA_DMA
178 config GENERIC_HARDIRQS_NO__DO_IRQ
181 config ARM_L1_CACHE_SHIFT_6
184 Setting ARM L1 cache line size to 64 Bytes.
188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
189 default DRAM_BASE if REMAP_VECTORS_TO_RAM
192 The base address of exception vectors.
194 source "init/Kconfig"
196 source "kernel/Kconfig.freezer"
201 bool "MMU-based Paged Memory Management Support"
204 Select if you want MMU-based virtualised addressing space
205 support by paged memory management. If unsure, say 'Y'.
208 # The "ARM system type" choice list is ordered alphabetically by option
209 # text. Please add new entries in the option alphabetic order.
212 prompt "ARM system type"
213 default ARCH_VERSATILE
216 bool "Agilent AAEC-2000 based"
220 select ARCH_USES_GETTIMEOFFSET
222 This enables support for systems based on the Agilent AAEC-2000
224 config ARCH_INTEGRATOR
225 bool "ARM Ltd. Integrator family"
227 select ARCH_HAS_CPUFREQ
230 select GENERIC_CLOCKEVENTS
231 select PLAT_VERSATILE
233 Support for ARM's Integrator platform.
236 bool "ARM Ltd. RealView family"
240 select GENERIC_CLOCKEVENTS
241 select ARCH_WANT_OPTIONAL_GPIOLIB
242 select PLAT_VERSATILE
243 select ARM_TIMER_SP804
244 select GPIO_PL061 if GPIOLIB
246 This enables support for ARM Ltd RealView boards.
248 config ARCH_VERSATILE
249 bool "ARM Ltd. Versatile family"
254 select GENERIC_CLOCKEVENTS
255 select ARCH_WANT_OPTIONAL_GPIOLIB
256 select PLAT_VERSATILE
257 select ARM_TIMER_SP804
259 This enables support for ARM Ltd Versatile board.
262 bool "ARM Ltd. Versatile Express family"
263 select ARCH_WANT_OPTIONAL_GPIOLIB
265 select ARM_TIMER_SP804
267 select GENERIC_CLOCKEVENTS
270 select PLAT_VERSATILE
272 This enables support for the ARM Ltd Versatile Express boards.
276 select ARCH_REQUIRE_GPIOLIB
279 This enables support for systems based on the Atmel AT91RM9200,
280 AT91SAM9 and AT91CAP9 processors.
283 bool "Broadcom BCMRING"
288 select GENERIC_CLOCKEVENTS
289 select ARCH_WANT_OPTIONAL_GPIOLIB
291 Support for Broadcom's BCMRing platform.
294 bool "Cirrus Logic CLPS711x/EP721x-based"
296 select ARCH_USES_GETTIMEOFFSET
298 Support for Cirrus Logic 711x/721x based boards.
301 bool "Cavium Networks CNS3XXX family"
303 select GENERIC_CLOCKEVENTS
305 select PCI_DOMAINS if PCI
307 Support for Cavium Networks CNS3XXX platform.
310 bool "Cortina Systems Gemini"
312 select ARCH_REQUIRE_GPIOLIB
313 select ARCH_USES_GETTIMEOFFSET
315 Support for the Cortina Systems Gemini family SoCs
322 select ARCH_USES_GETTIMEOFFSET
324 This is an evaluation board for the StrongARM processor available
325 from Digital. It has limited hardware on-board, including an
326 Ethernet interface, two PCMCIA sockets, two serial ports and a
335 select ARCH_REQUIRE_GPIOLIB
336 select ARCH_HAS_HOLES_MEMORYMODEL
337 select ARCH_USES_GETTIMEOFFSET
339 This enables support for the Cirrus EP93xx series of CPUs.
341 config ARCH_FOOTBRIDGE
345 select ARCH_USES_GETTIMEOFFSET
347 Support for systems based on the DC21285 companion chip
348 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
351 bool "Freescale MXC/iMX-based"
352 select GENERIC_CLOCKEVENTS
353 select ARCH_REQUIRE_GPIOLIB
356 Support for Freescale MXC/iMX-based family of processors
359 bool "Freescale STMP3xxx"
362 select ARCH_REQUIRE_GPIOLIB
363 select GENERIC_CLOCKEVENTS
364 select USB_ARCH_HAS_EHCI
366 Support for systems based on the Freescale 3xxx CPUs.
369 bool "Hilscher NetX based"
372 select GENERIC_CLOCKEVENTS
374 This enables support for systems based on the Hilscher NetX Soc
377 bool "Hynix HMS720x-based"
380 select ARCH_USES_GETTIMEOFFSET
382 This enables support for systems based on the Hynix HMS720x
390 select ARCH_SUPPORTS_MSI
393 Support for Intel's IOP13XX (XScale) family of processors.
401 select ARCH_REQUIRE_GPIOLIB
403 Support for Intel's 80219 and IOP32X (XScale) family of
412 select ARCH_REQUIRE_GPIOLIB
414 Support for Intel's IOP33X (XScale) family of processors.
421 select ARCH_USES_GETTIMEOFFSET
423 Support for Intel's IXP23xx (XScale) family of processors.
426 bool "IXP2400/2800-based"
430 select ARCH_USES_GETTIMEOFFSET
432 Support for Intel's IXP2400/2800 (XScale) family of processors.
439 select GENERIC_CLOCKEVENTS
440 select DMABOUNCE if PCI
442 Support for Intel's IXP4XX (XScale) family of processors.
447 select ARCH_REQUIRE_GPIOLIB
448 select GENERIC_CLOCKEVENTS
451 Support for the Marvell Dove SoC 88AP510
454 bool "Marvell Kirkwood"
457 select ARCH_REQUIRE_GPIOLIB
458 select GENERIC_CLOCKEVENTS
461 Support for the following Marvell Kirkwood series SoCs:
462 88F6180, 88F6192 and 88F6281.
465 bool "Marvell Loki (88RC8480)"
467 select GENERIC_CLOCKEVENTS
470 Support for the Marvell Loki (88RC8480) SoC.
475 select ARCH_REQUIRE_GPIOLIB
478 select USB_ARCH_HAS_OHCI
481 select GENERIC_CLOCKEVENTS
483 Support for the NXP LPC32XX family of processors
486 bool "Marvell MV78xx0"
489 select ARCH_REQUIRE_GPIOLIB
490 select GENERIC_CLOCKEVENTS
493 Support for the following Marvell MV78xx0 series SoCs:
501 select ARCH_REQUIRE_GPIOLIB
502 select GENERIC_CLOCKEVENTS
505 Support for the following Marvell Orion 5x series SoCs:
506 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
507 Orion-2 (5281), Orion-1-90 (6183).
510 bool "Marvell PXA168/910/MMP2"
512 select ARCH_REQUIRE_GPIOLIB
514 select GENERIC_CLOCKEVENTS
519 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
522 bool "Micrel/Kendin KS8695"
524 select ARCH_REQUIRE_GPIOLIB
525 select ARCH_USES_GETTIMEOFFSET
527 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
528 System-on-Chip devices.
531 bool "NetSilicon NS9xxx"
534 select GENERIC_CLOCKEVENTS
537 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
540 <http://www.digi.com/products/microprocessors/index.jsp>
543 bool "Nuvoton W90X900 CPU"
545 select ARCH_REQUIRE_GPIOLIB
547 select GENERIC_CLOCKEVENTS
549 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
550 At present, the w90x900 has been renamed nuc900, regarding
551 the ARM series product line, you can login the following
552 link address to know more.
554 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
555 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
558 bool "Nuvoton NUC93X CPU"
562 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
563 low-power and high performance MPEG-4/JPEG multimedia controller chip.
568 select GENERIC_CLOCKEVENTS
572 select ARCH_HAS_BARRIERS if CACHE_L2X0
573 select ARCH_HAS_CPUFREQ
575 This enables support for NVIDIA Tegra based systems (Tegra APX,
576 Tegra 6xx and Tegra 2 series).
579 bool "Philips Nexperia PNX4008 Mobile"
582 select ARCH_USES_GETTIMEOFFSET
584 This enables support for Philips PNX4008 mobile platform.
587 bool "PXA2xx/PXA3xx-based"
590 select ARCH_HAS_CPUFREQ
592 select ARCH_REQUIRE_GPIOLIB
593 select GENERIC_CLOCKEVENTS
598 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
603 select GENERIC_CLOCKEVENTS
604 select ARCH_REQUIRE_GPIOLIB
606 Support for Qualcomm MSM/QSD based systems. This runs on the
607 apps processor of the MSM/QSD and depends on a shared memory
608 interface to the modem processor which runs the baseband
609 stack and controls some vital subsystems
610 (clock and power control, etc).
613 bool "Renesas SH-Mobile"
615 Support for Renesas's SH-Mobile ARM platforms
622 select ARCH_MAY_HAVE_PC_FDC
623 select HAVE_PATA_PLATFORM
626 select ARCH_SPARSEMEM_ENABLE
627 select ARCH_USES_GETTIMEOFFSET
629 On the Acorn Risc-PC, Linux can support the internal IDE disk and
630 CD-ROM interface, serial and parallel port, and the floppy drive.
636 select ARCH_SPARSEMEM_ENABLE
638 select ARCH_HAS_CPUFREQ
640 select GENERIC_CLOCKEVENTS
643 select ARCH_REQUIRE_GPIOLIB
645 Support for StrongARM 11x0 based boards.
648 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
650 select ARCH_HAS_CPUFREQ
652 select ARCH_USES_GETTIMEOFFSET
653 select HAVE_S3C2410_I2C if I2C
655 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
656 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
657 the Samsung SMDK2410 development board (and derivatives).
659 Note, the S3C2416 and the S3C2450 are so close that they even share
660 the same SoC ID code. This means that there is no seperate machine
661 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
664 bool "Samsung S3C64XX"
670 select ARCH_USES_GETTIMEOFFSET
671 select ARCH_HAS_CPUFREQ
672 select ARCH_REQUIRE_GPIOLIB
673 select SAMSUNG_CLKSRC
674 select SAMSUNG_IRQ_VIC_TIMER
675 select SAMSUNG_IRQ_UART
676 select S3C_GPIO_TRACK
677 select S3C_GPIO_PULL_UPDOWN
678 select S3C_GPIO_CFG_S3C24XX
679 select S3C_GPIO_CFG_S3C64XX
681 select USB_ARCH_HAS_OHCI
682 select SAMSUNG_GPIOLIB_4BIT
683 select HAVE_S3C2410_I2C if I2C
684 select HAVE_S3C2410_WATCHDOG if WATCHDOG
686 Samsung S3C64XX series based systems
689 bool "Samsung S5P6440 S5P6450"
693 select HAVE_S3C2410_WATCHDOG if WATCHDOG
694 select ARCH_USES_GETTIMEOFFSET
695 select HAVE_S3C2410_I2C if I2C
696 select HAVE_S3C_RTC if RTC_CLASS
698 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
702 bool "Samsung S5P6442"
706 select ARCH_USES_GETTIMEOFFSET
707 select HAVE_S3C2410_WATCHDOG if WATCHDOG
709 Samsung S5P6442 CPU based systems
712 bool "Samsung S5PC100"
716 select ARM_L1_CACHE_SHIFT_6
717 select ARCH_USES_GETTIMEOFFSET
718 select HAVE_S3C2410_I2C if I2C
719 select HAVE_S3C_RTC if RTC_CLASS
720 select HAVE_S3C2410_WATCHDOG if WATCHDOG
722 Samsung S5PC100 series based systems
725 bool "Samsung S5PV210/S5PC110"
727 select ARCH_SPARSEMEM_ENABLE
730 select ARM_L1_CACHE_SHIFT_6
731 select ARCH_HAS_CPUFREQ
732 select ARCH_USES_GETTIMEOFFSET
733 select HAVE_S3C2410_I2C if I2C
734 select HAVE_S3C_RTC if RTC_CLASS
735 select HAVE_S3C2410_WATCHDOG if WATCHDOG
737 Samsung S5PV210/S5PC110 series based systems
740 bool "Samsung S5PV310/S5PC210"
742 select ARCH_SPARSEMEM_ENABLE
745 select GENERIC_CLOCKEVENTS
746 select HAVE_S3C_RTC if RTC_CLASS
747 select HAVE_S3C2410_I2C if I2C
748 select HAVE_S3C2410_WATCHDOG if WATCHDOG
750 Samsung S5PV310 series based systems
759 select ARCH_USES_GETTIMEOFFSET
761 Support for the StrongARM based Digital DNARD machine, also known
762 as "Shark" (<http://www.shark-linux.de/shark.html>).
765 bool "Telechips TCC ARM926-based systems"
769 select GENERIC_CLOCKEVENTS
771 Support for Telechips TCC ARM926-based systems.
776 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
777 select ARCH_USES_GETTIMEOFFSET
779 Say Y here for systems based on one of the Sharp LH7A40X
780 System on a Chip processors. These CPUs include an ARM922T
781 core with a wide array of integrated devices for
782 hand-held and low-power applications.
785 bool "ST-Ericsson U300 Series"
791 select GENERIC_CLOCKEVENTS
795 Support for ST-Ericsson U300 series mobile platforms.
798 bool "ST-Ericsson U8500 Series"
801 select GENERIC_CLOCKEVENTS
803 select ARCH_REQUIRE_GPIOLIB
805 Support for ST-Ericsson's Ux500 architecture
808 bool "STMicroelectronics Nomadik"
813 select GENERIC_CLOCKEVENTS
814 select ARCH_REQUIRE_GPIOLIB
816 Support for the Nomadik platform by ST-Ericsson
820 select GENERIC_CLOCKEVENTS
821 select ARCH_REQUIRE_GPIOLIB
825 select GENERIC_ALLOCATOR
826 select ARCH_HAS_HOLES_MEMORYMODEL
828 Support for TI's DaVinci platform.
833 select ARCH_REQUIRE_GPIOLIB
834 select ARCH_HAS_CPUFREQ
835 select GENERIC_CLOCKEVENTS
836 select ARCH_HAS_HOLES_MEMORYMODEL
838 Support for TI's OMAP platform (OMAP1/2/3/4).
843 select ARCH_REQUIRE_GPIOLIB
845 select GENERIC_CLOCKEVENTS
848 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
853 # This is sorted alphabetically by mach-* pathname. However, plat-*
854 # Kconfigs may be included either alphabetically (according to the
855 # plat- suffix) or along side the corresponding mach-* source.
857 source "arch/arm/mach-aaec2000/Kconfig"
859 source "arch/arm/mach-at91/Kconfig"
861 source "arch/arm/mach-bcmring/Kconfig"
863 source "arch/arm/mach-clps711x/Kconfig"
865 source "arch/arm/mach-cns3xxx/Kconfig"
867 source "arch/arm/mach-davinci/Kconfig"
869 source "arch/arm/mach-dove/Kconfig"
871 source "arch/arm/mach-ep93xx/Kconfig"
873 source "arch/arm/mach-footbridge/Kconfig"
875 source "arch/arm/mach-gemini/Kconfig"
877 source "arch/arm/mach-h720x/Kconfig"
879 source "arch/arm/mach-integrator/Kconfig"
881 source "arch/arm/mach-iop32x/Kconfig"
883 source "arch/arm/mach-iop33x/Kconfig"
885 source "arch/arm/mach-iop13xx/Kconfig"
887 source "arch/arm/mach-ixp4xx/Kconfig"
889 source "arch/arm/mach-ixp2000/Kconfig"
891 source "arch/arm/mach-ixp23xx/Kconfig"
893 source "arch/arm/mach-kirkwood/Kconfig"
895 source "arch/arm/mach-ks8695/Kconfig"
897 source "arch/arm/mach-lh7a40x/Kconfig"
899 source "arch/arm/mach-loki/Kconfig"
901 source "arch/arm/mach-lpc32xx/Kconfig"
903 source "arch/arm/mach-msm/Kconfig"
905 source "arch/arm/mach-mv78xx0/Kconfig"
907 source "arch/arm/plat-mxc/Kconfig"
909 source "arch/arm/mach-netx/Kconfig"
911 source "arch/arm/mach-nomadik/Kconfig"
912 source "arch/arm/plat-nomadik/Kconfig"
914 source "arch/arm/mach-ns9xxx/Kconfig"
916 source "arch/arm/mach-nuc93x/Kconfig"
918 source "arch/arm/plat-omap/Kconfig"
920 source "arch/arm/mach-omap1/Kconfig"
922 source "arch/arm/mach-omap2/Kconfig"
924 source "arch/arm/mach-orion5x/Kconfig"
926 source "arch/arm/mach-pxa/Kconfig"
927 source "arch/arm/plat-pxa/Kconfig"
929 source "arch/arm/mach-mmp/Kconfig"
931 source "arch/arm/mach-realview/Kconfig"
933 source "arch/arm/mach-sa1100/Kconfig"
935 source "arch/arm/plat-samsung/Kconfig"
936 source "arch/arm/plat-s3c24xx/Kconfig"
937 source "arch/arm/plat-s5p/Kconfig"
939 source "arch/arm/plat-spear/Kconfig"
941 source "arch/arm/plat-tcc/Kconfig"
944 source "arch/arm/mach-s3c2400/Kconfig"
945 source "arch/arm/mach-s3c2410/Kconfig"
946 source "arch/arm/mach-s3c2412/Kconfig"
947 source "arch/arm/mach-s3c2416/Kconfig"
948 source "arch/arm/mach-s3c2440/Kconfig"
949 source "arch/arm/mach-s3c2443/Kconfig"
953 source "arch/arm/mach-s3c64xx/Kconfig"
956 source "arch/arm/mach-s5p64x0/Kconfig"
958 source "arch/arm/mach-s5p6442/Kconfig"
960 source "arch/arm/mach-s5pc100/Kconfig"
962 source "arch/arm/mach-s5pv210/Kconfig"
964 source "arch/arm/mach-s5pv310/Kconfig"
966 source "arch/arm/mach-shmobile/Kconfig"
968 source "arch/arm/plat-stmp3xxx/Kconfig"
970 source "arch/arm/mach-tegra/Kconfig"
972 source "arch/arm/mach-u300/Kconfig"
974 source "arch/arm/mach-ux500/Kconfig"
976 source "arch/arm/mach-versatile/Kconfig"
978 source "arch/arm/mach-vexpress/Kconfig"
980 source "arch/arm/mach-w90x900/Kconfig"
982 # Definitions to make life easier
988 select GENERIC_CLOCKEVENTS
996 config PLAT_VERSATILE
999 config ARM_TIMER_SP804
1002 source arch/arm/mm/Kconfig
1005 bool "Enable iWMMXt support"
1006 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
1007 default y if PXA27x || PXA3xx || ARCH_MMP
1009 Enable support for iWMMXt context switching at run time if
1010 running on a CPU that supports it.
1012 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1015 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1019 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1020 (!ARCH_OMAP3 || OMAP3_EMU)
1025 source "arch/arm/Kconfig-nommu"
1028 config ARM_ERRATA_411920
1029 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1032 Invalidation of the Instruction Cache operation can
1033 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1034 It does not affect the MPCore. This option enables the ARM Ltd.
1035 recommended workaround.
1037 config ARM_ERRATA_430973
1038 bool "ARM errata: Stale prediction on replaced interworking branch"
1041 This option enables the workaround for the 430973 Cortex-A8
1042 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1043 interworking branch is replaced with another code sequence at the
1044 same virtual address, whether due to self-modifying code or virtual
1045 to physical address re-mapping, Cortex-A8 does not recover from the
1046 stale interworking branch prediction. This results in Cortex-A8
1047 executing the new code sequence in the incorrect ARM or Thumb state.
1048 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1049 and also flushes the branch target cache at every context switch.
1050 Note that setting specific bits in the ACTLR register may not be
1051 available in non-secure mode.
1053 config ARM_ERRATA_458693
1054 bool "ARM errata: Processor deadlock when a false hazard is created"
1057 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1058 erratum. For very specific sequences of memory operations, it is
1059 possible for a hazard condition intended for a cache line to instead
1060 be incorrectly associated with a different cache line. This false
1061 hazard might then cause a processor deadlock. The workaround enables
1062 the L1 caching of the NEON accesses and disables the PLD instruction
1063 in the ACTLR register. Note that setting specific bits in the ACTLR
1064 register may not be available in non-secure mode.
1066 config ARM_ERRATA_460075
1067 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1070 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1071 erratum. Any asynchronous access to the L2 cache may encounter a
1072 situation in which recent store transactions to the L2 cache are lost
1073 and overwritten with stale memory contents from external memory. The
1074 workaround disables the write-allocate mode for the L2 cache via the
1075 ACTLR register. Note that setting specific bits in the ACTLR register
1076 may not be available in non-secure mode.
1078 config ARM_ERRATA_742230
1079 bool "ARM errata: DMB operation may be faulty"
1080 depends on CPU_V7 && SMP
1082 This option enables the workaround for the 742230 Cortex-A9
1083 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1084 between two write operations may not ensure the correct visibility
1085 ordering of the two writes. This workaround sets a specific bit in
1086 the diagnostic register of the Cortex-A9 which causes the DMB
1087 instruction to behave as a DSB, ensuring the correct behaviour of
1090 config ARM_ERRATA_742231
1091 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1092 depends on CPU_V7 && SMP
1094 This option enables the workaround for the 742231 Cortex-A9
1095 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1096 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1097 accessing some data located in the same cache line, may get corrupted
1098 data due to bad handling of the address hazard when the line gets
1099 replaced from one of the CPUs at the same time as another CPU is
1100 accessing it. This workaround sets specific bits in the diagnostic
1101 register of the Cortex-A9 which reduces the linefill issuing
1102 capabilities of the processor.
1104 config PL310_ERRATA_588369
1105 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1106 depends on CACHE_L2X0 && ARCH_OMAP4
1108 The PL310 L2 cache controller implements three types of Clean &
1109 Invalidate maintenance operations: by Physical Address
1110 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1111 They are architecturally defined to behave as the execution of a
1112 clean operation followed immediately by an invalidate operation,
1113 both performing to the same memory location. This functionality
1114 is not correctly implemented in PL310 as clean lines are not
1115 invalidated as a result of these operations. Note that this errata
1116 uses Texas Instrument's secure monitor api.
1118 config ARM_ERRATA_720789
1119 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1120 depends on CPU_V7 && SMP
1122 This option enables the workaround for the 720789 Cortex-A9 (prior to
1123 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1124 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1125 As a consequence of this erratum, some TLB entries which should be
1126 invalidated are not, resulting in an incoherency in the system page
1127 tables. The workaround changes the TLB flushing routines to invalidate
1128 entries regardless of the ASID.
1130 config ARM_ERRATA_743622
1131 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1134 This option enables the workaround for the 743622 Cortex-A9
1135 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1136 optimisation in the Cortex-A9 Store Buffer may lead to data
1137 corruption. This workaround sets a specific bit in the diagnostic
1138 register of the Cortex-A9 which disables the Store Buffer
1139 optimisation, preventing the defect from occurring. This has no
1140 visible impact on the overall performance or power consumption of the
1145 source "arch/arm/common/Kconfig"
1155 Find out whether you have ISA slots on your motherboard. ISA is the
1156 name of a bus system, i.e. the way the CPU talks to the other stuff
1157 inside your box. Other bus systems are PCI, EISA, MicroChannel
1158 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1159 newer boards don't support it. If you have ISA, say Y, otherwise N.
1161 # Select ISA DMA controller support
1166 # Select ISA DMA interface
1171 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1173 Find out whether you have a PCI motherboard. PCI is the name of a
1174 bus system, i.e. the way the CPU talks to the other stuff inside
1175 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1176 VESA. If you have PCI, say Y, otherwise N.
1185 # Select the host bridge type
1186 config PCI_HOST_VIA82C505
1188 depends on PCI && ARCH_SHARK
1191 config PCI_HOST_ITE8152
1193 depends on PCI && MACH_ARMCORE
1197 source "drivers/pci/Kconfig"
1199 source "drivers/pcmcia/Kconfig"
1203 menu "Kernel Features"
1205 source "kernel/time/Kconfig"
1208 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1209 depends on EXPERIMENTAL
1210 depends on GENERIC_CLOCKEVENTS
1211 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1212 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1213 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1215 select USE_GENERIC_SMP_HELPERS
1216 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1218 This enables support for systems with more than one CPU. If you have
1219 a system with only one CPU, like most personal computers, say N. If
1220 you have a system with more than one CPU, say Y.
1222 If you say N here, the kernel will run on single and multiprocessor
1223 machines, but will use only one CPU of a multiprocessor machine. If
1224 you say Y here, the kernel will run on many, but not all, single
1225 processor machines. On a single processor machine, the kernel will
1226 run faster if you say N here.
1228 See also <file:Documentation/i386/IO-APIC.txt>,
1229 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1230 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1232 If you don't know what to do here, say N.
1235 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1236 depends on EXPERIMENTAL
1237 depends on SMP && !XIP && !THUMB2_KERNEL
1240 SMP kernels contain instructions which fail on non-SMP processors.
1241 Enabling this option allows the kernel to modify itself to make
1242 these instructions safe. Disabling it allows about 1K of space
1245 If you don't know what to do here, say Y.
1251 This option enables support for the ARM system coherency unit
1257 This options enables support for the ARM timer and watchdog unit
1260 prompt "Memory split"
1263 Select the desired split between kernel and user memory.
1265 If you are not absolutely sure what you are doing, leave this
1269 bool "3G/1G user/kernel split"
1271 bool "2G/2G user/kernel split"
1273 bool "1G/3G user/kernel split"
1278 default 0x40000000 if VMSPLIT_1G
1279 default 0x80000000 if VMSPLIT_2G
1283 int "Maximum number of CPUs (2-32)"
1289 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1290 depends on SMP && HOTPLUG && EXPERIMENTAL
1291 depends on !ARCH_MSM
1293 Say Y here to experiment with turning CPUs off and on. CPUs
1294 can be controlled through /sys/devices/system/cpu.
1297 bool "Use local timer interrupts"
1300 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
1302 Enable support for local timers on SMP platforms, rather then the
1303 legacy IPI broadcast method. Local timers allows the system
1304 accounting to be spread across the timer interval, preventing a
1305 "thundering herd" at every timer tick.
1307 source kernel/Kconfig.preempt
1311 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1312 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1313 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1314 default AT91_TIMER_HZ if ARCH_AT91
1315 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1318 config THUMB2_KERNEL
1319 bool "Compile the kernel in Thumb-2 mode"
1320 depends on CPU_V7 && EXPERIMENTAL
1322 select ARM_ASM_UNIFIED
1324 By enabling this option, the kernel will be compiled in
1325 Thumb-2 mode. A compiler/assembler that understand the unified
1326 ARM-Thumb syntax is needed.
1330 config ARM_ASM_UNIFIED
1334 bool "Use the ARM EABI to compile the kernel"
1336 This option allows for the kernel to be compiled using the latest
1337 ARM ABI (aka EABI). This is only useful if you are using a user
1338 space environment that is also compiled with EABI.
1340 Since there are major incompatibilities between the legacy ABI and
1341 EABI, especially with regard to structure member alignment, this
1342 option also changes the kernel syscall calling convention to
1343 disambiguate both ABIs and allow for backward compatibility support
1344 (selected with CONFIG_OABI_COMPAT).
1346 To use this you need GCC version 4.0.0 or later.
1349 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1350 depends on AEABI && EXPERIMENTAL
1353 This option preserves the old syscall interface along with the
1354 new (ARM EABI) one. It also provides a compatibility layer to
1355 intercept syscalls that have structure arguments which layout
1356 in memory differs between the legacy ABI and the new ARM EABI
1357 (only for non "thumb" binaries). This option adds a tiny
1358 overhead to all syscalls and produces a slightly larger kernel.
1359 If you know you'll be using only pure EABI user space then you
1360 can say N here. If this option is not selected and you attempt
1361 to execute a legacy ABI binary then the result will be
1362 UNPREDICTABLE (in fact it can be predicted that it won't work
1363 at all). If in doubt say Y.
1365 config ARCH_HAS_HOLES_MEMORYMODEL
1368 config ARCH_SPARSEMEM_ENABLE
1371 config ARCH_SPARSEMEM_DEFAULT
1372 def_bool ARCH_SPARSEMEM_ENABLE
1374 config ARCH_SELECT_MEMORY_MODEL
1375 def_bool ARCH_SPARSEMEM_ENABLE
1378 bool "High Memory Support (EXPERIMENTAL)"
1379 depends on MMU && EXPERIMENTAL
1381 The address space of ARM processors is only 4 Gigabytes large
1382 and it has to accommodate user address space, kernel address
1383 space as well as some memory mapped IO. That means that, if you
1384 have a large amount of physical memory and/or IO, not all of the
1385 memory can be "permanently mapped" by the kernel. The physical
1386 memory that is not permanently mapped is called "high memory".
1388 Depending on the selected kernel/user memory split, minimum
1389 vmalloc space and actual amount of RAM, you may not need this
1390 option which should result in a slightly faster kernel.
1395 bool "Allocate 2nd-level pagetables from highmem"
1397 depends on !OUTER_CACHE
1399 config HW_PERF_EVENTS
1400 bool "Enable hardware performance counter support for perf events"
1401 depends on PERF_EVENTS && CPU_HAS_PMU
1404 Enable hardware performance counter support for perf events. If
1405 disabled, perf events will use software events only.
1410 This enables support for sparse irqs. This is useful in general
1411 as most CPUs have a fairly sparse array of IRQ vectors, which
1412 the irq_desc then maps directly on to. Systems with a high
1413 number of off-chip IRQs will want to treat this as
1414 experimental until they have been independently verified.
1418 config FORCE_MAX_ZONEORDER
1419 int "Maximum zone order" if ARCH_SHMOBILE
1420 range 11 64 if ARCH_SHMOBILE
1421 default "9" if SA1111
1424 The kernel memory allocator divides physically contiguous memory
1425 blocks into "zones", where each zone is a power of two number of
1426 pages. This option selects the largest power of two that the kernel
1427 keeps in the memory allocator. If you need to allocate very large
1428 blocks of physically contiguous memory, then you may need to
1429 increase this value.
1431 This config option is actually maximum order plus one. For example,
1432 a value of 11 means that the largest free memory block is 2^10 pages.
1435 bool "Timer and CPU usage LEDs"
1436 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1437 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1438 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1439 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1440 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1441 ARCH_AT91 || ARCH_DAVINCI || \
1442 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1444 If you say Y here, the LEDs on your machine will be used
1445 to provide useful information about your current system status.
1447 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1448 be able to select which LEDs are active using the options below. If
1449 you are compiling a kernel for the EBSA-110 or the LART however, the
1450 red LED will simply flash regularly to indicate that the system is
1451 still functional. It is safe to say Y here if you have a CATS
1452 system, but the driver will do nothing.
1455 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1456 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1457 || MACH_OMAP_PERSEUS2
1459 depends on !GENERIC_CLOCKEVENTS
1460 default y if ARCH_EBSA110
1462 If you say Y here, one of the system LEDs (the green one on the
1463 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1464 will flash regularly to indicate that the system is still
1465 operational. This is mainly useful to kernel hackers who are
1466 debugging unstable kernels.
1468 The LART uses the same LED for both Timer LED and CPU usage LED
1469 functions. You may choose to use both, but the Timer LED function
1470 will overrule the CPU usage LED.
1473 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1475 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1476 || MACH_OMAP_PERSEUS2
1479 If you say Y here, the red LED will be used to give a good real
1480 time indication of CPU usage, by lighting whenever the idle task
1481 is not currently executing.
1483 The LART uses the same LED for both Timer LED and CPU usage LED
1484 functions. You may choose to use both, but the Timer LED function
1485 will overrule the CPU usage LED.
1487 config ALIGNMENT_TRAP
1489 depends on CPU_CP15_MMU
1490 default y if !ARCH_EBSA110
1491 select HAVE_PROC_CPU if PROC_FS
1493 ARM processors cannot fetch/store information which is not
1494 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1495 address divisible by 4. On 32-bit ARM processors, these non-aligned
1496 fetch/store instructions will be emulated in software if you say
1497 here, which has a severe performance impact. This is necessary for
1498 correct operation of some network protocols. With an IP-only
1499 configuration it is safe to say N, otherwise say Y.
1501 config UACCESS_WITH_MEMCPY
1502 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1503 depends on MMU && EXPERIMENTAL
1504 default y if CPU_FEROCEON
1506 Implement faster copy_to_user and clear_user methods for CPU
1507 cores where a 8-word STM instruction give significantly higher
1508 memory write throughput than a sequence of individual 32bit stores.
1510 A possible side effect is a slight increase in scheduling latency
1511 between threads sharing the same address space if they invoke
1512 such copy operations with large buffers.
1514 However, if the CPU data cache is using a write-allocate mode,
1515 this option is unlikely to provide any performance gain.
1519 prompt "Enable seccomp to safely compute untrusted bytecode"
1521 This kernel feature is useful for number crunching applications
1522 that may need to compute untrusted bytecode during their
1523 execution. By using pipes or other transports made available to
1524 the process as file descriptors supporting the read/write
1525 syscalls, it's possible to isolate those applications in
1526 their own address space using seccomp. Once seccomp is
1527 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1528 and the task is only allowed to execute a few safe syscalls
1529 defined by each seccomp mode.
1531 config CC_STACKPROTECTOR
1532 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1534 This option turns on the -fstack-protector GCC feature. This
1535 feature puts, at the beginning of functions, a canary value on
1536 the stack just before the return address, and validates
1537 the value just before actually returning. Stack based buffer
1538 overflows (that need to overwrite this return address) now also
1539 overwrite the canary, which gets detected and the attack is then
1540 neutralized via a kernel panic.
1541 This feature requires gcc version 4.2 or above.
1543 config DEPRECATED_PARAM_STRUCT
1544 bool "Provide old way to pass kernel parameters"
1546 This was deprecated in 2001 and announced to live on for 5 years.
1547 Some old boot loaders still use this way.
1553 # Compressed boot loader in ROM. Yes, we really want to ask about
1554 # TEXT and BSS so we preserve their values in the config files.
1555 config ZBOOT_ROM_TEXT
1556 hex "Compressed ROM boot loader base address"
1559 The physical address at which the ROM-able zImage is to be
1560 placed in the target. Platforms which normally make use of
1561 ROM-able zImage formats normally set this to a suitable
1562 value in their defconfig file.
1564 If ZBOOT_ROM is not enabled, this has no effect.
1566 config ZBOOT_ROM_BSS
1567 hex "Compressed ROM boot loader BSS address"
1570 The base address of an area of read/write memory in the target
1571 for the ROM-able zImage which must be available while the
1572 decompressor is running. It must be large enough to hold the
1573 entire decompressed kernel plus an additional 128 KiB.
1574 Platforms which normally make use of ROM-able zImage formats
1575 normally set this to a suitable value in their defconfig file.
1577 If ZBOOT_ROM is not enabled, this has no effect.
1580 bool "Compressed boot loader in ROM/flash"
1581 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1583 Say Y here if you intend to execute your compressed kernel image
1584 (zImage) directly from ROM or flash. If unsure, say N.
1587 string "Default kernel command string"
1590 On some architectures (EBSA110 and CATS), there is currently no way
1591 for the boot loader to pass arguments to the kernel. For these
1592 architectures, you should supply some command-line options at build
1593 time by entering them here. As a minimum, you should specify the
1594 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1596 config CMDLINE_FORCE
1597 bool "Always use the default kernel command string"
1598 depends on CMDLINE != ""
1600 Always use the default kernel command string, even if the boot
1601 loader passes other arguments to the kernel.
1602 This is useful if you cannot or don't want to change the
1603 command-line options your boot loader passes to the kernel.
1608 bool "Kernel Execute-In-Place from ROM"
1609 depends on !ZBOOT_ROM
1611 Execute-In-Place allows the kernel to run from non-volatile storage
1612 directly addressable by the CPU, such as NOR flash. This saves RAM
1613 space since the text section of the kernel is not loaded from flash
1614 to RAM. Read-write sections, such as the data section and stack,
1615 are still copied to RAM. The XIP kernel is not compressed since
1616 it has to run directly from flash, so it will take more space to
1617 store it. The flash address used to link the kernel object files,
1618 and for storing it, is configuration dependent. Therefore, if you
1619 say Y here, you must know the proper physical address where to
1620 store the kernel image depending on your own flash memory usage.
1622 Also note that the make target becomes "make xipImage" rather than
1623 "make zImage" or "make Image". The final kernel binary to put in
1624 ROM memory will be arch/arm/boot/xipImage.
1628 config XIP_PHYS_ADDR
1629 hex "XIP Kernel Physical Location"
1630 depends on XIP_KERNEL
1631 default "0x00080000"
1633 This is the physical address in your flash memory the kernel will
1634 be linked for and stored to. This address is dependent on your
1638 bool "Kexec system call (EXPERIMENTAL)"
1639 depends on EXPERIMENTAL
1641 kexec is a system call that implements the ability to shutdown your
1642 current kernel, and to start another kernel. It is like a reboot
1643 but it is independent of the system firmware. And like a reboot
1644 you can start any kernel with it, not just Linux.
1646 It is an ongoing process to be certain the hardware in a machine
1647 is properly shutdown, so do not be surprised if this code does not
1648 initially work for you. It may help to enable device hotplugging
1652 bool "Export atags in procfs"
1656 Should the atags used to boot the kernel be exported in an "atags"
1657 file in procfs. Useful with kexec.
1659 config AUTO_ZRELADDR
1660 bool "Auto calculation of the decompressed kernel image address"
1661 depends on !ZBOOT_ROM && !ARCH_U300
1663 ZRELADDR is the physical address where the decompressed kernel
1664 image will be placed. If AUTO_ZRELADDR is selected, the address
1665 will be determined at run-time by masking the current IP with
1666 0xf8000000. This assumes the zImage being placed in the first 128MB
1667 from start of memory.
1671 menu "CPU Power Management"
1675 source "drivers/cpufreq/Kconfig"
1678 tristate "CPUfreq driver for i.MX CPUs"
1679 depends on ARCH_MXC && CPU_FREQ
1681 This enables the CPUfreq driver for i.MX CPUs.
1683 config CPU_FREQ_SA1100
1686 config CPU_FREQ_SA1110
1689 config CPU_FREQ_INTEGRATOR
1690 tristate "CPUfreq driver for ARM Integrator CPUs"
1691 depends on ARCH_INTEGRATOR && CPU_FREQ
1694 This enables the CPUfreq driver for ARM Integrator CPUs.
1696 For details, take a look at <file:Documentation/cpu-freq>.
1702 depends on CPU_FREQ && ARCH_PXA && PXA25x
1704 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1706 config CPU_FREQ_S3C64XX
1707 bool "CPUfreq support for Samsung S3C64XX CPUs"
1708 depends on CPU_FREQ && CPU_S3C6410
1713 Internal configuration node for common cpufreq on Samsung SoC
1715 config CPU_FREQ_S3C24XX
1716 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1717 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1720 This enables the CPUfreq driver for the Samsung S3C24XX family
1723 For details, take a look at <file:Documentation/cpu-freq>.
1727 config CPU_FREQ_S3C24XX_PLL
1728 bool "Support CPUfreq changing of PLL frequency"
1729 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1731 Compile in support for changing the PLL frequency from the
1732 S3C24XX series CPUfreq driver. The PLL takes time to settle
1733 after a frequency change, so by default it is not enabled.
1735 This also means that the PLL tables for the selected CPU(s) will
1736 be built which may increase the size of the kernel image.
1738 config CPU_FREQ_S3C24XX_DEBUG
1739 bool "Debug CPUfreq Samsung driver core"
1740 depends on CPU_FREQ_S3C24XX
1742 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1744 config CPU_FREQ_S3C24XX_IODEBUG
1745 bool "Debug CPUfreq Samsung driver IO timing"
1746 depends on CPU_FREQ_S3C24XX
1748 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1750 config CPU_FREQ_S3C24XX_DEBUGFS
1751 bool "Export debugfs for CPUFreq"
1752 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1754 Export status information via debugfs.
1758 source "drivers/cpuidle/Kconfig"
1762 menu "Floating point emulation"
1764 comment "At least one emulation must be selected"
1767 bool "NWFPE math emulation"
1768 depends on !AEABI || OABI_COMPAT
1770 Say Y to include the NWFPE floating point emulator in the kernel.
1771 This is necessary to run most binaries. Linux does not currently
1772 support floating point hardware so you need to say Y here even if
1773 your machine has an FPA or floating point co-processor podule.
1775 You may say N here if you are going to load the Acorn FPEmulator
1776 early in the bootup.
1779 bool "Support extended precision"
1780 depends on FPE_NWFPE
1782 Say Y to include 80-bit support in the kernel floating-point
1783 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1784 Note that gcc does not generate 80-bit operations by default,
1785 so in most cases this option only enlarges the size of the
1786 floating point emulator without any good reason.
1788 You almost surely want to say N here.
1791 bool "FastFPE math emulation (EXPERIMENTAL)"
1792 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1794 Say Y here to include the FAST floating point emulator in the kernel.
1795 This is an experimental much faster emulator which now also has full
1796 precision for the mantissa. It does not support any exceptions.
1797 It is very simple, and approximately 3-6 times faster than NWFPE.
1799 It should be sufficient for most programs. It may be not suitable
1800 for scientific calculations, but you have to check this for yourself.
1801 If you do not feel you need a faster FP emulation you should better
1805 bool "VFP-format floating point maths"
1806 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1808 Say Y to include VFP support code in the kernel. This is needed
1809 if your hardware includes a VFP unit.
1811 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1812 release notes and additional status information.
1814 Say N if your target does not have VFP hardware.
1822 bool "Advanced SIMD (NEON) Extension support"
1823 depends on VFPv3 && CPU_V7
1825 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1830 menu "Userspace binary formats"
1832 source "fs/Kconfig.binfmt"
1835 tristate "RISC OS personality"
1838 Say Y here to include the kernel code necessary if you want to run
1839 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1840 experimental; if this sounds frightening, say N and sleep in peace.
1841 You can also say M here to compile this support as a module (which
1842 will be called arthur).
1846 menu "Power management options"
1848 source "kernel/power/Kconfig"
1850 config ARCH_SUSPEND_POSSIBLE
1855 source "net/Kconfig"
1857 source "drivers/Kconfig"
1861 source "arch/arm/Kconfig.debug"
1863 source "security/Kconfig"
1865 source "crypto/Kconfig"
1867 source "lib/Kconfig"