8 select SYS_SUPPORTS_APM_EMULATION
9 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_KPROBES if (!XIP_KERNEL)
13 select HAVE_KRETPROBES if (HAVE_KPROBES)
14 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
15 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
16 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
17 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
18 select HAVE_GENERIC_DMA_COHERENT
19 select HAVE_KERNEL_GZIP
20 select HAVE_KERNEL_LZO
21 select HAVE_KERNEL_LZMA
23 select HAVE_PERF_EVENTS
24 select PERF_USE_VMALLOC
25 select HAVE_REGS_AND_STACK_ACCESS_API
26 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
28 The ARM series is a line of low-power-consumption RISC chip designs
29 licensed by ARM Ltd and targeted at embedded applications and
30 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
31 manufactured, but legacy ARM-based PC hardware remains popular in
32 Europe. There is an ARM Linux project with a web page at
33 <http://www.arm.linux.org.uk/>.
38 config SYS_SUPPORTS_APM_EMULATION
41 config HAVE_SCHED_CLOCK
47 config ARCH_USES_GETTIMEOFFSET
51 config GENERIC_CLOCKEVENTS
54 config GENERIC_CLOCKEVENTS_BROADCAST
56 depends on GENERIC_CLOCKEVENTS
61 select GENERIC_ALLOCATOR
72 The Extended Industry Standard Architecture (EISA) bus was
73 developed as an open alternative to the IBM MicroChannel bus.
75 The EISA bus provided some of the features of the IBM MicroChannel
76 bus while maintaining backward compatibility with cards made for
77 the older ISA bus. The EISA bus saw limited use between 1988 and
78 1995 when it was made obsolete by the PCI bus.
80 Say Y here if you are building a kernel for an EISA-based machine.
90 MicroChannel Architecture is found in some IBM PS/2 machines and
91 laptops. It is a bus system similar to PCI or ISA. See
92 <file:Documentation/mca.txt> (and especially the web page given
93 there) before attempting to build an MCA bus kernel.
95 config GENERIC_HARDIRQS
99 config STACKTRACE_SUPPORT
103 config HAVE_LATENCYTOP_SUPPORT
108 config LOCKDEP_SUPPORT
112 config TRACE_IRQFLAGS_SUPPORT
116 config HARDIRQS_SW_RESEND
120 config GENERIC_IRQ_PROBE
124 config GENERIC_LOCKBREAK
127 depends on SMP && PREEMPT
129 config RWSEM_GENERIC_SPINLOCK
133 config RWSEM_XCHGADD_ALGORITHM
136 config ARCH_HAS_ILOG2_U32
139 config ARCH_HAS_ILOG2_U64
142 config ARCH_HAS_CPUFREQ
145 Internal node to signify that the ARCH has CPUFREQ support
146 and that the relevant menu configurations are displayed for
149 config ARCH_HAS_CPU_IDLE_WAIT
152 config GENERIC_HWEIGHT
156 config GENERIC_CALIBRATE_DELAY
160 config ARCH_MAY_HAVE_PC_FDC
166 config NEED_DMA_MAP_STATE
169 config GENERIC_ISA_DMA
178 config GENERIC_HARDIRQS_NO__DO_IRQ
181 config ARM_L1_CACHE_SHIFT_6
184 Setting ARM L1 cache line size to 64 Bytes.
188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
189 default DRAM_BASE if REMAP_VECTORS_TO_RAM
192 The base address of exception vectors.
194 source "init/Kconfig"
196 source "kernel/Kconfig.freezer"
201 bool "MMU-based Paged Memory Management Support"
204 Select if you want MMU-based virtualised addressing space
205 support by paged memory management. If unsure, say 'Y'.
208 # The "ARM system type" choice list is ordered alphabetically by option
209 # text. Please add new entries in the option alphabetic order.
212 prompt "ARM system type"
213 default ARCH_VERSATILE
216 bool "Agilent AAEC-2000 based"
220 select ARCH_USES_GETTIMEOFFSET
222 This enables support for systems based on the Agilent AAEC-2000
224 config ARCH_INTEGRATOR
225 bool "ARM Ltd. Integrator family"
227 select ARCH_HAS_CPUFREQ
230 select GENERIC_CLOCKEVENTS
231 select PLAT_VERSATILE
233 Support for ARM's Integrator platform.
236 bool "ARM Ltd. RealView family"
239 select HAVE_SCHED_CLOCK
241 select GENERIC_CLOCKEVENTS
242 select ARCH_WANT_OPTIONAL_GPIOLIB
243 select PLAT_VERSATILE
244 select ARM_TIMER_SP804
245 select GPIO_PL061 if GPIOLIB
247 This enables support for ARM Ltd RealView boards.
249 config ARCH_VERSATILE
250 bool "ARM Ltd. Versatile family"
254 select HAVE_SCHED_CLOCK
256 select GENERIC_CLOCKEVENTS
257 select ARCH_WANT_OPTIONAL_GPIOLIB
258 select PLAT_VERSATILE
259 select ARM_TIMER_SP804
261 This enables support for ARM Ltd Versatile board.
264 bool "ARM Ltd. Versatile Express family"
265 select ARCH_WANT_OPTIONAL_GPIOLIB
267 select ARM_TIMER_SP804
269 select GENERIC_CLOCKEVENTS
272 select PLAT_VERSATILE
274 This enables support for the ARM Ltd Versatile Express boards.
278 select ARCH_REQUIRE_GPIOLIB
281 This enables support for systems based on the Atmel AT91RM9200,
282 AT91SAM9 and AT91CAP9 processors.
285 bool "Broadcom BCMRING"
290 select GENERIC_CLOCKEVENTS
291 select ARCH_WANT_OPTIONAL_GPIOLIB
293 Support for Broadcom's BCMRing platform.
296 bool "Cirrus Logic CLPS711x/EP721x-based"
298 select ARCH_USES_GETTIMEOFFSET
300 Support for Cirrus Logic 711x/721x based boards.
303 bool "Cavium Networks CNS3XXX family"
305 select GENERIC_CLOCKEVENTS
307 select PCI_DOMAINS if PCI
309 Support for Cavium Networks CNS3XXX platform.
312 bool "Cortina Systems Gemini"
314 select ARCH_REQUIRE_GPIOLIB
315 select ARCH_USES_GETTIMEOFFSET
317 Support for the Cortina Systems Gemini family SoCs
324 select ARCH_USES_GETTIMEOFFSET
326 This is an evaluation board for the StrongARM processor available
327 from Digital. It has limited hardware on-board, including an
328 Ethernet interface, two PCMCIA sockets, two serial ports and a
337 select ARCH_REQUIRE_GPIOLIB
338 select ARCH_HAS_HOLES_MEMORYMODEL
339 select ARCH_USES_GETTIMEOFFSET
341 This enables support for the Cirrus EP93xx series of CPUs.
343 config ARCH_FOOTBRIDGE
347 select ARCH_USES_GETTIMEOFFSET
349 Support for systems based on the DC21285 companion chip
350 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
353 bool "Freescale MXC/iMX-based"
354 select GENERIC_CLOCKEVENTS
355 select ARCH_REQUIRE_GPIOLIB
358 Support for Freescale MXC/iMX-based family of processors
361 bool "Freescale STMP3xxx"
364 select ARCH_REQUIRE_GPIOLIB
365 select GENERIC_CLOCKEVENTS
366 select USB_ARCH_HAS_EHCI
368 Support for systems based on the Freescale 3xxx CPUs.
371 bool "Hilscher NetX based"
374 select GENERIC_CLOCKEVENTS
376 This enables support for systems based on the Hilscher NetX Soc
379 bool "Hynix HMS720x-based"
382 select ARCH_USES_GETTIMEOFFSET
384 This enables support for systems based on the Hynix HMS720x
392 select ARCH_SUPPORTS_MSI
395 Support for Intel's IOP13XX (XScale) family of processors.
403 select ARCH_REQUIRE_GPIOLIB
405 Support for Intel's 80219 and IOP32X (XScale) family of
414 select ARCH_REQUIRE_GPIOLIB
416 Support for Intel's IOP33X (XScale) family of processors.
423 select ARCH_USES_GETTIMEOFFSET
425 Support for Intel's IXP23xx (XScale) family of processors.
428 bool "IXP2400/2800-based"
432 select ARCH_USES_GETTIMEOFFSET
434 Support for Intel's IXP2400/2800 (XScale) family of processors.
441 select GENERIC_CLOCKEVENTS
442 select HAVE_SCHED_CLOCK
443 select DMABOUNCE if PCI
445 Support for Intel's IXP4XX (XScale) family of processors.
450 select ARCH_REQUIRE_GPIOLIB
451 select GENERIC_CLOCKEVENTS
454 Support for the Marvell Dove SoC 88AP510
457 bool "Marvell Kirkwood"
460 select ARCH_REQUIRE_GPIOLIB
461 select GENERIC_CLOCKEVENTS
464 Support for the following Marvell Kirkwood series SoCs:
465 88F6180, 88F6192 and 88F6281.
468 bool "Marvell Loki (88RC8480)"
470 select GENERIC_CLOCKEVENTS
473 Support for the Marvell Loki (88RC8480) SoC.
478 select ARCH_REQUIRE_GPIOLIB
481 select USB_ARCH_HAS_OHCI
484 select GENERIC_CLOCKEVENTS
486 Support for the NXP LPC32XX family of processors
489 bool "Marvell MV78xx0"
492 select ARCH_REQUIRE_GPIOLIB
493 select GENERIC_CLOCKEVENTS
496 Support for the following Marvell MV78xx0 series SoCs:
504 select ARCH_REQUIRE_GPIOLIB
505 select GENERIC_CLOCKEVENTS
508 Support for the following Marvell Orion 5x series SoCs:
509 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
510 Orion-2 (5281), Orion-1-90 (6183).
513 bool "Marvell PXA168/910/MMP2"
515 select ARCH_REQUIRE_GPIOLIB
517 select GENERIC_CLOCKEVENTS
518 select HAVE_SCHED_CLOCK
523 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
526 bool "Micrel/Kendin KS8695"
528 select ARCH_REQUIRE_GPIOLIB
529 select ARCH_USES_GETTIMEOFFSET
531 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
532 System-on-Chip devices.
535 bool "NetSilicon NS9xxx"
538 select GENERIC_CLOCKEVENTS
541 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
544 <http://www.digi.com/products/microprocessors/index.jsp>
547 bool "Nuvoton W90X900 CPU"
549 select ARCH_REQUIRE_GPIOLIB
551 select GENERIC_CLOCKEVENTS
553 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
554 At present, the w90x900 has been renamed nuc900, regarding
555 the ARM series product line, you can login the following
556 link address to know more.
558 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
559 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
562 bool "Nuvoton NUC93X CPU"
566 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
567 low-power and high performance MPEG-4/JPEG multimedia controller chip.
572 select GENERIC_CLOCKEVENTS
575 select HAVE_SCHED_CLOCK
577 select ARCH_HAS_BARRIERS if CACHE_L2X0
578 select ARCH_HAS_CPUFREQ
580 This enables support for NVIDIA Tegra based systems (Tegra APX,
581 Tegra 6xx and Tegra 2 series).
584 bool "Philips Nexperia PNX4008 Mobile"
587 select ARCH_USES_GETTIMEOFFSET
589 This enables support for Philips PNX4008 mobile platform.
592 bool "PXA2xx/PXA3xx-based"
595 select ARCH_HAS_CPUFREQ
597 select ARCH_REQUIRE_GPIOLIB
598 select GENERIC_CLOCKEVENTS
599 select HAVE_SCHED_CLOCK
604 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
609 select GENERIC_CLOCKEVENTS
610 select ARCH_REQUIRE_GPIOLIB
612 Support for Qualcomm MSM/QSD based systems. This runs on the
613 apps processor of the MSM/QSD and depends on a shared memory
614 interface to the modem processor which runs the baseband
615 stack and controls some vital subsystems
616 (clock and power control, etc).
619 bool "Renesas SH-Mobile"
621 Support for Renesas's SH-Mobile ARM platforms
628 select ARCH_MAY_HAVE_PC_FDC
629 select HAVE_PATA_PLATFORM
632 select ARCH_SPARSEMEM_ENABLE
633 select ARCH_USES_GETTIMEOFFSET
635 On the Acorn Risc-PC, Linux can support the internal IDE disk and
636 CD-ROM interface, serial and parallel port, and the floppy drive.
642 select ARCH_SPARSEMEM_ENABLE
644 select ARCH_HAS_CPUFREQ
646 select GENERIC_CLOCKEVENTS
648 select HAVE_SCHED_CLOCK
650 select ARCH_REQUIRE_GPIOLIB
652 Support for StrongARM 11x0 based boards.
655 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
657 select ARCH_HAS_CPUFREQ
659 select ARCH_USES_GETTIMEOFFSET
660 select HAVE_S3C2410_I2C if I2C
662 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
663 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
664 the Samsung SMDK2410 development board (and derivatives).
666 Note, the S3C2416 and the S3C2450 are so close that they even share
667 the same SoC ID code. This means that there is no seperate machine
668 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
671 bool "Samsung S3C64XX"
677 select ARCH_USES_GETTIMEOFFSET
678 select ARCH_HAS_CPUFREQ
679 select ARCH_REQUIRE_GPIOLIB
680 select SAMSUNG_CLKSRC
681 select SAMSUNG_IRQ_VIC_TIMER
682 select SAMSUNG_IRQ_UART
683 select S3C_GPIO_TRACK
684 select S3C_GPIO_PULL_UPDOWN
685 select S3C_GPIO_CFG_S3C24XX
686 select S3C_GPIO_CFG_S3C64XX
688 select USB_ARCH_HAS_OHCI
689 select SAMSUNG_GPIOLIB_4BIT
690 select HAVE_S3C2410_I2C if I2C
691 select HAVE_S3C2410_WATCHDOG if WATCHDOG
693 Samsung S3C64XX series based systems
696 bool "Samsung S5P6440 S5P6450"
700 select HAVE_S3C2410_WATCHDOG if WATCHDOG
701 select ARCH_USES_GETTIMEOFFSET
702 select HAVE_S3C2410_I2C if I2C
703 select HAVE_S3C_RTC if RTC_CLASS
705 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
709 bool "Samsung S5P6442"
713 select ARCH_USES_GETTIMEOFFSET
714 select HAVE_S3C2410_WATCHDOG if WATCHDOG
716 Samsung S5P6442 CPU based systems
719 bool "Samsung S5PC100"
723 select ARM_L1_CACHE_SHIFT_6
724 select ARCH_USES_GETTIMEOFFSET
725 select HAVE_S3C2410_I2C if I2C
726 select HAVE_S3C_RTC if RTC_CLASS
727 select HAVE_S3C2410_WATCHDOG if WATCHDOG
729 Samsung S5PC100 series based systems
732 bool "Samsung S5PV210/S5PC110"
734 select ARCH_SPARSEMEM_ENABLE
737 select ARM_L1_CACHE_SHIFT_6
738 select ARCH_HAS_CPUFREQ
739 select ARCH_USES_GETTIMEOFFSET
740 select HAVE_S3C2410_I2C if I2C
741 select HAVE_S3C_RTC if RTC_CLASS
742 select HAVE_S3C2410_WATCHDOG if WATCHDOG
744 Samsung S5PV210/S5PC110 series based systems
747 bool "Samsung S5PV310/S5PC210"
749 select ARCH_SPARSEMEM_ENABLE
752 select GENERIC_CLOCKEVENTS
753 select HAVE_S3C_RTC if RTC_CLASS
754 select HAVE_S3C2410_I2C if I2C
755 select HAVE_S3C2410_WATCHDOG if WATCHDOG
757 Samsung S5PV310 series based systems
766 select ARCH_USES_GETTIMEOFFSET
768 Support for the StrongARM based Digital DNARD machine, also known
769 as "Shark" (<http://www.shark-linux.de/shark.html>).
772 bool "Telechips TCC ARM926-based systems"
776 select GENERIC_CLOCKEVENTS
778 Support for Telechips TCC ARM926-based systems.
783 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
784 select ARCH_USES_GETTIMEOFFSET
786 Say Y here for systems based on one of the Sharp LH7A40X
787 System on a Chip processors. These CPUs include an ARM922T
788 core with a wide array of integrated devices for
789 hand-held and low-power applications.
792 bool "ST-Ericsson U300 Series"
795 select HAVE_SCHED_CLOCK
799 select GENERIC_CLOCKEVENTS
803 Support for ST-Ericsson U300 series mobile platforms.
806 bool "ST-Ericsson U8500 Series"
809 select GENERIC_CLOCKEVENTS
811 select ARCH_REQUIRE_GPIOLIB
813 Support for ST-Ericsson's Ux500 architecture
816 bool "STMicroelectronics Nomadik"
821 select GENERIC_CLOCKEVENTS
822 select ARCH_REQUIRE_GPIOLIB
824 Support for the Nomadik platform by ST-Ericsson
828 select GENERIC_CLOCKEVENTS
829 select ARCH_REQUIRE_GPIOLIB
833 select GENERIC_ALLOCATOR
834 select ARCH_HAS_HOLES_MEMORYMODEL
836 Support for TI's DaVinci platform.
841 select ARCH_REQUIRE_GPIOLIB
842 select ARCH_HAS_CPUFREQ
843 select GENERIC_CLOCKEVENTS
844 select HAVE_SCHED_CLOCK
845 select ARCH_HAS_HOLES_MEMORYMODEL
847 Support for TI's OMAP platform (OMAP1/2/3/4).
852 select ARCH_REQUIRE_GPIOLIB
854 select GENERIC_CLOCKEVENTS
857 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
862 # This is sorted alphabetically by mach-* pathname. However, plat-*
863 # Kconfigs may be included either alphabetically (according to the
864 # plat- suffix) or along side the corresponding mach-* source.
866 source "arch/arm/mach-aaec2000/Kconfig"
868 source "arch/arm/mach-at91/Kconfig"
870 source "arch/arm/mach-bcmring/Kconfig"
872 source "arch/arm/mach-clps711x/Kconfig"
874 source "arch/arm/mach-cns3xxx/Kconfig"
876 source "arch/arm/mach-davinci/Kconfig"
878 source "arch/arm/mach-dove/Kconfig"
880 source "arch/arm/mach-ep93xx/Kconfig"
882 source "arch/arm/mach-footbridge/Kconfig"
884 source "arch/arm/mach-gemini/Kconfig"
886 source "arch/arm/mach-h720x/Kconfig"
888 source "arch/arm/mach-integrator/Kconfig"
890 source "arch/arm/mach-iop32x/Kconfig"
892 source "arch/arm/mach-iop33x/Kconfig"
894 source "arch/arm/mach-iop13xx/Kconfig"
896 source "arch/arm/mach-ixp4xx/Kconfig"
898 source "arch/arm/mach-ixp2000/Kconfig"
900 source "arch/arm/mach-ixp23xx/Kconfig"
902 source "arch/arm/mach-kirkwood/Kconfig"
904 source "arch/arm/mach-ks8695/Kconfig"
906 source "arch/arm/mach-lh7a40x/Kconfig"
908 source "arch/arm/mach-loki/Kconfig"
910 source "arch/arm/mach-lpc32xx/Kconfig"
912 source "arch/arm/mach-msm/Kconfig"
914 source "arch/arm/mach-mv78xx0/Kconfig"
916 source "arch/arm/plat-mxc/Kconfig"
918 source "arch/arm/mach-netx/Kconfig"
920 source "arch/arm/mach-nomadik/Kconfig"
921 source "arch/arm/plat-nomadik/Kconfig"
923 source "arch/arm/mach-ns9xxx/Kconfig"
925 source "arch/arm/mach-nuc93x/Kconfig"
927 source "arch/arm/plat-omap/Kconfig"
929 source "arch/arm/mach-omap1/Kconfig"
931 source "arch/arm/mach-omap2/Kconfig"
933 source "arch/arm/mach-orion5x/Kconfig"
935 source "arch/arm/mach-pxa/Kconfig"
936 source "arch/arm/plat-pxa/Kconfig"
938 source "arch/arm/mach-mmp/Kconfig"
940 source "arch/arm/mach-realview/Kconfig"
942 source "arch/arm/mach-sa1100/Kconfig"
944 source "arch/arm/plat-samsung/Kconfig"
945 source "arch/arm/plat-s3c24xx/Kconfig"
946 source "arch/arm/plat-s5p/Kconfig"
948 source "arch/arm/plat-spear/Kconfig"
950 source "arch/arm/plat-tcc/Kconfig"
953 source "arch/arm/mach-s3c2400/Kconfig"
954 source "arch/arm/mach-s3c2410/Kconfig"
955 source "arch/arm/mach-s3c2412/Kconfig"
956 source "arch/arm/mach-s3c2416/Kconfig"
957 source "arch/arm/mach-s3c2440/Kconfig"
958 source "arch/arm/mach-s3c2443/Kconfig"
962 source "arch/arm/mach-s3c64xx/Kconfig"
965 source "arch/arm/mach-s5p64x0/Kconfig"
967 source "arch/arm/mach-s5p6442/Kconfig"
969 source "arch/arm/mach-s5pc100/Kconfig"
971 source "arch/arm/mach-s5pv210/Kconfig"
973 source "arch/arm/mach-s5pv310/Kconfig"
975 source "arch/arm/mach-shmobile/Kconfig"
977 source "arch/arm/plat-stmp3xxx/Kconfig"
979 source "arch/arm/mach-tegra/Kconfig"
981 source "arch/arm/mach-u300/Kconfig"
983 source "arch/arm/mach-ux500/Kconfig"
985 source "arch/arm/mach-versatile/Kconfig"
987 source "arch/arm/mach-vexpress/Kconfig"
989 source "arch/arm/mach-w90x900/Kconfig"
991 # Definitions to make life easier
997 select GENERIC_CLOCKEVENTS
998 select HAVE_SCHED_CLOCK
1002 select HAVE_SCHED_CLOCK
1007 config PLAT_VERSATILE
1010 config ARM_TIMER_SP804
1013 source arch/arm/mm/Kconfig
1016 bool "Enable iWMMXt support"
1017 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
1018 default y if PXA27x || PXA3xx || ARCH_MMP
1020 Enable support for iWMMXt context switching at run time if
1021 running on a CPU that supports it.
1023 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1026 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1030 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1031 (!ARCH_OMAP3 || OMAP3_EMU)
1036 source "arch/arm/Kconfig-nommu"
1039 config ARM_ERRATA_411920
1040 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1043 Invalidation of the Instruction Cache operation can
1044 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1045 It does not affect the MPCore. This option enables the ARM Ltd.
1046 recommended workaround.
1048 config ARM_ERRATA_430973
1049 bool "ARM errata: Stale prediction on replaced interworking branch"
1052 This option enables the workaround for the 430973 Cortex-A8
1053 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1054 interworking branch is replaced with another code sequence at the
1055 same virtual address, whether due to self-modifying code or virtual
1056 to physical address re-mapping, Cortex-A8 does not recover from the
1057 stale interworking branch prediction. This results in Cortex-A8
1058 executing the new code sequence in the incorrect ARM or Thumb state.
1059 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1060 and also flushes the branch target cache at every context switch.
1061 Note that setting specific bits in the ACTLR register may not be
1062 available in non-secure mode.
1064 config ARM_ERRATA_458693
1065 bool "ARM errata: Processor deadlock when a false hazard is created"
1068 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1069 erratum. For very specific sequences of memory operations, it is
1070 possible for a hazard condition intended for a cache line to instead
1071 be incorrectly associated with a different cache line. This false
1072 hazard might then cause a processor deadlock. The workaround enables
1073 the L1 caching of the NEON accesses and disables the PLD instruction
1074 in the ACTLR register. Note that setting specific bits in the ACTLR
1075 register may not be available in non-secure mode.
1077 config ARM_ERRATA_460075
1078 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1081 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1082 erratum. Any asynchronous access to the L2 cache may encounter a
1083 situation in which recent store transactions to the L2 cache are lost
1084 and overwritten with stale memory contents from external memory. The
1085 workaround disables the write-allocate mode for the L2 cache via the
1086 ACTLR register. Note that setting specific bits in the ACTLR register
1087 may not be available in non-secure mode.
1089 config ARM_ERRATA_742230
1090 bool "ARM errata: DMB operation may be faulty"
1091 depends on CPU_V7 && SMP
1093 This option enables the workaround for the 742230 Cortex-A9
1094 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1095 between two write operations may not ensure the correct visibility
1096 ordering of the two writes. This workaround sets a specific bit in
1097 the diagnostic register of the Cortex-A9 which causes the DMB
1098 instruction to behave as a DSB, ensuring the correct behaviour of
1101 config ARM_ERRATA_742231
1102 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1103 depends on CPU_V7 && SMP
1105 This option enables the workaround for the 742231 Cortex-A9
1106 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1107 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1108 accessing some data located in the same cache line, may get corrupted
1109 data due to bad handling of the address hazard when the line gets
1110 replaced from one of the CPUs at the same time as another CPU is
1111 accessing it. This workaround sets specific bits in the diagnostic
1112 register of the Cortex-A9 which reduces the linefill issuing
1113 capabilities of the processor.
1115 config PL310_ERRATA_588369
1116 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1117 depends on CACHE_L2X0 && ARCH_OMAP4
1119 The PL310 L2 cache controller implements three types of Clean &
1120 Invalidate maintenance operations: by Physical Address
1121 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1122 They are architecturally defined to behave as the execution of a
1123 clean operation followed immediately by an invalidate operation,
1124 both performing to the same memory location. This functionality
1125 is not correctly implemented in PL310 as clean lines are not
1126 invalidated as a result of these operations. Note that this errata
1127 uses Texas Instrument's secure monitor api.
1129 config ARM_ERRATA_720789
1130 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1131 depends on CPU_V7 && SMP
1133 This option enables the workaround for the 720789 Cortex-A9 (prior to
1134 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1135 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1136 As a consequence of this erratum, some TLB entries which should be
1137 invalidated are not, resulting in an incoherency in the system page
1138 tables. The workaround changes the TLB flushing routines to invalidate
1139 entries regardless of the ASID.
1141 config ARM_ERRATA_743622
1142 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1145 This option enables the workaround for the 743622 Cortex-A9
1146 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1147 optimisation in the Cortex-A9 Store Buffer may lead to data
1148 corruption. This workaround sets a specific bit in the diagnostic
1149 register of the Cortex-A9 which disables the Store Buffer
1150 optimisation, preventing the defect from occurring. This has no
1151 visible impact on the overall performance or power consumption of the
1156 source "arch/arm/common/Kconfig"
1166 Find out whether you have ISA slots on your motherboard. ISA is the
1167 name of a bus system, i.e. the way the CPU talks to the other stuff
1168 inside your box. Other bus systems are PCI, EISA, MicroChannel
1169 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1170 newer boards don't support it. If you have ISA, say Y, otherwise N.
1172 # Select ISA DMA controller support
1177 # Select ISA DMA interface
1182 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1184 Find out whether you have a PCI motherboard. PCI is the name of a
1185 bus system, i.e. the way the CPU talks to the other stuff inside
1186 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1187 VESA. If you have PCI, say Y, otherwise N.
1196 # Select the host bridge type
1197 config PCI_HOST_VIA82C505
1199 depends on PCI && ARCH_SHARK
1202 config PCI_HOST_ITE8152
1204 depends on PCI && MACH_ARMCORE
1208 source "drivers/pci/Kconfig"
1210 source "drivers/pcmcia/Kconfig"
1214 menu "Kernel Features"
1216 source "kernel/time/Kconfig"
1219 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1220 depends on EXPERIMENTAL
1221 depends on GENERIC_CLOCKEVENTS
1222 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1223 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1224 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1226 select USE_GENERIC_SMP_HELPERS
1227 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1229 This enables support for systems with more than one CPU. If you have
1230 a system with only one CPU, like most personal computers, say N. If
1231 you have a system with more than one CPU, say Y.
1233 If you say N here, the kernel will run on single and multiprocessor
1234 machines, but will use only one CPU of a multiprocessor machine. If
1235 you say Y here, the kernel will run on many, but not all, single
1236 processor machines. On a single processor machine, the kernel will
1237 run faster if you say N here.
1239 See also <file:Documentation/i386/IO-APIC.txt>,
1240 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1241 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1243 If you don't know what to do here, say N.
1246 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1247 depends on EXPERIMENTAL
1248 depends on SMP && !XIP && !THUMB2_KERNEL
1251 SMP kernels contain instructions which fail on non-SMP processors.
1252 Enabling this option allows the kernel to modify itself to make
1253 these instructions safe. Disabling it allows about 1K of space
1256 If you don't know what to do here, say Y.
1262 This option enables support for the ARM system coherency unit
1268 This options enables support for the ARM timer and watchdog unit
1271 prompt "Memory split"
1274 Select the desired split between kernel and user memory.
1276 If you are not absolutely sure what you are doing, leave this
1280 bool "3G/1G user/kernel split"
1282 bool "2G/2G user/kernel split"
1284 bool "1G/3G user/kernel split"
1289 default 0x40000000 if VMSPLIT_1G
1290 default 0x80000000 if VMSPLIT_2G
1294 int "Maximum number of CPUs (2-32)"
1300 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1301 depends on SMP && HOTPLUG && EXPERIMENTAL
1302 depends on !ARCH_MSM
1304 Say Y here to experiment with turning CPUs off and on. CPUs
1305 can be controlled through /sys/devices/system/cpu.
1308 bool "Use local timer interrupts"
1311 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
1313 Enable support for local timers on SMP platforms, rather then the
1314 legacy IPI broadcast method. Local timers allows the system
1315 accounting to be spread across the timer interval, preventing a
1316 "thundering herd" at every timer tick.
1318 source kernel/Kconfig.preempt
1322 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1323 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1324 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1325 default AT91_TIMER_HZ if ARCH_AT91
1326 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1329 config THUMB2_KERNEL
1330 bool "Compile the kernel in Thumb-2 mode"
1331 depends on CPU_V7 && EXPERIMENTAL
1333 select ARM_ASM_UNIFIED
1335 By enabling this option, the kernel will be compiled in
1336 Thumb-2 mode. A compiler/assembler that understand the unified
1337 ARM-Thumb syntax is needed.
1341 config ARM_ASM_UNIFIED
1345 bool "Use the ARM EABI to compile the kernel"
1347 This option allows for the kernel to be compiled using the latest
1348 ARM ABI (aka EABI). This is only useful if you are using a user
1349 space environment that is also compiled with EABI.
1351 Since there are major incompatibilities between the legacy ABI and
1352 EABI, especially with regard to structure member alignment, this
1353 option also changes the kernel syscall calling convention to
1354 disambiguate both ABIs and allow for backward compatibility support
1355 (selected with CONFIG_OABI_COMPAT).
1357 To use this you need GCC version 4.0.0 or later.
1360 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1361 depends on AEABI && EXPERIMENTAL
1364 This option preserves the old syscall interface along with the
1365 new (ARM EABI) one. It also provides a compatibility layer to
1366 intercept syscalls that have structure arguments which layout
1367 in memory differs between the legacy ABI and the new ARM EABI
1368 (only for non "thumb" binaries). This option adds a tiny
1369 overhead to all syscalls and produces a slightly larger kernel.
1370 If you know you'll be using only pure EABI user space then you
1371 can say N here. If this option is not selected and you attempt
1372 to execute a legacy ABI binary then the result will be
1373 UNPREDICTABLE (in fact it can be predicted that it won't work
1374 at all). If in doubt say Y.
1376 config ARCH_HAS_HOLES_MEMORYMODEL
1379 config ARCH_SPARSEMEM_ENABLE
1382 config ARCH_SPARSEMEM_DEFAULT
1383 def_bool ARCH_SPARSEMEM_ENABLE
1385 config ARCH_SELECT_MEMORY_MODEL
1386 def_bool ARCH_SPARSEMEM_ENABLE
1389 bool "High Memory Support (EXPERIMENTAL)"
1390 depends on MMU && EXPERIMENTAL
1392 The address space of ARM processors is only 4 Gigabytes large
1393 and it has to accommodate user address space, kernel address
1394 space as well as some memory mapped IO. That means that, if you
1395 have a large amount of physical memory and/or IO, not all of the
1396 memory can be "permanently mapped" by the kernel. The physical
1397 memory that is not permanently mapped is called "high memory".
1399 Depending on the selected kernel/user memory split, minimum
1400 vmalloc space and actual amount of RAM, you may not need this
1401 option which should result in a slightly faster kernel.
1406 bool "Allocate 2nd-level pagetables from highmem"
1408 depends on !OUTER_CACHE
1410 config HW_PERF_EVENTS
1411 bool "Enable hardware performance counter support for perf events"
1412 depends on PERF_EVENTS && CPU_HAS_PMU
1415 Enable hardware performance counter support for perf events. If
1416 disabled, perf events will use software events only.
1421 This enables support for sparse irqs. This is useful in general
1422 as most CPUs have a fairly sparse array of IRQ vectors, which
1423 the irq_desc then maps directly on to. Systems with a high
1424 number of off-chip IRQs will want to treat this as
1425 experimental until they have been independently verified.
1429 config FORCE_MAX_ZONEORDER
1430 int "Maximum zone order" if ARCH_SHMOBILE
1431 range 11 64 if ARCH_SHMOBILE
1432 default "9" if SA1111
1435 The kernel memory allocator divides physically contiguous memory
1436 blocks into "zones", where each zone is a power of two number of
1437 pages. This option selects the largest power of two that the kernel
1438 keeps in the memory allocator. If you need to allocate very large
1439 blocks of physically contiguous memory, then you may need to
1440 increase this value.
1442 This config option is actually maximum order plus one. For example,
1443 a value of 11 means that the largest free memory block is 2^10 pages.
1446 bool "Timer and CPU usage LEDs"
1447 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1448 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1449 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1450 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1451 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1452 ARCH_AT91 || ARCH_DAVINCI || \
1453 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1455 If you say Y here, the LEDs on your machine will be used
1456 to provide useful information about your current system status.
1458 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1459 be able to select which LEDs are active using the options below. If
1460 you are compiling a kernel for the EBSA-110 or the LART however, the
1461 red LED will simply flash regularly to indicate that the system is
1462 still functional. It is safe to say Y here if you have a CATS
1463 system, but the driver will do nothing.
1466 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1467 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1468 || MACH_OMAP_PERSEUS2
1470 depends on !GENERIC_CLOCKEVENTS
1471 default y if ARCH_EBSA110
1473 If you say Y here, one of the system LEDs (the green one on the
1474 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1475 will flash regularly to indicate that the system is still
1476 operational. This is mainly useful to kernel hackers who are
1477 debugging unstable kernels.
1479 The LART uses the same LED for both Timer LED and CPU usage LED
1480 functions. You may choose to use both, but the Timer LED function
1481 will overrule the CPU usage LED.
1484 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1486 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1487 || MACH_OMAP_PERSEUS2
1490 If you say Y here, the red LED will be used to give a good real
1491 time indication of CPU usage, by lighting whenever the idle task
1492 is not currently executing.
1494 The LART uses the same LED for both Timer LED and CPU usage LED
1495 functions. You may choose to use both, but the Timer LED function
1496 will overrule the CPU usage LED.
1498 config ALIGNMENT_TRAP
1500 depends on CPU_CP15_MMU
1501 default y if !ARCH_EBSA110
1502 select HAVE_PROC_CPU if PROC_FS
1504 ARM processors cannot fetch/store information which is not
1505 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1506 address divisible by 4. On 32-bit ARM processors, these non-aligned
1507 fetch/store instructions will be emulated in software if you say
1508 here, which has a severe performance impact. This is necessary for
1509 correct operation of some network protocols. With an IP-only
1510 configuration it is safe to say N, otherwise say Y.
1512 config UACCESS_WITH_MEMCPY
1513 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1514 depends on MMU && EXPERIMENTAL
1515 default y if CPU_FEROCEON
1517 Implement faster copy_to_user and clear_user methods for CPU
1518 cores where a 8-word STM instruction give significantly higher
1519 memory write throughput than a sequence of individual 32bit stores.
1521 A possible side effect is a slight increase in scheduling latency
1522 between threads sharing the same address space if they invoke
1523 such copy operations with large buffers.
1525 However, if the CPU data cache is using a write-allocate mode,
1526 this option is unlikely to provide any performance gain.
1530 prompt "Enable seccomp to safely compute untrusted bytecode"
1532 This kernel feature is useful for number crunching applications
1533 that may need to compute untrusted bytecode during their
1534 execution. By using pipes or other transports made available to
1535 the process as file descriptors supporting the read/write
1536 syscalls, it's possible to isolate those applications in
1537 their own address space using seccomp. Once seccomp is
1538 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1539 and the task is only allowed to execute a few safe syscalls
1540 defined by each seccomp mode.
1542 config CC_STACKPROTECTOR
1543 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1545 This option turns on the -fstack-protector GCC feature. This
1546 feature puts, at the beginning of functions, a canary value on
1547 the stack just before the return address, and validates
1548 the value just before actually returning. Stack based buffer
1549 overflows (that need to overwrite this return address) now also
1550 overwrite the canary, which gets detected and the attack is then
1551 neutralized via a kernel panic.
1552 This feature requires gcc version 4.2 or above.
1554 config DEPRECATED_PARAM_STRUCT
1555 bool "Provide old way to pass kernel parameters"
1557 This was deprecated in 2001 and announced to live on for 5 years.
1558 Some old boot loaders still use this way.
1564 # Compressed boot loader in ROM. Yes, we really want to ask about
1565 # TEXT and BSS so we preserve their values in the config files.
1566 config ZBOOT_ROM_TEXT
1567 hex "Compressed ROM boot loader base address"
1570 The physical address at which the ROM-able zImage is to be
1571 placed in the target. Platforms which normally make use of
1572 ROM-able zImage formats normally set this to a suitable
1573 value in their defconfig file.
1575 If ZBOOT_ROM is not enabled, this has no effect.
1577 config ZBOOT_ROM_BSS
1578 hex "Compressed ROM boot loader BSS address"
1581 The base address of an area of read/write memory in the target
1582 for the ROM-able zImage which must be available while the
1583 decompressor is running. It must be large enough to hold the
1584 entire decompressed kernel plus an additional 128 KiB.
1585 Platforms which normally make use of ROM-able zImage formats
1586 normally set this to a suitable value in their defconfig file.
1588 If ZBOOT_ROM is not enabled, this has no effect.
1591 bool "Compressed boot loader in ROM/flash"
1592 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1594 Say Y here if you intend to execute your compressed kernel image
1595 (zImage) directly from ROM or flash. If unsure, say N.
1598 string "Default kernel command string"
1601 On some architectures (EBSA110 and CATS), there is currently no way
1602 for the boot loader to pass arguments to the kernel. For these
1603 architectures, you should supply some command-line options at build
1604 time by entering them here. As a minimum, you should specify the
1605 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1607 config CMDLINE_FORCE
1608 bool "Always use the default kernel command string"
1609 depends on CMDLINE != ""
1611 Always use the default kernel command string, even if the boot
1612 loader passes other arguments to the kernel.
1613 This is useful if you cannot or don't want to change the
1614 command-line options your boot loader passes to the kernel.
1619 bool "Kernel Execute-In-Place from ROM"
1620 depends on !ZBOOT_ROM
1622 Execute-In-Place allows the kernel to run from non-volatile storage
1623 directly addressable by the CPU, such as NOR flash. This saves RAM
1624 space since the text section of the kernel is not loaded from flash
1625 to RAM. Read-write sections, such as the data section and stack,
1626 are still copied to RAM. The XIP kernel is not compressed since
1627 it has to run directly from flash, so it will take more space to
1628 store it. The flash address used to link the kernel object files,
1629 and for storing it, is configuration dependent. Therefore, if you
1630 say Y here, you must know the proper physical address where to
1631 store the kernel image depending on your own flash memory usage.
1633 Also note that the make target becomes "make xipImage" rather than
1634 "make zImage" or "make Image". The final kernel binary to put in
1635 ROM memory will be arch/arm/boot/xipImage.
1639 config XIP_PHYS_ADDR
1640 hex "XIP Kernel Physical Location"
1641 depends on XIP_KERNEL
1642 default "0x00080000"
1644 This is the physical address in your flash memory the kernel will
1645 be linked for and stored to. This address is dependent on your
1649 bool "Kexec system call (EXPERIMENTAL)"
1650 depends on EXPERIMENTAL
1652 kexec is a system call that implements the ability to shutdown your
1653 current kernel, and to start another kernel. It is like a reboot
1654 but it is independent of the system firmware. And like a reboot
1655 you can start any kernel with it, not just Linux.
1657 It is an ongoing process to be certain the hardware in a machine
1658 is properly shutdown, so do not be surprised if this code does not
1659 initially work for you. It may help to enable device hotplugging
1663 bool "Export atags in procfs"
1667 Should the atags used to boot the kernel be exported in an "atags"
1668 file in procfs. Useful with kexec.
1670 config AUTO_ZRELADDR
1671 bool "Auto calculation of the decompressed kernel image address"
1672 depends on !ZBOOT_ROM && !ARCH_U300
1674 ZRELADDR is the physical address where the decompressed kernel
1675 image will be placed. If AUTO_ZRELADDR is selected, the address
1676 will be determined at run-time by masking the current IP with
1677 0xf8000000. This assumes the zImage being placed in the first 128MB
1678 from start of memory.
1682 menu "CPU Power Management"
1686 source "drivers/cpufreq/Kconfig"
1689 tristate "CPUfreq driver for i.MX CPUs"
1690 depends on ARCH_MXC && CPU_FREQ
1692 This enables the CPUfreq driver for i.MX CPUs.
1694 config CPU_FREQ_SA1100
1697 config CPU_FREQ_SA1110
1700 config CPU_FREQ_INTEGRATOR
1701 tristate "CPUfreq driver for ARM Integrator CPUs"
1702 depends on ARCH_INTEGRATOR && CPU_FREQ
1705 This enables the CPUfreq driver for ARM Integrator CPUs.
1707 For details, take a look at <file:Documentation/cpu-freq>.
1713 depends on CPU_FREQ && ARCH_PXA && PXA25x
1715 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1717 config CPU_FREQ_S3C64XX
1718 bool "CPUfreq support for Samsung S3C64XX CPUs"
1719 depends on CPU_FREQ && CPU_S3C6410
1724 Internal configuration node for common cpufreq on Samsung SoC
1726 config CPU_FREQ_S3C24XX
1727 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1728 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1731 This enables the CPUfreq driver for the Samsung S3C24XX family
1734 For details, take a look at <file:Documentation/cpu-freq>.
1738 config CPU_FREQ_S3C24XX_PLL
1739 bool "Support CPUfreq changing of PLL frequency"
1740 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1742 Compile in support for changing the PLL frequency from the
1743 S3C24XX series CPUfreq driver. The PLL takes time to settle
1744 after a frequency change, so by default it is not enabled.
1746 This also means that the PLL tables for the selected CPU(s) will
1747 be built which may increase the size of the kernel image.
1749 config CPU_FREQ_S3C24XX_DEBUG
1750 bool "Debug CPUfreq Samsung driver core"
1751 depends on CPU_FREQ_S3C24XX
1753 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1755 config CPU_FREQ_S3C24XX_IODEBUG
1756 bool "Debug CPUfreq Samsung driver IO timing"
1757 depends on CPU_FREQ_S3C24XX
1759 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1761 config CPU_FREQ_S3C24XX_DEBUGFS
1762 bool "Export debugfs for CPUFreq"
1763 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1765 Export status information via debugfs.
1769 source "drivers/cpuidle/Kconfig"
1773 menu "Floating point emulation"
1775 comment "At least one emulation must be selected"
1778 bool "NWFPE math emulation"
1779 depends on !AEABI || OABI_COMPAT
1781 Say Y to include the NWFPE floating point emulator in the kernel.
1782 This is necessary to run most binaries. Linux does not currently
1783 support floating point hardware so you need to say Y here even if
1784 your machine has an FPA or floating point co-processor podule.
1786 You may say N here if you are going to load the Acorn FPEmulator
1787 early in the bootup.
1790 bool "Support extended precision"
1791 depends on FPE_NWFPE
1793 Say Y to include 80-bit support in the kernel floating-point
1794 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1795 Note that gcc does not generate 80-bit operations by default,
1796 so in most cases this option only enlarges the size of the
1797 floating point emulator without any good reason.
1799 You almost surely want to say N here.
1802 bool "FastFPE math emulation (EXPERIMENTAL)"
1803 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1805 Say Y here to include the FAST floating point emulator in the kernel.
1806 This is an experimental much faster emulator which now also has full
1807 precision for the mantissa. It does not support any exceptions.
1808 It is very simple, and approximately 3-6 times faster than NWFPE.
1810 It should be sufficient for most programs. It may be not suitable
1811 for scientific calculations, but you have to check this for yourself.
1812 If you do not feel you need a faster FP emulation you should better
1816 bool "VFP-format floating point maths"
1817 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1819 Say Y to include VFP support code in the kernel. This is needed
1820 if your hardware includes a VFP unit.
1822 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1823 release notes and additional status information.
1825 Say N if your target does not have VFP hardware.
1833 bool "Advanced SIMD (NEON) Extension support"
1834 depends on VFPv3 && CPU_V7
1836 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1841 menu "Userspace binary formats"
1843 source "fs/Kconfig.binfmt"
1846 tristate "RISC OS personality"
1849 Say Y here to include the kernel code necessary if you want to run
1850 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1851 experimental; if this sounds frightening, say N and sleep in peace.
1852 You can also say M here to compile this support as a module (which
1853 will be called arthur).
1857 menu "Power management options"
1859 source "kernel/power/Kconfig"
1861 config ARCH_SUSPEND_POSSIBLE
1866 source "net/Kconfig"
1868 source "drivers/Kconfig"
1872 source "arch/arm/Kconfig.debug"
1874 source "security/Kconfig"
1876 source "crypto/Kconfig"
1878 source "lib/Kconfig"