8 select SYS_SUPPORTS_APM_EMULATION
9 select GENERIC_ATOMIC64 if (!CPU_32v6K)
10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_KPROBES if (!XIP_KERNEL)
13 select HAVE_KRETPROBES if (HAVE_KPROBES)
14 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
15 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
16 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
17 select HAVE_GENERIC_DMA_COHERENT
18 select HAVE_KERNEL_GZIP
19 select HAVE_KERNEL_LZO
20 select HAVE_KERNEL_LZMA
22 select HAVE_PERF_EVENTS
23 select PERF_USE_VMALLOC
24 select HAVE_REGS_AND_STACK_ACCESS_API
25 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
27 The ARM series is a line of low-power-consumption RISC chip designs
28 licensed by ARM Ltd and targeted at embedded applications and
29 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
30 manufactured, but legacy ARM-based PC hardware remains popular in
31 Europe. There is an ARM Linux project with a web page at
32 <http://www.arm.linux.org.uk/>.
37 config SYS_SUPPORTS_APM_EMULATION
43 config ARCH_USES_GETTIMEOFFSET
47 config GENERIC_CLOCKEVENTS
50 config GENERIC_CLOCKEVENTS_BROADCAST
52 depends on GENERIC_CLOCKEVENTS
57 select GENERIC_ALLOCATOR
68 The Extended Industry Standard Architecture (EISA) bus was
69 developed as an open alternative to the IBM MicroChannel bus.
71 The EISA bus provided some of the features of the IBM MicroChannel
72 bus while maintaining backward compatibility with cards made for
73 the older ISA bus. The EISA bus saw limited use between 1988 and
74 1995 when it was made obsolete by the PCI bus.
76 Say Y here if you are building a kernel for an EISA-based machine.
86 MicroChannel Architecture is found in some IBM PS/2 machines and
87 laptops. It is a bus system similar to PCI or ISA. See
88 <file:Documentation/mca.txt> (and especially the web page given
89 there) before attempting to build an MCA bus kernel.
91 config GENERIC_HARDIRQS
95 config STACKTRACE_SUPPORT
99 config HAVE_LATENCYTOP_SUPPORT
104 config LOCKDEP_SUPPORT
108 config TRACE_IRQFLAGS_SUPPORT
112 config HARDIRQS_SW_RESEND
116 config GENERIC_IRQ_PROBE
120 config GENERIC_LOCKBREAK
123 depends on SMP && PREEMPT
125 config RWSEM_GENERIC_SPINLOCK
129 config RWSEM_XCHGADD_ALGORITHM
132 config ARCH_HAS_ILOG2_U32
135 config ARCH_HAS_ILOG2_U64
138 config ARCH_HAS_CPUFREQ
141 Internal node to signify that the ARCH has CPUFREQ support
142 and that the relevant menu configurations are displayed for
145 config ARCH_HAS_CPU_IDLE_WAIT
148 config GENERIC_HWEIGHT
152 config GENERIC_CALIBRATE_DELAY
156 config ARCH_MAY_HAVE_PC_FDC
162 config NEED_DMA_MAP_STATE
165 config GENERIC_ISA_DMA
174 config GENERIC_HARDIRQS_NO__DO_IRQ
177 config ARM_L1_CACHE_SHIFT_6
180 Setting ARM L1 cache line size to 64 Bytes.
184 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
185 default DRAM_BASE if REMAP_VECTORS_TO_RAM
188 The base address of exception vectors.
190 source "init/Kconfig"
192 source "kernel/Kconfig.freezer"
197 bool "MMU-based Paged Memory Management Support"
200 Select if you want MMU-based virtualised addressing space
201 support by paged memory management. If unsure, say 'Y'.
204 # The "ARM system type" choice list is ordered alphabetically by option
205 # text. Please add new entries in the option alphabetic order.
208 prompt "ARM system type"
209 default ARCH_VERSATILE
212 bool "Agilent AAEC-2000 based"
216 select ARCH_USES_GETTIMEOFFSET
218 This enables support for systems based on the Agilent AAEC-2000
220 config ARCH_INTEGRATOR
221 bool "ARM Ltd. Integrator family"
223 select ARCH_HAS_CPUFREQ
226 select GENERIC_CLOCKEVENTS
227 select PLAT_VERSATILE
229 Support for ARM's Integrator platform.
232 bool "ARM Ltd. RealView family"
236 select GENERIC_CLOCKEVENTS
237 select ARCH_WANT_OPTIONAL_GPIOLIB
238 select PLAT_VERSATILE
239 select ARM_TIMER_SP804
240 select GPIO_PL061 if GPIOLIB
242 This enables support for ARM Ltd RealView boards.
244 config ARCH_VERSATILE
245 bool "ARM Ltd. Versatile family"
250 select GENERIC_CLOCKEVENTS
251 select ARCH_WANT_OPTIONAL_GPIOLIB
252 select PLAT_VERSATILE
253 select ARM_TIMER_SP804
255 This enables support for ARM Ltd Versatile board.
258 bool "ARM Ltd. Versatile Express family"
259 select ARCH_WANT_OPTIONAL_GPIOLIB
261 select ARM_TIMER_SP804
263 select GENERIC_CLOCKEVENTS
266 select PLAT_VERSATILE
268 This enables support for the ARM Ltd Versatile Express boards.
272 select ARCH_REQUIRE_GPIOLIB
275 This enables support for systems based on the Atmel AT91RM9200,
276 AT91SAM9 and AT91CAP9 processors.
279 bool "Broadcom BCMRING"
284 select GENERIC_CLOCKEVENTS
285 select ARCH_WANT_OPTIONAL_GPIOLIB
287 Support for Broadcom's BCMRing platform.
290 bool "Cirrus Logic CLPS711x/EP721x-based"
292 select ARCH_USES_GETTIMEOFFSET
294 Support for Cirrus Logic 711x/721x based boards.
297 bool "Cavium Networks CNS3XXX family"
299 select GENERIC_CLOCKEVENTS
301 select PCI_DOMAINS if PCI
303 Support for Cavium Networks CNS3XXX platform.
306 bool "Cortina Systems Gemini"
308 select ARCH_REQUIRE_GPIOLIB
309 select ARCH_USES_GETTIMEOFFSET
311 Support for the Cortina Systems Gemini family SoCs
318 select ARCH_USES_GETTIMEOFFSET
320 This is an evaluation board for the StrongARM processor available
321 from Digital. It has limited hardware on-board, including an
322 Ethernet interface, two PCMCIA sockets, two serial ports and a
331 select ARCH_REQUIRE_GPIOLIB
332 select ARCH_HAS_HOLES_MEMORYMODEL
333 select ARCH_USES_GETTIMEOFFSET
335 This enables support for the Cirrus EP93xx series of CPUs.
337 config ARCH_FOOTBRIDGE
341 select ARCH_USES_GETTIMEOFFSET
343 Support for systems based on the DC21285 companion chip
344 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
347 bool "Freescale MXC/iMX-based"
348 select GENERIC_CLOCKEVENTS
349 select ARCH_REQUIRE_GPIOLIB
352 Support for Freescale MXC/iMX-based family of processors
355 bool "Freescale STMP3xxx"
358 select ARCH_REQUIRE_GPIOLIB
359 select GENERIC_CLOCKEVENTS
360 select USB_ARCH_HAS_EHCI
362 Support for systems based on the Freescale 3xxx CPUs.
365 bool "Hilscher NetX based"
368 select GENERIC_CLOCKEVENTS
370 This enables support for systems based on the Hilscher NetX Soc
373 bool "Hynix HMS720x-based"
376 select ARCH_USES_GETTIMEOFFSET
378 This enables support for systems based on the Hynix HMS720x
386 select ARCH_SUPPORTS_MSI
389 Support for Intel's IOP13XX (XScale) family of processors.
397 select ARCH_REQUIRE_GPIOLIB
399 Support for Intel's 80219 and IOP32X (XScale) family of
408 select ARCH_REQUIRE_GPIOLIB
410 Support for Intel's IOP33X (XScale) family of processors.
417 select ARCH_USES_GETTIMEOFFSET
419 Support for Intel's IXP23xx (XScale) family of processors.
422 bool "IXP2400/2800-based"
426 select ARCH_USES_GETTIMEOFFSET
428 Support for Intel's IXP2400/2800 (XScale) family of processors.
435 select GENERIC_CLOCKEVENTS
436 select DMABOUNCE if PCI
438 Support for Intel's IXP4XX (XScale) family of processors.
443 select ARCH_REQUIRE_GPIOLIB
444 select GENERIC_CLOCKEVENTS
447 Support for the Marvell Dove SoC 88AP510
450 bool "Marvell Kirkwood"
453 select ARCH_REQUIRE_GPIOLIB
454 select GENERIC_CLOCKEVENTS
457 Support for the following Marvell Kirkwood series SoCs:
458 88F6180, 88F6192 and 88F6281.
461 bool "Marvell Loki (88RC8480)"
463 select GENERIC_CLOCKEVENTS
466 Support for the Marvell Loki (88RC8480) SoC.
471 select ARCH_REQUIRE_GPIOLIB
474 select USB_ARCH_HAS_OHCI
477 select GENERIC_CLOCKEVENTS
479 Support for the NXP LPC32XX family of processors
482 bool "Marvell MV78xx0"
485 select ARCH_REQUIRE_GPIOLIB
486 select GENERIC_CLOCKEVENTS
489 Support for the following Marvell MV78xx0 series SoCs:
497 select ARCH_REQUIRE_GPIOLIB
498 select GENERIC_CLOCKEVENTS
501 Support for the following Marvell Orion 5x series SoCs:
502 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
503 Orion-2 (5281), Orion-1-90 (6183).
506 bool "Marvell PXA168/910/MMP2"
508 select ARCH_REQUIRE_GPIOLIB
510 select GENERIC_CLOCKEVENTS
515 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
518 bool "Micrel/Kendin KS8695"
520 select ARCH_REQUIRE_GPIOLIB
521 select ARCH_USES_GETTIMEOFFSET
523 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
524 System-on-Chip devices.
527 bool "NetSilicon NS9xxx"
530 select GENERIC_CLOCKEVENTS
533 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
536 <http://www.digi.com/products/microprocessors/index.jsp>
539 bool "Nuvoton W90X900 CPU"
541 select ARCH_REQUIRE_GPIOLIB
543 select GENERIC_CLOCKEVENTS
545 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
546 At present, the w90x900 has been renamed nuc900, regarding
547 the ARM series product line, you can login the following
548 link address to know more.
550 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
551 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
554 bool "Nuvoton NUC93X CPU"
558 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
559 low-power and high performance MPEG-4/JPEG multimedia controller chip.
564 select GENERIC_CLOCKEVENTS
568 select ARCH_HAS_BARRIERS if CACHE_L2X0
569 select ARCH_HAS_CPUFREQ
571 This enables support for NVIDIA Tegra based systems (Tegra APX,
572 Tegra 6xx and Tegra 2 series).
575 bool "Philips Nexperia PNX4008 Mobile"
578 select ARCH_USES_GETTIMEOFFSET
580 This enables support for Philips PNX4008 mobile platform.
583 bool "PXA2xx/PXA3xx-based"
586 select ARCH_HAS_CPUFREQ
588 select ARCH_REQUIRE_GPIOLIB
589 select GENERIC_CLOCKEVENTS
594 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
599 select GENERIC_CLOCKEVENTS
600 select ARCH_REQUIRE_GPIOLIB
602 Support for Qualcomm MSM/QSD based systems. This runs on the
603 apps processor of the MSM/QSD and depends on a shared memory
604 interface to the modem processor which runs the baseband
605 stack and controls some vital subsystems
606 (clock and power control, etc).
609 bool "Renesas SH-Mobile"
611 Support for Renesas's SH-Mobile ARM platforms
618 select ARCH_MAY_HAVE_PC_FDC
619 select HAVE_PATA_PLATFORM
622 select ARCH_SPARSEMEM_ENABLE
623 select ARCH_USES_GETTIMEOFFSET
625 On the Acorn Risc-PC, Linux can support the internal IDE disk and
626 CD-ROM interface, serial and parallel port, and the floppy drive.
632 select ARCH_SPARSEMEM_ENABLE
634 select ARCH_HAS_CPUFREQ
636 select GENERIC_CLOCKEVENTS
639 select ARCH_REQUIRE_GPIOLIB
641 Support for StrongARM 11x0 based boards.
644 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
646 select ARCH_HAS_CPUFREQ
648 select ARCH_USES_GETTIMEOFFSET
649 select HAVE_S3C2410_I2C
651 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
652 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
653 the Samsung SMDK2410 development board (and derivatives).
655 Note, the S3C2416 and the S3C2450 are so close that they even share
656 the same SoC ID code. This means that there is no seperate machine
657 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
660 bool "Samsung S3C64XX"
666 select ARCH_USES_GETTIMEOFFSET
667 select ARCH_HAS_CPUFREQ
668 select ARCH_REQUIRE_GPIOLIB
669 select SAMSUNG_CLKSRC
670 select SAMSUNG_IRQ_VIC_TIMER
671 select SAMSUNG_IRQ_UART
672 select S3C_GPIO_TRACK
673 select S3C_GPIO_PULL_UPDOWN
674 select S3C_GPIO_CFG_S3C24XX
675 select S3C_GPIO_CFG_S3C64XX
677 select USB_ARCH_HAS_OHCI
678 select SAMSUNG_GPIOLIB_4BIT
679 select HAVE_S3C2410_I2C
680 select HAVE_S3C2410_WATCHDOG
682 Samsung S3C64XX series based systems
685 bool "Samsung S5P6440 S5P6450"
689 select HAVE_S3C2410_WATCHDOG
690 select ARCH_USES_GETTIMEOFFSET
691 select HAVE_S3C2410_I2C
694 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
698 bool "Samsung S5P6442"
702 select ARCH_USES_GETTIMEOFFSET
703 select HAVE_S3C2410_WATCHDOG
705 Samsung S5P6442 CPU based systems
708 bool "Samsung S5PC100"
712 select ARM_L1_CACHE_SHIFT_6
713 select ARCH_USES_GETTIMEOFFSET
714 select HAVE_S3C2410_I2C
716 select HAVE_S3C2410_WATCHDOG
718 Samsung S5PC100 series based systems
721 bool "Samsung S5PV210/S5PC110"
725 select ARM_L1_CACHE_SHIFT_6
726 select ARCH_USES_GETTIMEOFFSET
727 select HAVE_S3C2410_I2C
729 select HAVE_S3C2410_WATCHDOG
731 Samsung S5PV210/S5PC110 series based systems
734 bool "Samsung S5PV310/S5PC210"
738 select GENERIC_CLOCKEVENTS
740 Samsung S5PV310 series based systems
749 select ARCH_USES_GETTIMEOFFSET
751 Support for the StrongARM based Digital DNARD machine, also known
752 as "Shark" (<http://www.shark-linux.de/shark.html>).
755 bool "Telechips TCC ARM926-based systems"
759 select GENERIC_CLOCKEVENTS
761 Support for Telechips TCC ARM926-based systems.
766 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
767 select ARCH_USES_GETTIMEOFFSET
769 Say Y here for systems based on one of the Sharp LH7A40X
770 System on a Chip processors. These CPUs include an ARM922T
771 core with a wide array of integrated devices for
772 hand-held and low-power applications.
775 bool "ST-Ericsson U300 Series"
781 select GENERIC_CLOCKEVENTS
785 Support for ST-Ericsson U300 series mobile platforms.
788 bool "ST-Ericsson U8500 Series"
791 select GENERIC_CLOCKEVENTS
793 select ARCH_REQUIRE_GPIOLIB
795 Support for ST-Ericsson's Ux500 architecture
798 bool "STMicroelectronics Nomadik"
803 select GENERIC_CLOCKEVENTS
804 select ARCH_REQUIRE_GPIOLIB
806 Support for the Nomadik platform by ST-Ericsson
810 select GENERIC_CLOCKEVENTS
811 select ARCH_REQUIRE_GPIOLIB
815 select GENERIC_ALLOCATOR
816 select ARCH_HAS_HOLES_MEMORYMODEL
818 Support for TI's DaVinci platform.
823 select ARCH_REQUIRE_GPIOLIB
824 select ARCH_HAS_CPUFREQ
825 select GENERIC_CLOCKEVENTS
826 select ARCH_HAS_HOLES_MEMORYMODEL
828 Support for TI's OMAP platform (OMAP1/2/3/4).
833 select ARCH_REQUIRE_GPIOLIB
835 select GENERIC_CLOCKEVENTS
838 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
843 # This is sorted alphabetically by mach-* pathname. However, plat-*
844 # Kconfigs may be included either alphabetically (according to the
845 # plat- suffix) or along side the corresponding mach-* source.
847 source "arch/arm/mach-aaec2000/Kconfig"
849 source "arch/arm/mach-at91/Kconfig"
851 source "arch/arm/mach-bcmring/Kconfig"
853 source "arch/arm/mach-clps711x/Kconfig"
855 source "arch/arm/mach-cns3xxx/Kconfig"
857 source "arch/arm/mach-davinci/Kconfig"
859 source "arch/arm/mach-dove/Kconfig"
861 source "arch/arm/mach-ep93xx/Kconfig"
863 source "arch/arm/mach-footbridge/Kconfig"
865 source "arch/arm/mach-gemini/Kconfig"
867 source "arch/arm/mach-h720x/Kconfig"
869 source "arch/arm/mach-integrator/Kconfig"
871 source "arch/arm/mach-iop32x/Kconfig"
873 source "arch/arm/mach-iop33x/Kconfig"
875 source "arch/arm/mach-iop13xx/Kconfig"
877 source "arch/arm/mach-ixp4xx/Kconfig"
879 source "arch/arm/mach-ixp2000/Kconfig"
881 source "arch/arm/mach-ixp23xx/Kconfig"
883 source "arch/arm/mach-kirkwood/Kconfig"
885 source "arch/arm/mach-ks8695/Kconfig"
887 source "arch/arm/mach-lh7a40x/Kconfig"
889 source "arch/arm/mach-loki/Kconfig"
891 source "arch/arm/mach-lpc32xx/Kconfig"
893 source "arch/arm/mach-msm/Kconfig"
895 source "arch/arm/mach-mv78xx0/Kconfig"
897 source "arch/arm/plat-mxc/Kconfig"
899 source "arch/arm/mach-netx/Kconfig"
901 source "arch/arm/mach-nomadik/Kconfig"
902 source "arch/arm/plat-nomadik/Kconfig"
904 source "arch/arm/mach-ns9xxx/Kconfig"
906 source "arch/arm/mach-nuc93x/Kconfig"
908 source "arch/arm/plat-omap/Kconfig"
910 source "arch/arm/mach-omap1/Kconfig"
912 source "arch/arm/mach-omap2/Kconfig"
914 source "arch/arm/mach-orion5x/Kconfig"
916 source "arch/arm/mach-pxa/Kconfig"
917 source "arch/arm/plat-pxa/Kconfig"
919 source "arch/arm/mach-mmp/Kconfig"
921 source "arch/arm/mach-realview/Kconfig"
923 source "arch/arm/mach-sa1100/Kconfig"
925 source "arch/arm/plat-samsung/Kconfig"
926 source "arch/arm/plat-s3c24xx/Kconfig"
927 source "arch/arm/plat-s5p/Kconfig"
929 source "arch/arm/plat-spear/Kconfig"
931 source "arch/arm/plat-tcc/Kconfig"
934 source "arch/arm/mach-s3c2400/Kconfig"
935 source "arch/arm/mach-s3c2410/Kconfig"
936 source "arch/arm/mach-s3c2412/Kconfig"
937 source "arch/arm/mach-s3c2416/Kconfig"
938 source "arch/arm/mach-s3c2440/Kconfig"
939 source "arch/arm/mach-s3c2443/Kconfig"
943 source "arch/arm/mach-s3c64xx/Kconfig"
946 source "arch/arm/mach-s5p64x0/Kconfig"
948 source "arch/arm/mach-s5p6442/Kconfig"
950 source "arch/arm/mach-s5pc100/Kconfig"
952 source "arch/arm/mach-s5pv210/Kconfig"
954 source "arch/arm/mach-s5pv310/Kconfig"
956 source "arch/arm/mach-shmobile/Kconfig"
958 source "arch/arm/plat-stmp3xxx/Kconfig"
960 source "arch/arm/mach-tegra/Kconfig"
962 source "arch/arm/mach-u300/Kconfig"
964 source "arch/arm/mach-ux500/Kconfig"
966 source "arch/arm/mach-versatile/Kconfig"
968 source "arch/arm/mach-vexpress/Kconfig"
970 source "arch/arm/mach-w90x900/Kconfig"
972 # Definitions to make life easier
978 select GENERIC_CLOCKEVENTS
986 config PLAT_VERSATILE
989 config ARM_TIMER_SP804
992 source arch/arm/mm/Kconfig
995 bool "Enable iWMMXt support"
996 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
997 default y if PXA27x || PXA3xx || ARCH_MMP
999 Enable support for iWMMXt context switching at run time if
1000 running on a CPU that supports it.
1002 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1005 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1009 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1010 (!ARCH_OMAP3 || OMAP3_EMU)
1015 source "arch/arm/Kconfig-nommu"
1018 config ARM_ERRATA_411920
1019 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1022 Invalidation of the Instruction Cache operation can
1023 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1024 It does not affect the MPCore. This option enables the ARM Ltd.
1025 recommended workaround.
1027 config ARM_ERRATA_430973
1028 bool "ARM errata: Stale prediction on replaced interworking branch"
1031 This option enables the workaround for the 430973 Cortex-A8
1032 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1033 interworking branch is replaced with another code sequence at the
1034 same virtual address, whether due to self-modifying code or virtual
1035 to physical address re-mapping, Cortex-A8 does not recover from the
1036 stale interworking branch prediction. This results in Cortex-A8
1037 executing the new code sequence in the incorrect ARM or Thumb state.
1038 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1039 and also flushes the branch target cache at every context switch.
1040 Note that setting specific bits in the ACTLR register may not be
1041 available in non-secure mode.
1043 config ARM_ERRATA_458693
1044 bool "ARM errata: Processor deadlock when a false hazard is created"
1047 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1048 erratum. For very specific sequences of memory operations, it is
1049 possible for a hazard condition intended for a cache line to instead
1050 be incorrectly associated with a different cache line. This false
1051 hazard might then cause a processor deadlock. The workaround enables
1052 the L1 caching of the NEON accesses and disables the PLD instruction
1053 in the ACTLR register. Note that setting specific bits in the ACTLR
1054 register may not be available in non-secure mode.
1056 config ARM_ERRATA_460075
1057 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1060 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1061 erratum. Any asynchronous access to the L2 cache may encounter a
1062 situation in which recent store transactions to the L2 cache are lost
1063 and overwritten with stale memory contents from external memory. The
1064 workaround disables the write-allocate mode for the L2 cache via the
1065 ACTLR register. Note that setting specific bits in the ACTLR register
1066 may not be available in non-secure mode.
1068 config ARM_ERRATA_742230
1069 bool "ARM errata: DMB operation may be faulty"
1070 depends on CPU_V7 && SMP
1072 This option enables the workaround for the 742230 Cortex-A9
1073 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1074 between two write operations may not ensure the correct visibility
1075 ordering of the two writes. This workaround sets a specific bit in
1076 the diagnostic register of the Cortex-A9 which causes the DMB
1077 instruction to behave as a DSB, ensuring the correct behaviour of
1080 config ARM_ERRATA_742231
1081 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1082 depends on CPU_V7 && SMP
1084 This option enables the workaround for the 742231 Cortex-A9
1085 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1086 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1087 accessing some data located in the same cache line, may get corrupted
1088 data due to bad handling of the address hazard when the line gets
1089 replaced from one of the CPUs at the same time as another CPU is
1090 accessing it. This workaround sets specific bits in the diagnostic
1091 register of the Cortex-A9 which reduces the linefill issuing
1092 capabilities of the processor.
1094 config PL310_ERRATA_588369
1095 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1096 depends on CACHE_L2X0 && ARCH_OMAP4
1098 The PL310 L2 cache controller implements three types of Clean &
1099 Invalidate maintenance operations: by Physical Address
1100 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1101 They are architecturally defined to behave as the execution of a
1102 clean operation followed immediately by an invalidate operation,
1103 both performing to the same memory location. This functionality
1104 is not correctly implemented in PL310 as clean lines are not
1105 invalidated as a result of these operations. Note that this errata
1106 uses Texas Instrument's secure monitor api.
1108 config ARM_ERRATA_720789
1109 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1110 depends on CPU_V7 && SMP
1112 This option enables the workaround for the 720789 Cortex-A9 (prior to
1113 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1114 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1115 As a consequence of this erratum, some TLB entries which should be
1116 invalidated are not, resulting in an incoherency in the system page
1117 tables. The workaround changes the TLB flushing routines to invalidate
1118 entries regardless of the ASID.
1120 config ARM_ERRATA_743622
1121 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1124 This option enables the workaround for the 743622 Cortex-A9
1125 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1126 optimisation in the Cortex-A9 Store Buffer may lead to data
1127 corruption. This workaround sets a specific bit in the diagnostic
1128 register of the Cortex-A9 which disables the Store Buffer
1129 optimisation, preventing the defect from occurring. This has no
1130 visible impact on the overall performance or power consumption of the
1135 source "arch/arm/common/Kconfig"
1145 Find out whether you have ISA slots on your motherboard. ISA is the
1146 name of a bus system, i.e. the way the CPU talks to the other stuff
1147 inside your box. Other bus systems are PCI, EISA, MicroChannel
1148 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1149 newer boards don't support it. If you have ISA, say Y, otherwise N.
1151 # Select ISA DMA controller support
1156 # Select ISA DMA interface
1161 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1163 Find out whether you have a PCI motherboard. PCI is the name of a
1164 bus system, i.e. the way the CPU talks to the other stuff inside
1165 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1166 VESA. If you have PCI, say Y, otherwise N.
1175 # Select the host bridge type
1176 config PCI_HOST_VIA82C505
1178 depends on PCI && ARCH_SHARK
1181 config PCI_HOST_ITE8152
1183 depends on PCI && MACH_ARMCORE
1187 source "drivers/pci/Kconfig"
1189 source "drivers/pcmcia/Kconfig"
1193 menu "Kernel Features"
1195 source "kernel/time/Kconfig"
1198 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1199 depends on EXPERIMENTAL
1200 depends on GENERIC_CLOCKEVENTS
1201 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1202 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1203 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
1204 select USE_GENERIC_SMP_HELPERS
1207 This enables support for systems with more than one CPU. If you have
1208 a system with only one CPU, like most personal computers, say N. If
1209 you have a system with more than one CPU, say Y.
1211 If you say N here, the kernel will run on single and multiprocessor
1212 machines, but will use only one CPU of a multiprocessor machine. If
1213 you say Y here, the kernel will run on many, but not all, single
1214 processor machines. On a single processor machine, the kernel will
1215 run faster if you say N here.
1217 See also <file:Documentation/i386/IO-APIC.txt>,
1218 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1219 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1221 If you don't know what to do here, say N.
1224 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1225 depends on EXPERIMENTAL
1226 depends on SMP && !XIP && !THUMB2_KERNEL
1229 SMP kernels contain instructions which fail on non-SMP processors.
1230 Enabling this option allows the kernel to modify itself to make
1231 these instructions safe. Disabling it allows about 1K of space
1234 If you don't know what to do here, say Y.
1240 This option enables support for the ARM system coherency unit
1246 This options enables support for the ARM timer and watchdog unit
1249 prompt "Memory split"
1252 Select the desired split between kernel and user memory.
1254 If you are not absolutely sure what you are doing, leave this
1258 bool "3G/1G user/kernel split"
1260 bool "2G/2G user/kernel split"
1262 bool "1G/3G user/kernel split"
1267 default 0x40000000 if VMSPLIT_1G
1268 default 0x80000000 if VMSPLIT_2G
1272 int "Maximum number of CPUs (2-32)"
1278 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1279 depends on SMP && HOTPLUG && EXPERIMENTAL
1281 Say Y here to experiment with turning CPUs off and on. CPUs
1282 can be controlled through /sys/devices/system/cpu.
1285 bool "Use local timer interrupts"
1290 Enable support for local timers on SMP platforms, rather then the
1291 legacy IPI broadcast method. Local timers allows the system
1292 accounting to be spread across the timer interval, preventing a
1293 "thundering herd" at every timer tick.
1295 source kernel/Kconfig.preempt
1299 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1300 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1301 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1302 default AT91_TIMER_HZ if ARCH_AT91
1303 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1306 config THUMB2_KERNEL
1307 bool "Compile the kernel in Thumb-2 mode"
1308 depends on CPU_V7 && EXPERIMENTAL
1310 select ARM_ASM_UNIFIED
1312 By enabling this option, the kernel will be compiled in
1313 Thumb-2 mode. A compiler/assembler that understand the unified
1314 ARM-Thumb syntax is needed.
1318 config ARM_ASM_UNIFIED
1322 bool "Use the ARM EABI to compile the kernel"
1324 This option allows for the kernel to be compiled using the latest
1325 ARM ABI (aka EABI). This is only useful if you are using a user
1326 space environment that is also compiled with EABI.
1328 Since there are major incompatibilities between the legacy ABI and
1329 EABI, especially with regard to structure member alignment, this
1330 option also changes the kernel syscall calling convention to
1331 disambiguate both ABIs and allow for backward compatibility support
1332 (selected with CONFIG_OABI_COMPAT).
1334 To use this you need GCC version 4.0.0 or later.
1337 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1338 depends on AEABI && EXPERIMENTAL
1341 This option preserves the old syscall interface along with the
1342 new (ARM EABI) one. It also provides a compatibility layer to
1343 intercept syscalls that have structure arguments which layout
1344 in memory differs between the legacy ABI and the new ARM EABI
1345 (only for non "thumb" binaries). This option adds a tiny
1346 overhead to all syscalls and produces a slightly larger kernel.
1347 If you know you'll be using only pure EABI user space then you
1348 can say N here. If this option is not selected and you attempt
1349 to execute a legacy ABI binary then the result will be
1350 UNPREDICTABLE (in fact it can be predicted that it won't work
1351 at all). If in doubt say Y.
1353 config ARCH_HAS_HOLES_MEMORYMODEL
1356 config ARCH_SPARSEMEM_ENABLE
1359 config ARCH_SPARSEMEM_DEFAULT
1360 def_bool ARCH_SPARSEMEM_ENABLE
1362 config ARCH_SELECT_MEMORY_MODEL
1363 def_bool ARCH_SPARSEMEM_ENABLE
1366 bool "High Memory Support (EXPERIMENTAL)"
1367 depends on MMU && EXPERIMENTAL
1369 The address space of ARM processors is only 4 Gigabytes large
1370 and it has to accommodate user address space, kernel address
1371 space as well as some memory mapped IO. That means that, if you
1372 have a large amount of physical memory and/or IO, not all of the
1373 memory can be "permanently mapped" by the kernel. The physical
1374 memory that is not permanently mapped is called "high memory".
1376 Depending on the selected kernel/user memory split, minimum
1377 vmalloc space and actual amount of RAM, you may not need this
1378 option which should result in a slightly faster kernel.
1383 bool "Allocate 2nd-level pagetables from highmem"
1385 depends on !OUTER_CACHE
1387 config HW_PERF_EVENTS
1388 bool "Enable hardware performance counter support for perf events"
1389 depends on PERF_EVENTS && CPU_HAS_PMU
1392 Enable hardware performance counter support for perf events. If
1393 disabled, perf events will use software events only.
1398 This enables support for sparse irqs. This is useful in general
1399 as most CPUs have a fairly sparse array of IRQ vectors, which
1400 the irq_desc then maps directly on to. Systems with a high
1401 number of off-chip IRQs will want to treat this as
1402 experimental until they have been independently verified.
1406 config FORCE_MAX_ZONEORDER
1407 int "Maximum zone order" if ARCH_SHMOBILE
1408 range 11 64 if ARCH_SHMOBILE
1409 default "9" if SA1111
1412 The kernel memory allocator divides physically contiguous memory
1413 blocks into "zones", where each zone is a power of two number of
1414 pages. This option selects the largest power of two that the kernel
1415 keeps in the memory allocator. If you need to allocate very large
1416 blocks of physically contiguous memory, then you may need to
1417 increase this value.
1419 This config option is actually maximum order plus one. For example,
1420 a value of 11 means that the largest free memory block is 2^10 pages.
1423 bool "Timer and CPU usage LEDs"
1424 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1425 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1426 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1427 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1428 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1429 ARCH_AT91 || ARCH_DAVINCI || \
1430 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1432 If you say Y here, the LEDs on your machine will be used
1433 to provide useful information about your current system status.
1435 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1436 be able to select which LEDs are active using the options below. If
1437 you are compiling a kernel for the EBSA-110 or the LART however, the
1438 red LED will simply flash regularly to indicate that the system is
1439 still functional. It is safe to say Y here if you have a CATS
1440 system, but the driver will do nothing.
1443 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1444 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1445 || MACH_OMAP_PERSEUS2
1447 depends on !GENERIC_CLOCKEVENTS
1448 default y if ARCH_EBSA110
1450 If you say Y here, one of the system LEDs (the green one on the
1451 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1452 will flash regularly to indicate that the system is still
1453 operational. This is mainly useful to kernel hackers who are
1454 debugging unstable kernels.
1456 The LART uses the same LED for both Timer LED and CPU usage LED
1457 functions. You may choose to use both, but the Timer LED function
1458 will overrule the CPU usage LED.
1461 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1463 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1464 || MACH_OMAP_PERSEUS2
1467 If you say Y here, the red LED will be used to give a good real
1468 time indication of CPU usage, by lighting whenever the idle task
1469 is not currently executing.
1471 The LART uses the same LED for both Timer LED and CPU usage LED
1472 functions. You may choose to use both, but the Timer LED function
1473 will overrule the CPU usage LED.
1475 config ALIGNMENT_TRAP
1477 depends on CPU_CP15_MMU
1478 default y if !ARCH_EBSA110
1479 select HAVE_PROC_CPU if PROC_FS
1481 ARM processors cannot fetch/store information which is not
1482 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1483 address divisible by 4. On 32-bit ARM processors, these non-aligned
1484 fetch/store instructions will be emulated in software if you say
1485 here, which has a severe performance impact. This is necessary for
1486 correct operation of some network protocols. With an IP-only
1487 configuration it is safe to say N, otherwise say Y.
1489 config UACCESS_WITH_MEMCPY
1490 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1491 depends on MMU && EXPERIMENTAL
1492 default y if CPU_FEROCEON
1494 Implement faster copy_to_user and clear_user methods for CPU
1495 cores where a 8-word STM instruction give significantly higher
1496 memory write throughput than a sequence of individual 32bit stores.
1498 A possible side effect is a slight increase in scheduling latency
1499 between threads sharing the same address space if they invoke
1500 such copy operations with large buffers.
1502 However, if the CPU data cache is using a write-allocate mode,
1503 this option is unlikely to provide any performance gain.
1507 prompt "Enable seccomp to safely compute untrusted bytecode"
1509 This kernel feature is useful for number crunching applications
1510 that may need to compute untrusted bytecode during their
1511 execution. By using pipes or other transports made available to
1512 the process as file descriptors supporting the read/write
1513 syscalls, it's possible to isolate those applications in
1514 their own address space using seccomp. Once seccomp is
1515 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1516 and the task is only allowed to execute a few safe syscalls
1517 defined by each seccomp mode.
1519 config CC_STACKPROTECTOR
1520 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1522 This option turns on the -fstack-protector GCC feature. This
1523 feature puts, at the beginning of functions, a canary value on
1524 the stack just before the return address, and validates
1525 the value just before actually returning. Stack based buffer
1526 overflows (that need to overwrite this return address) now also
1527 overwrite the canary, which gets detected and the attack is then
1528 neutralized via a kernel panic.
1529 This feature requires gcc version 4.2 or above.
1531 config DEPRECATED_PARAM_STRUCT
1532 bool "Provide old way to pass kernel parameters"
1534 This was deprecated in 2001 and announced to live on for 5 years.
1535 Some old boot loaders still use this way.
1541 # Compressed boot loader in ROM. Yes, we really want to ask about
1542 # TEXT and BSS so we preserve their values in the config files.
1543 config ZBOOT_ROM_TEXT
1544 hex "Compressed ROM boot loader base address"
1547 The physical address at which the ROM-able zImage is to be
1548 placed in the target. Platforms which normally make use of
1549 ROM-able zImage formats normally set this to a suitable
1550 value in their defconfig file.
1552 If ZBOOT_ROM is not enabled, this has no effect.
1554 config ZBOOT_ROM_BSS
1555 hex "Compressed ROM boot loader BSS address"
1558 The base address of an area of read/write memory in the target
1559 for the ROM-able zImage which must be available while the
1560 decompressor is running. It must be large enough to hold the
1561 entire decompressed kernel plus an additional 128 KiB.
1562 Platforms which normally make use of ROM-able zImage formats
1563 normally set this to a suitable value in their defconfig file.
1565 If ZBOOT_ROM is not enabled, this has no effect.
1568 bool "Compressed boot loader in ROM/flash"
1569 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1571 Say Y here if you intend to execute your compressed kernel image
1572 (zImage) directly from ROM or flash. If unsure, say N.
1575 string "Default kernel command string"
1578 On some architectures (EBSA110 and CATS), there is currently no way
1579 for the boot loader to pass arguments to the kernel. For these
1580 architectures, you should supply some command-line options at build
1581 time by entering them here. As a minimum, you should specify the
1582 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1584 config CMDLINE_FORCE
1585 bool "Always use the default kernel command string"
1586 depends on CMDLINE != ""
1588 Always use the default kernel command string, even if the boot
1589 loader passes other arguments to the kernel.
1590 This is useful if you cannot or don't want to change the
1591 command-line options your boot loader passes to the kernel.
1596 bool "Kernel Execute-In-Place from ROM"
1597 depends on !ZBOOT_ROM
1599 Execute-In-Place allows the kernel to run from non-volatile storage
1600 directly addressable by the CPU, such as NOR flash. This saves RAM
1601 space since the text section of the kernel is not loaded from flash
1602 to RAM. Read-write sections, such as the data section and stack,
1603 are still copied to RAM. The XIP kernel is not compressed since
1604 it has to run directly from flash, so it will take more space to
1605 store it. The flash address used to link the kernel object files,
1606 and for storing it, is configuration dependent. Therefore, if you
1607 say Y here, you must know the proper physical address where to
1608 store the kernel image depending on your own flash memory usage.
1610 Also note that the make target becomes "make xipImage" rather than
1611 "make zImage" or "make Image". The final kernel binary to put in
1612 ROM memory will be arch/arm/boot/xipImage.
1616 config XIP_PHYS_ADDR
1617 hex "XIP Kernel Physical Location"
1618 depends on XIP_KERNEL
1619 default "0x00080000"
1621 This is the physical address in your flash memory the kernel will
1622 be linked for and stored to. This address is dependent on your
1626 bool "Kexec system call (EXPERIMENTAL)"
1627 depends on EXPERIMENTAL
1629 kexec is a system call that implements the ability to shutdown your
1630 current kernel, and to start another kernel. It is like a reboot
1631 but it is independent of the system firmware. And like a reboot
1632 you can start any kernel with it, not just Linux.
1634 It is an ongoing process to be certain the hardware in a machine
1635 is properly shutdown, so do not be surprised if this code does not
1636 initially work for you. It may help to enable device hotplugging
1640 bool "Export atags in procfs"
1644 Should the atags used to boot the kernel be exported in an "atags"
1645 file in procfs. Useful with kexec.
1647 config AUTO_ZRELADDR
1648 bool "Auto calculation of the decompressed kernel image address"
1649 depends on !ZBOOT_ROM && !ARCH_U300
1651 ZRELADDR is the physical address where the decompressed kernel
1652 image will be placed. If AUTO_ZRELADDR is selected, the address
1653 will be determined at run-time by masking the current IP with
1654 0xf8000000. This assumes the zImage being placed in the first 128MB
1655 from start of memory.
1659 menu "CPU Power Management"
1663 source "drivers/cpufreq/Kconfig"
1665 config CPU_FREQ_SA1100
1668 config CPU_FREQ_SA1110
1671 config CPU_FREQ_INTEGRATOR
1672 tristate "CPUfreq driver for ARM Integrator CPUs"
1673 depends on ARCH_INTEGRATOR && CPU_FREQ
1676 This enables the CPUfreq driver for ARM Integrator CPUs.
1678 For details, take a look at <file:Documentation/cpu-freq>.
1684 depends on CPU_FREQ && ARCH_PXA && PXA25x
1686 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1688 config CPU_FREQ_S3C64XX
1689 bool "CPUfreq support for Samsung S3C64XX CPUs"
1690 depends on CPU_FREQ && CPU_S3C6410
1695 Internal configuration node for common cpufreq on Samsung SoC
1697 config CPU_FREQ_S3C24XX
1698 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1699 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1702 This enables the CPUfreq driver for the Samsung S3C24XX family
1705 For details, take a look at <file:Documentation/cpu-freq>.
1709 config CPU_FREQ_S3C24XX_PLL
1710 bool "Support CPUfreq changing of PLL frequency"
1711 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1713 Compile in support for changing the PLL frequency from the
1714 S3C24XX series CPUfreq driver. The PLL takes time to settle
1715 after a frequency change, so by default it is not enabled.
1717 This also means that the PLL tables for the selected CPU(s) will
1718 be built which may increase the size of the kernel image.
1720 config CPU_FREQ_S3C24XX_DEBUG
1721 bool "Debug CPUfreq Samsung driver core"
1722 depends on CPU_FREQ_S3C24XX
1724 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1726 config CPU_FREQ_S3C24XX_IODEBUG
1727 bool "Debug CPUfreq Samsung driver IO timing"
1728 depends on CPU_FREQ_S3C24XX
1730 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1732 config CPU_FREQ_S3C24XX_DEBUGFS
1733 bool "Export debugfs for CPUFreq"
1734 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1736 Export status information via debugfs.
1740 source "drivers/cpuidle/Kconfig"
1744 menu "Floating point emulation"
1746 comment "At least one emulation must be selected"
1749 bool "NWFPE math emulation"
1750 depends on !AEABI || OABI_COMPAT
1752 Say Y to include the NWFPE floating point emulator in the kernel.
1753 This is necessary to run most binaries. Linux does not currently
1754 support floating point hardware so you need to say Y here even if
1755 your machine has an FPA or floating point co-processor podule.
1757 You may say N here if you are going to load the Acorn FPEmulator
1758 early in the bootup.
1761 bool "Support extended precision"
1762 depends on FPE_NWFPE
1764 Say Y to include 80-bit support in the kernel floating-point
1765 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1766 Note that gcc does not generate 80-bit operations by default,
1767 so in most cases this option only enlarges the size of the
1768 floating point emulator without any good reason.
1770 You almost surely want to say N here.
1773 bool "FastFPE math emulation (EXPERIMENTAL)"
1774 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1776 Say Y here to include the FAST floating point emulator in the kernel.
1777 This is an experimental much faster emulator which now also has full
1778 precision for the mantissa. It does not support any exceptions.
1779 It is very simple, and approximately 3-6 times faster than NWFPE.
1781 It should be sufficient for most programs. It may be not suitable
1782 for scientific calculations, but you have to check this for yourself.
1783 If you do not feel you need a faster FP emulation you should better
1787 bool "VFP-format floating point maths"
1788 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1790 Say Y to include VFP support code in the kernel. This is needed
1791 if your hardware includes a VFP unit.
1793 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1794 release notes and additional status information.
1796 Say N if your target does not have VFP hardware.
1804 bool "Advanced SIMD (NEON) Extension support"
1805 depends on VFPv3 && CPU_V7
1807 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1812 menu "Userspace binary formats"
1814 source "fs/Kconfig.binfmt"
1817 tristate "RISC OS personality"
1820 Say Y here to include the kernel code necessary if you want to run
1821 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1822 experimental; if this sounds frightening, say N and sleep in peace.
1823 You can also say M here to compile this support as a module (which
1824 will be called arthur).
1828 menu "Power management options"
1830 source "kernel/power/Kconfig"
1832 config ARCH_SUSPEND_POSSIBLE
1837 source "net/Kconfig"
1839 source "drivers/Kconfig"
1843 source "arch/arm/Kconfig.debug"
1845 source "security/Kconfig"
1847 source "crypto/Kconfig"
1849 source "lib/Kconfig"