8 select SYS_SUPPORTS_APM_EMULATION
9 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
10 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
12 select HAVE_KPROBES if (!XIP_KERNEL)
13 select HAVE_KRETPROBES if (HAVE_KPROBES)
14 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
15 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
16 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
17 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
18 select HAVE_GENERIC_DMA_COHERENT
19 select HAVE_KERNEL_GZIP
20 select HAVE_KERNEL_LZO
21 select HAVE_KERNEL_LZMA
23 select HAVE_PERF_EVENTS
24 select PERF_USE_VMALLOC
25 select HAVE_REGS_AND_STACK_ACCESS_API
26 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
28 The ARM series is a line of low-power-consumption RISC chip designs
29 licensed by ARM Ltd and targeted at embedded applications and
30 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
31 manufactured, but legacy ARM-based PC hardware remains popular in
32 Europe. There is an ARM Linux project with a web page at
33 <http://www.arm.linux.org.uk/>.
38 config SYS_SUPPORTS_APM_EMULATION
41 config HAVE_SCHED_CLOCK
47 config ARCH_USES_GETTIMEOFFSET
51 config GENERIC_CLOCKEVENTS
54 config GENERIC_CLOCKEVENTS_BROADCAST
56 depends on GENERIC_CLOCKEVENTS
61 select GENERIC_ALLOCATOR
72 The Extended Industry Standard Architecture (EISA) bus was
73 developed as an open alternative to the IBM MicroChannel bus.
75 The EISA bus provided some of the features of the IBM MicroChannel
76 bus while maintaining backward compatibility with cards made for
77 the older ISA bus. The EISA bus saw limited use between 1988 and
78 1995 when it was made obsolete by the PCI bus.
80 Say Y here if you are building a kernel for an EISA-based machine.
90 MicroChannel Architecture is found in some IBM PS/2 machines and
91 laptops. It is a bus system similar to PCI or ISA. See
92 <file:Documentation/mca.txt> (and especially the web page given
93 there) before attempting to build an MCA bus kernel.
95 config GENERIC_HARDIRQS
99 config STACKTRACE_SUPPORT
103 config HAVE_LATENCYTOP_SUPPORT
108 config LOCKDEP_SUPPORT
112 config TRACE_IRQFLAGS_SUPPORT
116 config HARDIRQS_SW_RESEND
120 config GENERIC_IRQ_PROBE
124 config GENERIC_LOCKBREAK
127 depends on SMP && PREEMPT
129 config RWSEM_GENERIC_SPINLOCK
133 config RWSEM_XCHGADD_ALGORITHM
136 config ARCH_HAS_ILOG2_U32
139 config ARCH_HAS_ILOG2_U64
142 config ARCH_HAS_CPUFREQ
145 Internal node to signify that the ARCH has CPUFREQ support
146 and that the relevant menu configurations are displayed for
149 config ARCH_HAS_CPU_IDLE_WAIT
152 config GENERIC_HWEIGHT
156 config GENERIC_CALIBRATE_DELAY
160 config ARCH_MAY_HAVE_PC_FDC
166 config NEED_DMA_MAP_STATE
169 config GENERIC_ISA_DMA
178 config GENERIC_HARDIRQS_NO__DO_IRQ
181 config ARM_L1_CACHE_SHIFT_6
184 Setting ARM L1 cache line size to 64 Bytes.
188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
189 default DRAM_BASE if REMAP_VECTORS_TO_RAM
192 The base address of exception vectors.
194 source "init/Kconfig"
196 source "kernel/Kconfig.freezer"
201 bool "MMU-based Paged Memory Management Support"
204 Select if you want MMU-based virtualised addressing space
205 support by paged memory management. If unsure, say 'Y'.
208 # The "ARM system type" choice list is ordered alphabetically by option
209 # text. Please add new entries in the option alphabetic order.
212 prompt "ARM system type"
213 default ARCH_VERSATILE
216 bool "Agilent AAEC-2000 based"
220 select ARCH_USES_GETTIMEOFFSET
222 This enables support for systems based on the Agilent AAEC-2000
224 config ARCH_INTEGRATOR
225 bool "ARM Ltd. Integrator family"
227 select ARCH_HAS_CPUFREQ
230 select GENERIC_CLOCKEVENTS
231 select PLAT_VERSATILE
233 Support for ARM's Integrator platform.
236 bool "ARM Ltd. RealView family"
240 select GENERIC_CLOCKEVENTS
241 select ARCH_WANT_OPTIONAL_GPIOLIB
242 select PLAT_VERSATILE
243 select ARM_TIMER_SP804
244 select GPIO_PL061 if GPIOLIB
246 This enables support for ARM Ltd RealView boards.
248 config ARCH_VERSATILE
249 bool "ARM Ltd. Versatile family"
254 select GENERIC_CLOCKEVENTS
255 select ARCH_WANT_OPTIONAL_GPIOLIB
256 select PLAT_VERSATILE
257 select ARM_TIMER_SP804
259 This enables support for ARM Ltd Versatile board.
262 bool "ARM Ltd. Versatile Express family"
263 select ARCH_WANT_OPTIONAL_GPIOLIB
265 select ARM_TIMER_SP804
267 select GENERIC_CLOCKEVENTS
270 select PLAT_VERSATILE
272 This enables support for the ARM Ltd Versatile Express boards.
276 select ARCH_REQUIRE_GPIOLIB
279 This enables support for systems based on the Atmel AT91RM9200,
280 AT91SAM9 and AT91CAP9 processors.
283 bool "Broadcom BCMRING"
288 select GENERIC_CLOCKEVENTS
289 select ARCH_WANT_OPTIONAL_GPIOLIB
291 Support for Broadcom's BCMRing platform.
294 bool "Cirrus Logic CLPS711x/EP721x-based"
296 select ARCH_USES_GETTIMEOFFSET
298 Support for Cirrus Logic 711x/721x based boards.
301 bool "Cavium Networks CNS3XXX family"
303 select GENERIC_CLOCKEVENTS
305 select PCI_DOMAINS if PCI
307 Support for Cavium Networks CNS3XXX platform.
310 bool "Cortina Systems Gemini"
312 select ARCH_REQUIRE_GPIOLIB
313 select ARCH_USES_GETTIMEOFFSET
315 Support for the Cortina Systems Gemini family SoCs
322 select ARCH_USES_GETTIMEOFFSET
324 This is an evaluation board for the StrongARM processor available
325 from Digital. It has limited hardware on-board, including an
326 Ethernet interface, two PCMCIA sockets, two serial ports and a
335 select ARCH_REQUIRE_GPIOLIB
336 select ARCH_HAS_HOLES_MEMORYMODEL
337 select ARCH_USES_GETTIMEOFFSET
339 This enables support for the Cirrus EP93xx series of CPUs.
341 config ARCH_FOOTBRIDGE
345 select ARCH_USES_GETTIMEOFFSET
347 Support for systems based on the DC21285 companion chip
348 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
351 bool "Freescale MXC/iMX-based"
352 select GENERIC_CLOCKEVENTS
353 select ARCH_REQUIRE_GPIOLIB
356 Support for Freescale MXC/iMX-based family of processors
359 bool "Freescale STMP3xxx"
362 select ARCH_REQUIRE_GPIOLIB
363 select GENERIC_CLOCKEVENTS
364 select USB_ARCH_HAS_EHCI
366 Support for systems based on the Freescale 3xxx CPUs.
369 bool "Hilscher NetX based"
372 select GENERIC_CLOCKEVENTS
374 This enables support for systems based on the Hilscher NetX Soc
377 bool "Hynix HMS720x-based"
380 select ARCH_USES_GETTIMEOFFSET
382 This enables support for systems based on the Hynix HMS720x
390 select ARCH_SUPPORTS_MSI
393 Support for Intel's IOP13XX (XScale) family of processors.
401 select ARCH_REQUIRE_GPIOLIB
403 Support for Intel's 80219 and IOP32X (XScale) family of
412 select ARCH_REQUIRE_GPIOLIB
414 Support for Intel's IOP33X (XScale) family of processors.
421 select ARCH_USES_GETTIMEOFFSET
423 Support for Intel's IXP23xx (XScale) family of processors.
426 bool "IXP2400/2800-based"
430 select ARCH_USES_GETTIMEOFFSET
432 Support for Intel's IXP2400/2800 (XScale) family of processors.
439 select GENERIC_CLOCKEVENTS
440 select HAVE_SCHED_CLOCK
441 select DMABOUNCE if PCI
443 Support for Intel's IXP4XX (XScale) family of processors.
448 select ARCH_REQUIRE_GPIOLIB
449 select GENERIC_CLOCKEVENTS
452 Support for the Marvell Dove SoC 88AP510
455 bool "Marvell Kirkwood"
458 select ARCH_REQUIRE_GPIOLIB
459 select GENERIC_CLOCKEVENTS
462 Support for the following Marvell Kirkwood series SoCs:
463 88F6180, 88F6192 and 88F6281.
466 bool "Marvell Loki (88RC8480)"
468 select GENERIC_CLOCKEVENTS
471 Support for the Marvell Loki (88RC8480) SoC.
476 select ARCH_REQUIRE_GPIOLIB
479 select USB_ARCH_HAS_OHCI
482 select GENERIC_CLOCKEVENTS
484 Support for the NXP LPC32XX family of processors
487 bool "Marvell MV78xx0"
490 select ARCH_REQUIRE_GPIOLIB
491 select GENERIC_CLOCKEVENTS
494 Support for the following Marvell MV78xx0 series SoCs:
502 select ARCH_REQUIRE_GPIOLIB
503 select GENERIC_CLOCKEVENTS
506 Support for the following Marvell Orion 5x series SoCs:
507 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
508 Orion-2 (5281), Orion-1-90 (6183).
511 bool "Marvell PXA168/910/MMP2"
513 select ARCH_REQUIRE_GPIOLIB
515 select GENERIC_CLOCKEVENTS
520 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
523 bool "Micrel/Kendin KS8695"
525 select ARCH_REQUIRE_GPIOLIB
526 select ARCH_USES_GETTIMEOFFSET
528 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
529 System-on-Chip devices.
532 bool "NetSilicon NS9xxx"
535 select GENERIC_CLOCKEVENTS
538 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
541 <http://www.digi.com/products/microprocessors/index.jsp>
544 bool "Nuvoton W90X900 CPU"
546 select ARCH_REQUIRE_GPIOLIB
548 select GENERIC_CLOCKEVENTS
550 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
551 At present, the w90x900 has been renamed nuc900, regarding
552 the ARM series product line, you can login the following
553 link address to know more.
555 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
556 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
559 bool "Nuvoton NUC93X CPU"
563 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
564 low-power and high performance MPEG-4/JPEG multimedia controller chip.
569 select GENERIC_CLOCKEVENTS
573 select ARCH_HAS_BARRIERS if CACHE_L2X0
574 select ARCH_HAS_CPUFREQ
576 This enables support for NVIDIA Tegra based systems (Tegra APX,
577 Tegra 6xx and Tegra 2 series).
580 bool "Philips Nexperia PNX4008 Mobile"
583 select ARCH_USES_GETTIMEOFFSET
585 This enables support for Philips PNX4008 mobile platform.
588 bool "PXA2xx/PXA3xx-based"
591 select ARCH_HAS_CPUFREQ
593 select ARCH_REQUIRE_GPIOLIB
594 select GENERIC_CLOCKEVENTS
599 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
604 select GENERIC_CLOCKEVENTS
605 select ARCH_REQUIRE_GPIOLIB
607 Support for Qualcomm MSM/QSD based systems. This runs on the
608 apps processor of the MSM/QSD and depends on a shared memory
609 interface to the modem processor which runs the baseband
610 stack and controls some vital subsystems
611 (clock and power control, etc).
614 bool "Renesas SH-Mobile"
616 Support for Renesas's SH-Mobile ARM platforms
623 select ARCH_MAY_HAVE_PC_FDC
624 select HAVE_PATA_PLATFORM
627 select ARCH_SPARSEMEM_ENABLE
628 select ARCH_USES_GETTIMEOFFSET
630 On the Acorn Risc-PC, Linux can support the internal IDE disk and
631 CD-ROM interface, serial and parallel port, and the floppy drive.
637 select ARCH_SPARSEMEM_ENABLE
639 select ARCH_HAS_CPUFREQ
641 select GENERIC_CLOCKEVENTS
644 select ARCH_REQUIRE_GPIOLIB
646 Support for StrongARM 11x0 based boards.
649 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
651 select ARCH_HAS_CPUFREQ
653 select ARCH_USES_GETTIMEOFFSET
654 select HAVE_S3C2410_I2C if I2C
656 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
657 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
658 the Samsung SMDK2410 development board (and derivatives).
660 Note, the S3C2416 and the S3C2450 are so close that they even share
661 the same SoC ID code. This means that there is no seperate machine
662 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
665 bool "Samsung S3C64XX"
671 select ARCH_USES_GETTIMEOFFSET
672 select ARCH_HAS_CPUFREQ
673 select ARCH_REQUIRE_GPIOLIB
674 select SAMSUNG_CLKSRC
675 select SAMSUNG_IRQ_VIC_TIMER
676 select SAMSUNG_IRQ_UART
677 select S3C_GPIO_TRACK
678 select S3C_GPIO_PULL_UPDOWN
679 select S3C_GPIO_CFG_S3C24XX
680 select S3C_GPIO_CFG_S3C64XX
682 select USB_ARCH_HAS_OHCI
683 select SAMSUNG_GPIOLIB_4BIT
684 select HAVE_S3C2410_I2C if I2C
685 select HAVE_S3C2410_WATCHDOG if WATCHDOG
687 Samsung S3C64XX series based systems
690 bool "Samsung S5P6440 S5P6450"
694 select HAVE_S3C2410_WATCHDOG if WATCHDOG
695 select ARCH_USES_GETTIMEOFFSET
696 select HAVE_S3C2410_I2C if I2C
697 select HAVE_S3C_RTC if RTC_CLASS
699 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
703 bool "Samsung S5P6442"
707 select ARCH_USES_GETTIMEOFFSET
708 select HAVE_S3C2410_WATCHDOG if WATCHDOG
710 Samsung S5P6442 CPU based systems
713 bool "Samsung S5PC100"
717 select ARM_L1_CACHE_SHIFT_6
718 select ARCH_USES_GETTIMEOFFSET
719 select HAVE_S3C2410_I2C if I2C
720 select HAVE_S3C_RTC if RTC_CLASS
721 select HAVE_S3C2410_WATCHDOG if WATCHDOG
723 Samsung S5PC100 series based systems
726 bool "Samsung S5PV210/S5PC110"
728 select ARCH_SPARSEMEM_ENABLE
731 select ARM_L1_CACHE_SHIFT_6
732 select ARCH_HAS_CPUFREQ
733 select ARCH_USES_GETTIMEOFFSET
734 select HAVE_S3C2410_I2C if I2C
735 select HAVE_S3C_RTC if RTC_CLASS
736 select HAVE_S3C2410_WATCHDOG if WATCHDOG
738 Samsung S5PV210/S5PC110 series based systems
741 bool "Samsung S5PV310/S5PC210"
743 select ARCH_SPARSEMEM_ENABLE
746 select GENERIC_CLOCKEVENTS
747 select HAVE_S3C_RTC if RTC_CLASS
748 select HAVE_S3C2410_I2C if I2C
749 select HAVE_S3C2410_WATCHDOG if WATCHDOG
751 Samsung S5PV310 series based systems
760 select ARCH_USES_GETTIMEOFFSET
762 Support for the StrongARM based Digital DNARD machine, also known
763 as "Shark" (<http://www.shark-linux.de/shark.html>).
766 bool "Telechips TCC ARM926-based systems"
770 select GENERIC_CLOCKEVENTS
772 Support for Telechips TCC ARM926-based systems.
777 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
778 select ARCH_USES_GETTIMEOFFSET
780 Say Y here for systems based on one of the Sharp LH7A40X
781 System on a Chip processors. These CPUs include an ARM922T
782 core with a wide array of integrated devices for
783 hand-held and low-power applications.
786 bool "ST-Ericsson U300 Series"
792 select GENERIC_CLOCKEVENTS
796 Support for ST-Ericsson U300 series mobile platforms.
799 bool "ST-Ericsson U8500 Series"
802 select GENERIC_CLOCKEVENTS
804 select ARCH_REQUIRE_GPIOLIB
806 Support for ST-Ericsson's Ux500 architecture
809 bool "STMicroelectronics Nomadik"
814 select GENERIC_CLOCKEVENTS
815 select ARCH_REQUIRE_GPIOLIB
817 Support for the Nomadik platform by ST-Ericsson
821 select GENERIC_CLOCKEVENTS
822 select ARCH_REQUIRE_GPIOLIB
826 select GENERIC_ALLOCATOR
827 select ARCH_HAS_HOLES_MEMORYMODEL
829 Support for TI's DaVinci platform.
834 select ARCH_REQUIRE_GPIOLIB
835 select ARCH_HAS_CPUFREQ
836 select GENERIC_CLOCKEVENTS
837 select ARCH_HAS_HOLES_MEMORYMODEL
839 Support for TI's OMAP platform (OMAP1/2/3/4).
844 select ARCH_REQUIRE_GPIOLIB
846 select GENERIC_CLOCKEVENTS
849 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
854 # This is sorted alphabetically by mach-* pathname. However, plat-*
855 # Kconfigs may be included either alphabetically (according to the
856 # plat- suffix) or along side the corresponding mach-* source.
858 source "arch/arm/mach-aaec2000/Kconfig"
860 source "arch/arm/mach-at91/Kconfig"
862 source "arch/arm/mach-bcmring/Kconfig"
864 source "arch/arm/mach-clps711x/Kconfig"
866 source "arch/arm/mach-cns3xxx/Kconfig"
868 source "arch/arm/mach-davinci/Kconfig"
870 source "arch/arm/mach-dove/Kconfig"
872 source "arch/arm/mach-ep93xx/Kconfig"
874 source "arch/arm/mach-footbridge/Kconfig"
876 source "arch/arm/mach-gemini/Kconfig"
878 source "arch/arm/mach-h720x/Kconfig"
880 source "arch/arm/mach-integrator/Kconfig"
882 source "arch/arm/mach-iop32x/Kconfig"
884 source "arch/arm/mach-iop33x/Kconfig"
886 source "arch/arm/mach-iop13xx/Kconfig"
888 source "arch/arm/mach-ixp4xx/Kconfig"
890 source "arch/arm/mach-ixp2000/Kconfig"
892 source "arch/arm/mach-ixp23xx/Kconfig"
894 source "arch/arm/mach-kirkwood/Kconfig"
896 source "arch/arm/mach-ks8695/Kconfig"
898 source "arch/arm/mach-lh7a40x/Kconfig"
900 source "arch/arm/mach-loki/Kconfig"
902 source "arch/arm/mach-lpc32xx/Kconfig"
904 source "arch/arm/mach-msm/Kconfig"
906 source "arch/arm/mach-mv78xx0/Kconfig"
908 source "arch/arm/plat-mxc/Kconfig"
910 source "arch/arm/mach-netx/Kconfig"
912 source "arch/arm/mach-nomadik/Kconfig"
913 source "arch/arm/plat-nomadik/Kconfig"
915 source "arch/arm/mach-ns9xxx/Kconfig"
917 source "arch/arm/mach-nuc93x/Kconfig"
919 source "arch/arm/plat-omap/Kconfig"
921 source "arch/arm/mach-omap1/Kconfig"
923 source "arch/arm/mach-omap2/Kconfig"
925 source "arch/arm/mach-orion5x/Kconfig"
927 source "arch/arm/mach-pxa/Kconfig"
928 source "arch/arm/plat-pxa/Kconfig"
930 source "arch/arm/mach-mmp/Kconfig"
932 source "arch/arm/mach-realview/Kconfig"
934 source "arch/arm/mach-sa1100/Kconfig"
936 source "arch/arm/plat-samsung/Kconfig"
937 source "arch/arm/plat-s3c24xx/Kconfig"
938 source "arch/arm/plat-s5p/Kconfig"
940 source "arch/arm/plat-spear/Kconfig"
942 source "arch/arm/plat-tcc/Kconfig"
945 source "arch/arm/mach-s3c2400/Kconfig"
946 source "arch/arm/mach-s3c2410/Kconfig"
947 source "arch/arm/mach-s3c2412/Kconfig"
948 source "arch/arm/mach-s3c2416/Kconfig"
949 source "arch/arm/mach-s3c2440/Kconfig"
950 source "arch/arm/mach-s3c2443/Kconfig"
954 source "arch/arm/mach-s3c64xx/Kconfig"
957 source "arch/arm/mach-s5p64x0/Kconfig"
959 source "arch/arm/mach-s5p6442/Kconfig"
961 source "arch/arm/mach-s5pc100/Kconfig"
963 source "arch/arm/mach-s5pv210/Kconfig"
965 source "arch/arm/mach-s5pv310/Kconfig"
967 source "arch/arm/mach-shmobile/Kconfig"
969 source "arch/arm/plat-stmp3xxx/Kconfig"
971 source "arch/arm/mach-tegra/Kconfig"
973 source "arch/arm/mach-u300/Kconfig"
975 source "arch/arm/mach-ux500/Kconfig"
977 source "arch/arm/mach-versatile/Kconfig"
979 source "arch/arm/mach-vexpress/Kconfig"
981 source "arch/arm/mach-w90x900/Kconfig"
983 # Definitions to make life easier
989 select GENERIC_CLOCKEVENTS
997 config PLAT_VERSATILE
1000 config ARM_TIMER_SP804
1003 source arch/arm/mm/Kconfig
1006 bool "Enable iWMMXt support"
1007 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
1008 default y if PXA27x || PXA3xx || ARCH_MMP
1010 Enable support for iWMMXt context switching at run time if
1011 running on a CPU that supports it.
1013 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1016 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1020 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1021 (!ARCH_OMAP3 || OMAP3_EMU)
1026 source "arch/arm/Kconfig-nommu"
1029 config ARM_ERRATA_411920
1030 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1033 Invalidation of the Instruction Cache operation can
1034 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1035 It does not affect the MPCore. This option enables the ARM Ltd.
1036 recommended workaround.
1038 config ARM_ERRATA_430973
1039 bool "ARM errata: Stale prediction on replaced interworking branch"
1042 This option enables the workaround for the 430973 Cortex-A8
1043 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1044 interworking branch is replaced with another code sequence at the
1045 same virtual address, whether due to self-modifying code or virtual
1046 to physical address re-mapping, Cortex-A8 does not recover from the
1047 stale interworking branch prediction. This results in Cortex-A8
1048 executing the new code sequence in the incorrect ARM or Thumb state.
1049 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1050 and also flushes the branch target cache at every context switch.
1051 Note that setting specific bits in the ACTLR register may not be
1052 available in non-secure mode.
1054 config ARM_ERRATA_458693
1055 bool "ARM errata: Processor deadlock when a false hazard is created"
1058 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1059 erratum. For very specific sequences of memory operations, it is
1060 possible for a hazard condition intended for a cache line to instead
1061 be incorrectly associated with a different cache line. This false
1062 hazard might then cause a processor deadlock. The workaround enables
1063 the L1 caching of the NEON accesses and disables the PLD instruction
1064 in the ACTLR register. Note that setting specific bits in the ACTLR
1065 register may not be available in non-secure mode.
1067 config ARM_ERRATA_460075
1068 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1071 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1072 erratum. Any asynchronous access to the L2 cache may encounter a
1073 situation in which recent store transactions to the L2 cache are lost
1074 and overwritten with stale memory contents from external memory. The
1075 workaround disables the write-allocate mode for the L2 cache via the
1076 ACTLR register. Note that setting specific bits in the ACTLR register
1077 may not be available in non-secure mode.
1079 config ARM_ERRATA_742230
1080 bool "ARM errata: DMB operation may be faulty"
1081 depends on CPU_V7 && SMP
1083 This option enables the workaround for the 742230 Cortex-A9
1084 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1085 between two write operations may not ensure the correct visibility
1086 ordering of the two writes. This workaround sets a specific bit in
1087 the diagnostic register of the Cortex-A9 which causes the DMB
1088 instruction to behave as a DSB, ensuring the correct behaviour of
1091 config ARM_ERRATA_742231
1092 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1093 depends on CPU_V7 && SMP
1095 This option enables the workaround for the 742231 Cortex-A9
1096 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1097 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1098 accessing some data located in the same cache line, may get corrupted
1099 data due to bad handling of the address hazard when the line gets
1100 replaced from one of the CPUs at the same time as another CPU is
1101 accessing it. This workaround sets specific bits in the diagnostic
1102 register of the Cortex-A9 which reduces the linefill issuing
1103 capabilities of the processor.
1105 config PL310_ERRATA_588369
1106 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1107 depends on CACHE_L2X0 && ARCH_OMAP4
1109 The PL310 L2 cache controller implements three types of Clean &
1110 Invalidate maintenance operations: by Physical Address
1111 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1112 They are architecturally defined to behave as the execution of a
1113 clean operation followed immediately by an invalidate operation,
1114 both performing to the same memory location. This functionality
1115 is not correctly implemented in PL310 as clean lines are not
1116 invalidated as a result of these operations. Note that this errata
1117 uses Texas Instrument's secure monitor api.
1119 config ARM_ERRATA_720789
1120 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1121 depends on CPU_V7 && SMP
1123 This option enables the workaround for the 720789 Cortex-A9 (prior to
1124 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1125 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1126 As a consequence of this erratum, some TLB entries which should be
1127 invalidated are not, resulting in an incoherency in the system page
1128 tables. The workaround changes the TLB flushing routines to invalidate
1129 entries regardless of the ASID.
1131 config ARM_ERRATA_743622
1132 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1135 This option enables the workaround for the 743622 Cortex-A9
1136 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1137 optimisation in the Cortex-A9 Store Buffer may lead to data
1138 corruption. This workaround sets a specific bit in the diagnostic
1139 register of the Cortex-A9 which disables the Store Buffer
1140 optimisation, preventing the defect from occurring. This has no
1141 visible impact on the overall performance or power consumption of the
1146 source "arch/arm/common/Kconfig"
1156 Find out whether you have ISA slots on your motherboard. ISA is the
1157 name of a bus system, i.e. the way the CPU talks to the other stuff
1158 inside your box. Other bus systems are PCI, EISA, MicroChannel
1159 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1160 newer boards don't support it. If you have ISA, say Y, otherwise N.
1162 # Select ISA DMA controller support
1167 # Select ISA DMA interface
1172 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1174 Find out whether you have a PCI motherboard. PCI is the name of a
1175 bus system, i.e. the way the CPU talks to the other stuff inside
1176 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1177 VESA. If you have PCI, say Y, otherwise N.
1186 # Select the host bridge type
1187 config PCI_HOST_VIA82C505
1189 depends on PCI && ARCH_SHARK
1192 config PCI_HOST_ITE8152
1194 depends on PCI && MACH_ARMCORE
1198 source "drivers/pci/Kconfig"
1200 source "drivers/pcmcia/Kconfig"
1204 menu "Kernel Features"
1206 source "kernel/time/Kconfig"
1209 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1210 depends on EXPERIMENTAL
1211 depends on GENERIC_CLOCKEVENTS
1212 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1213 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1214 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1216 select USE_GENERIC_SMP_HELPERS
1217 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1219 This enables support for systems with more than one CPU. If you have
1220 a system with only one CPU, like most personal computers, say N. If
1221 you have a system with more than one CPU, say Y.
1223 If you say N here, the kernel will run on single and multiprocessor
1224 machines, but will use only one CPU of a multiprocessor machine. If
1225 you say Y here, the kernel will run on many, but not all, single
1226 processor machines. On a single processor machine, the kernel will
1227 run faster if you say N here.
1229 See also <file:Documentation/i386/IO-APIC.txt>,
1230 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1231 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1233 If you don't know what to do here, say N.
1236 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1237 depends on EXPERIMENTAL
1238 depends on SMP && !XIP && !THUMB2_KERNEL
1241 SMP kernels contain instructions which fail on non-SMP processors.
1242 Enabling this option allows the kernel to modify itself to make
1243 these instructions safe. Disabling it allows about 1K of space
1246 If you don't know what to do here, say Y.
1252 This option enables support for the ARM system coherency unit
1258 This options enables support for the ARM timer and watchdog unit
1261 prompt "Memory split"
1264 Select the desired split between kernel and user memory.
1266 If you are not absolutely sure what you are doing, leave this
1270 bool "3G/1G user/kernel split"
1272 bool "2G/2G user/kernel split"
1274 bool "1G/3G user/kernel split"
1279 default 0x40000000 if VMSPLIT_1G
1280 default 0x80000000 if VMSPLIT_2G
1284 int "Maximum number of CPUs (2-32)"
1290 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1291 depends on SMP && HOTPLUG && EXPERIMENTAL
1292 depends on !ARCH_MSM
1294 Say Y here to experiment with turning CPUs off and on. CPUs
1295 can be controlled through /sys/devices/system/cpu.
1298 bool "Use local timer interrupts"
1301 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
1303 Enable support for local timers on SMP platforms, rather then the
1304 legacy IPI broadcast method. Local timers allows the system
1305 accounting to be spread across the timer interval, preventing a
1306 "thundering herd" at every timer tick.
1308 source kernel/Kconfig.preempt
1312 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1313 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1314 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1315 default AT91_TIMER_HZ if ARCH_AT91
1316 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1319 config THUMB2_KERNEL
1320 bool "Compile the kernel in Thumb-2 mode"
1321 depends on CPU_V7 && EXPERIMENTAL
1323 select ARM_ASM_UNIFIED
1325 By enabling this option, the kernel will be compiled in
1326 Thumb-2 mode. A compiler/assembler that understand the unified
1327 ARM-Thumb syntax is needed.
1331 config ARM_ASM_UNIFIED
1335 bool "Use the ARM EABI to compile the kernel"
1337 This option allows for the kernel to be compiled using the latest
1338 ARM ABI (aka EABI). This is only useful if you are using a user
1339 space environment that is also compiled with EABI.
1341 Since there are major incompatibilities between the legacy ABI and
1342 EABI, especially with regard to structure member alignment, this
1343 option also changes the kernel syscall calling convention to
1344 disambiguate both ABIs and allow for backward compatibility support
1345 (selected with CONFIG_OABI_COMPAT).
1347 To use this you need GCC version 4.0.0 or later.
1350 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1351 depends on AEABI && EXPERIMENTAL
1354 This option preserves the old syscall interface along with the
1355 new (ARM EABI) one. It also provides a compatibility layer to
1356 intercept syscalls that have structure arguments which layout
1357 in memory differs between the legacy ABI and the new ARM EABI
1358 (only for non "thumb" binaries). This option adds a tiny
1359 overhead to all syscalls and produces a slightly larger kernel.
1360 If you know you'll be using only pure EABI user space then you
1361 can say N here. If this option is not selected and you attempt
1362 to execute a legacy ABI binary then the result will be
1363 UNPREDICTABLE (in fact it can be predicted that it won't work
1364 at all). If in doubt say Y.
1366 config ARCH_HAS_HOLES_MEMORYMODEL
1369 config ARCH_SPARSEMEM_ENABLE
1372 config ARCH_SPARSEMEM_DEFAULT
1373 def_bool ARCH_SPARSEMEM_ENABLE
1375 config ARCH_SELECT_MEMORY_MODEL
1376 def_bool ARCH_SPARSEMEM_ENABLE
1379 bool "High Memory Support (EXPERIMENTAL)"
1380 depends on MMU && EXPERIMENTAL
1382 The address space of ARM processors is only 4 Gigabytes large
1383 and it has to accommodate user address space, kernel address
1384 space as well as some memory mapped IO. That means that, if you
1385 have a large amount of physical memory and/or IO, not all of the
1386 memory can be "permanently mapped" by the kernel. The physical
1387 memory that is not permanently mapped is called "high memory".
1389 Depending on the selected kernel/user memory split, minimum
1390 vmalloc space and actual amount of RAM, you may not need this
1391 option which should result in a slightly faster kernel.
1396 bool "Allocate 2nd-level pagetables from highmem"
1398 depends on !OUTER_CACHE
1400 config HW_PERF_EVENTS
1401 bool "Enable hardware performance counter support for perf events"
1402 depends on PERF_EVENTS && CPU_HAS_PMU
1405 Enable hardware performance counter support for perf events. If
1406 disabled, perf events will use software events only.
1411 This enables support for sparse irqs. This is useful in general
1412 as most CPUs have a fairly sparse array of IRQ vectors, which
1413 the irq_desc then maps directly on to. Systems with a high
1414 number of off-chip IRQs will want to treat this as
1415 experimental until they have been independently verified.
1419 config FORCE_MAX_ZONEORDER
1420 int "Maximum zone order" if ARCH_SHMOBILE
1421 range 11 64 if ARCH_SHMOBILE
1422 default "9" if SA1111
1425 The kernel memory allocator divides physically contiguous memory
1426 blocks into "zones", where each zone is a power of two number of
1427 pages. This option selects the largest power of two that the kernel
1428 keeps in the memory allocator. If you need to allocate very large
1429 blocks of physically contiguous memory, then you may need to
1430 increase this value.
1432 This config option is actually maximum order plus one. For example,
1433 a value of 11 means that the largest free memory block is 2^10 pages.
1436 bool "Timer and CPU usage LEDs"
1437 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1438 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1439 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1440 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1441 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1442 ARCH_AT91 || ARCH_DAVINCI || \
1443 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1445 If you say Y here, the LEDs on your machine will be used
1446 to provide useful information about your current system status.
1448 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1449 be able to select which LEDs are active using the options below. If
1450 you are compiling a kernel for the EBSA-110 or the LART however, the
1451 red LED will simply flash regularly to indicate that the system is
1452 still functional. It is safe to say Y here if you have a CATS
1453 system, but the driver will do nothing.
1456 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1457 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1458 || MACH_OMAP_PERSEUS2
1460 depends on !GENERIC_CLOCKEVENTS
1461 default y if ARCH_EBSA110
1463 If you say Y here, one of the system LEDs (the green one on the
1464 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1465 will flash regularly to indicate that the system is still
1466 operational. This is mainly useful to kernel hackers who are
1467 debugging unstable kernels.
1469 The LART uses the same LED for both Timer LED and CPU usage LED
1470 functions. You may choose to use both, but the Timer LED function
1471 will overrule the CPU usage LED.
1474 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1476 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1477 || MACH_OMAP_PERSEUS2
1480 If you say Y here, the red LED will be used to give a good real
1481 time indication of CPU usage, by lighting whenever the idle task
1482 is not currently executing.
1484 The LART uses the same LED for both Timer LED and CPU usage LED
1485 functions. You may choose to use both, but the Timer LED function
1486 will overrule the CPU usage LED.
1488 config ALIGNMENT_TRAP
1490 depends on CPU_CP15_MMU
1491 default y if !ARCH_EBSA110
1492 select HAVE_PROC_CPU if PROC_FS
1494 ARM processors cannot fetch/store information which is not
1495 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1496 address divisible by 4. On 32-bit ARM processors, these non-aligned
1497 fetch/store instructions will be emulated in software if you say
1498 here, which has a severe performance impact. This is necessary for
1499 correct operation of some network protocols. With an IP-only
1500 configuration it is safe to say N, otherwise say Y.
1502 config UACCESS_WITH_MEMCPY
1503 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1504 depends on MMU && EXPERIMENTAL
1505 default y if CPU_FEROCEON
1507 Implement faster copy_to_user and clear_user methods for CPU
1508 cores where a 8-word STM instruction give significantly higher
1509 memory write throughput than a sequence of individual 32bit stores.
1511 A possible side effect is a slight increase in scheduling latency
1512 between threads sharing the same address space if they invoke
1513 such copy operations with large buffers.
1515 However, if the CPU data cache is using a write-allocate mode,
1516 this option is unlikely to provide any performance gain.
1520 prompt "Enable seccomp to safely compute untrusted bytecode"
1522 This kernel feature is useful for number crunching applications
1523 that may need to compute untrusted bytecode during their
1524 execution. By using pipes or other transports made available to
1525 the process as file descriptors supporting the read/write
1526 syscalls, it's possible to isolate those applications in
1527 their own address space using seccomp. Once seccomp is
1528 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1529 and the task is only allowed to execute a few safe syscalls
1530 defined by each seccomp mode.
1532 config CC_STACKPROTECTOR
1533 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1535 This option turns on the -fstack-protector GCC feature. This
1536 feature puts, at the beginning of functions, a canary value on
1537 the stack just before the return address, and validates
1538 the value just before actually returning. Stack based buffer
1539 overflows (that need to overwrite this return address) now also
1540 overwrite the canary, which gets detected and the attack is then
1541 neutralized via a kernel panic.
1542 This feature requires gcc version 4.2 or above.
1544 config DEPRECATED_PARAM_STRUCT
1545 bool "Provide old way to pass kernel parameters"
1547 This was deprecated in 2001 and announced to live on for 5 years.
1548 Some old boot loaders still use this way.
1554 # Compressed boot loader in ROM. Yes, we really want to ask about
1555 # TEXT and BSS so we preserve their values in the config files.
1556 config ZBOOT_ROM_TEXT
1557 hex "Compressed ROM boot loader base address"
1560 The physical address at which the ROM-able zImage is to be
1561 placed in the target. Platforms which normally make use of
1562 ROM-able zImage formats normally set this to a suitable
1563 value in their defconfig file.
1565 If ZBOOT_ROM is not enabled, this has no effect.
1567 config ZBOOT_ROM_BSS
1568 hex "Compressed ROM boot loader BSS address"
1571 The base address of an area of read/write memory in the target
1572 for the ROM-able zImage which must be available while the
1573 decompressor is running. It must be large enough to hold the
1574 entire decompressed kernel plus an additional 128 KiB.
1575 Platforms which normally make use of ROM-able zImage formats
1576 normally set this to a suitable value in their defconfig file.
1578 If ZBOOT_ROM is not enabled, this has no effect.
1581 bool "Compressed boot loader in ROM/flash"
1582 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1584 Say Y here if you intend to execute your compressed kernel image
1585 (zImage) directly from ROM or flash. If unsure, say N.
1588 string "Default kernel command string"
1591 On some architectures (EBSA110 and CATS), there is currently no way
1592 for the boot loader to pass arguments to the kernel. For these
1593 architectures, you should supply some command-line options at build
1594 time by entering them here. As a minimum, you should specify the
1595 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1597 config CMDLINE_FORCE
1598 bool "Always use the default kernel command string"
1599 depends on CMDLINE != ""
1601 Always use the default kernel command string, even if the boot
1602 loader passes other arguments to the kernel.
1603 This is useful if you cannot or don't want to change the
1604 command-line options your boot loader passes to the kernel.
1609 bool "Kernel Execute-In-Place from ROM"
1610 depends on !ZBOOT_ROM
1612 Execute-In-Place allows the kernel to run from non-volatile storage
1613 directly addressable by the CPU, such as NOR flash. This saves RAM
1614 space since the text section of the kernel is not loaded from flash
1615 to RAM. Read-write sections, such as the data section and stack,
1616 are still copied to RAM. The XIP kernel is not compressed since
1617 it has to run directly from flash, so it will take more space to
1618 store it. The flash address used to link the kernel object files,
1619 and for storing it, is configuration dependent. Therefore, if you
1620 say Y here, you must know the proper physical address where to
1621 store the kernel image depending on your own flash memory usage.
1623 Also note that the make target becomes "make xipImage" rather than
1624 "make zImage" or "make Image". The final kernel binary to put in
1625 ROM memory will be arch/arm/boot/xipImage.
1629 config XIP_PHYS_ADDR
1630 hex "XIP Kernel Physical Location"
1631 depends on XIP_KERNEL
1632 default "0x00080000"
1634 This is the physical address in your flash memory the kernel will
1635 be linked for and stored to. This address is dependent on your
1639 bool "Kexec system call (EXPERIMENTAL)"
1640 depends on EXPERIMENTAL
1642 kexec is a system call that implements the ability to shutdown your
1643 current kernel, and to start another kernel. It is like a reboot
1644 but it is independent of the system firmware. And like a reboot
1645 you can start any kernel with it, not just Linux.
1647 It is an ongoing process to be certain the hardware in a machine
1648 is properly shutdown, so do not be surprised if this code does not
1649 initially work for you. It may help to enable device hotplugging
1653 bool "Export atags in procfs"
1657 Should the atags used to boot the kernel be exported in an "atags"
1658 file in procfs. Useful with kexec.
1660 config AUTO_ZRELADDR
1661 bool "Auto calculation of the decompressed kernel image address"
1662 depends on !ZBOOT_ROM && !ARCH_U300
1664 ZRELADDR is the physical address where the decompressed kernel
1665 image will be placed. If AUTO_ZRELADDR is selected, the address
1666 will be determined at run-time by masking the current IP with
1667 0xf8000000. This assumes the zImage being placed in the first 128MB
1668 from start of memory.
1672 menu "CPU Power Management"
1676 source "drivers/cpufreq/Kconfig"
1679 tristate "CPUfreq driver for i.MX CPUs"
1680 depends on ARCH_MXC && CPU_FREQ
1682 This enables the CPUfreq driver for i.MX CPUs.
1684 config CPU_FREQ_SA1100
1687 config CPU_FREQ_SA1110
1690 config CPU_FREQ_INTEGRATOR
1691 tristate "CPUfreq driver for ARM Integrator CPUs"
1692 depends on ARCH_INTEGRATOR && CPU_FREQ
1695 This enables the CPUfreq driver for ARM Integrator CPUs.
1697 For details, take a look at <file:Documentation/cpu-freq>.
1703 depends on CPU_FREQ && ARCH_PXA && PXA25x
1705 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1707 config CPU_FREQ_S3C64XX
1708 bool "CPUfreq support for Samsung S3C64XX CPUs"
1709 depends on CPU_FREQ && CPU_S3C6410
1714 Internal configuration node for common cpufreq on Samsung SoC
1716 config CPU_FREQ_S3C24XX
1717 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1718 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1721 This enables the CPUfreq driver for the Samsung S3C24XX family
1724 For details, take a look at <file:Documentation/cpu-freq>.
1728 config CPU_FREQ_S3C24XX_PLL
1729 bool "Support CPUfreq changing of PLL frequency"
1730 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1732 Compile in support for changing the PLL frequency from the
1733 S3C24XX series CPUfreq driver. The PLL takes time to settle
1734 after a frequency change, so by default it is not enabled.
1736 This also means that the PLL tables for the selected CPU(s) will
1737 be built which may increase the size of the kernel image.
1739 config CPU_FREQ_S3C24XX_DEBUG
1740 bool "Debug CPUfreq Samsung driver core"
1741 depends on CPU_FREQ_S3C24XX
1743 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1745 config CPU_FREQ_S3C24XX_IODEBUG
1746 bool "Debug CPUfreq Samsung driver IO timing"
1747 depends on CPU_FREQ_S3C24XX
1749 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1751 config CPU_FREQ_S3C24XX_DEBUGFS
1752 bool "Export debugfs for CPUFreq"
1753 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1755 Export status information via debugfs.
1759 source "drivers/cpuidle/Kconfig"
1763 menu "Floating point emulation"
1765 comment "At least one emulation must be selected"
1768 bool "NWFPE math emulation"
1769 depends on !AEABI || OABI_COMPAT
1771 Say Y to include the NWFPE floating point emulator in the kernel.
1772 This is necessary to run most binaries. Linux does not currently
1773 support floating point hardware so you need to say Y here even if
1774 your machine has an FPA or floating point co-processor podule.
1776 You may say N here if you are going to load the Acorn FPEmulator
1777 early in the bootup.
1780 bool "Support extended precision"
1781 depends on FPE_NWFPE
1783 Say Y to include 80-bit support in the kernel floating-point
1784 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1785 Note that gcc does not generate 80-bit operations by default,
1786 so in most cases this option only enlarges the size of the
1787 floating point emulator without any good reason.
1789 You almost surely want to say N here.
1792 bool "FastFPE math emulation (EXPERIMENTAL)"
1793 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1795 Say Y here to include the FAST floating point emulator in the kernel.
1796 This is an experimental much faster emulator which now also has full
1797 precision for the mantissa. It does not support any exceptions.
1798 It is very simple, and approximately 3-6 times faster than NWFPE.
1800 It should be sufficient for most programs. It may be not suitable
1801 for scientific calculations, but you have to check this for yourself.
1802 If you do not feel you need a faster FP emulation you should better
1806 bool "VFP-format floating point maths"
1807 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1809 Say Y to include VFP support code in the kernel. This is needed
1810 if your hardware includes a VFP unit.
1812 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1813 release notes and additional status information.
1815 Say N if your target does not have VFP hardware.
1823 bool "Advanced SIMD (NEON) Extension support"
1824 depends on VFPv3 && CPU_V7
1826 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1831 menu "Userspace binary formats"
1833 source "fs/Kconfig.binfmt"
1836 tristate "RISC OS personality"
1839 Say Y here to include the kernel code necessary if you want to run
1840 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1841 experimental; if this sounds frightening, say N and sleep in peace.
1842 You can also say M here to compile this support as a module (which
1843 will be called arthur).
1847 menu "Power management options"
1849 source "kernel/power/Kconfig"
1851 config ARCH_SUSPEND_POSSIBLE
1856 source "net/Kconfig"
1858 source "drivers/Kconfig"
1862 source "arch/arm/Kconfig.debug"
1864 source "security/Kconfig"
1866 source "crypto/Kconfig"
1868 source "lib/Kconfig"