5 select HAVE_DMA_API_DEBUG
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
19 select HAVE_GENERIC_DMA_COHERENT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
22 select HAVE_KERNEL_LZMA
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
26 select HAVE_REGS_AND_STACK_ACCESS_API
27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
28 select HAVE_C_RECORDMCOUNT
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
31 select GENERIC_IRQ_SHOW
33 The ARM series is a line of low-power-consumption RISC chip designs
34 licensed by ARM Ltd and targeted at embedded applications and
35 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
36 manufactured, but legacy ARM-based PC hardware remains popular in
37 Europe. There is an ARM Linux project with a web page at
38 <http://www.arm.linux.org.uk/>.
46 config SYS_SUPPORTS_APM_EMULATION
49 config HAVE_SCHED_CLOCK
55 config ARCH_USES_GETTIMEOFFSET
59 config GENERIC_CLOCKEVENTS
62 config GENERIC_CLOCKEVENTS_BROADCAST
64 depends on GENERIC_CLOCKEVENTS
73 select GENERIC_ALLOCATOR
84 The Extended Industry Standard Architecture (EISA) bus was
85 developed as an open alternative to the IBM MicroChannel bus.
87 The EISA bus provided some of the features of the IBM MicroChannel
88 bus while maintaining backward compatibility with cards made for
89 the older ISA bus. The EISA bus saw limited use between 1988 and
90 1995 when it was made obsolete by the PCI bus.
92 Say Y here if you are building a kernel for an EISA-based machine.
102 MicroChannel Architecture is found in some IBM PS/2 machines and
103 laptops. It is a bus system similar to PCI or ISA. See
104 <file:Documentation/mca.txt> (and especially the web page given
105 there) before attempting to build an MCA bus kernel.
107 config STACKTRACE_SUPPORT
111 config HAVE_LATENCYTOP_SUPPORT
116 config LOCKDEP_SUPPORT
120 config TRACE_IRQFLAGS_SUPPORT
124 config HARDIRQS_SW_RESEND
128 config GENERIC_IRQ_PROBE
132 config GENERIC_LOCKBREAK
135 depends on SMP && PREEMPT
137 config RWSEM_GENERIC_SPINLOCK
141 config RWSEM_XCHGADD_ALGORITHM
144 config ARCH_HAS_ILOG2_U32
147 config ARCH_HAS_ILOG2_U64
150 config ARCH_HAS_CPUFREQ
153 Internal node to signify that the ARCH has CPUFREQ support
154 and that the relevant menu configurations are displayed for
157 config ARCH_HAS_CPU_IDLE_WAIT
160 config GENERIC_HWEIGHT
164 config GENERIC_CALIBRATE_DELAY
168 config ARCH_MAY_HAVE_PC_FDC
174 config NEED_DMA_MAP_STATE
177 config GENERIC_ISA_DMA
188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
189 default DRAM_BASE if REMAP_VECTORS_TO_RAM
192 The base address of exception vectors.
194 config ARM_PATCH_PHYS_VIRT
195 bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
196 depends on EXPERIMENTAL
197 depends on !XIP_KERNEL && MMU
198 depends on !ARCH_REALVIEW || !SPARSEMEM
200 Patch phys-to-virt and virt-to-phys translation functions at
201 boot and module load time according to the position of the
202 kernel in system memory.
204 This can only be used with non-XIP MMU kernels where the base
205 of physical memory is at a 16MB boundary, or theoretically 64K
206 for the MSM machine class.
208 config ARM_PATCH_PHYS_VIRT_16BIT
210 depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
212 This option extends the physical to virtual translation patching
213 to allow physical memory down to a theoretical minimum of 64K
216 source "init/Kconfig"
218 source "kernel/Kconfig.freezer"
223 bool "MMU-based Paged Memory Management Support"
226 Select if you want MMU-based virtualised addressing space
227 support by paged memory management. If unsure, say 'Y'.
230 # The "ARM system type" choice list is ordered alphabetically by option
231 # text. Please add new entries in the option alphabetic order.
234 prompt "ARM system type"
235 default ARCH_VERSATILE
237 config ARCH_INTEGRATOR
238 bool "ARM Ltd. Integrator family"
240 select ARCH_HAS_CPUFREQ
243 select GENERIC_CLOCKEVENTS
244 select PLAT_VERSATILE
245 select PLAT_VERSATILE_FPGA_IRQ
247 Support for ARM's Integrator platform.
250 bool "ARM Ltd. RealView family"
254 select GENERIC_CLOCKEVENTS
255 select ARCH_WANT_OPTIONAL_GPIOLIB
256 select PLAT_VERSATILE
257 select PLAT_VERSATILE_CLCD
258 select ARM_TIMER_SP804
259 select GPIO_PL061 if GPIOLIB
261 This enables support for ARM Ltd RealView boards.
263 config ARCH_VERSATILE
264 bool "ARM Ltd. Versatile family"
269 select GENERIC_CLOCKEVENTS
270 select ARCH_WANT_OPTIONAL_GPIOLIB
271 select PLAT_VERSATILE
272 select PLAT_VERSATILE_CLCD
273 select PLAT_VERSATILE_FPGA_IRQ
274 select ARM_TIMER_SP804
276 This enables support for ARM Ltd Versatile board.
279 bool "ARM Ltd. Versatile Express family"
280 select ARCH_WANT_OPTIONAL_GPIOLIB
282 select ARM_TIMER_SP804
284 select GENERIC_CLOCKEVENTS
286 select HAVE_PATA_PLATFORM
288 select PLAT_VERSATILE
289 select PLAT_VERSATILE_CLCD
291 This enables support for the ARM Ltd Versatile Express boards.
295 select ARCH_REQUIRE_GPIOLIB
298 select ARM_PATCH_PHYS_VIRT if MMU
300 This enables support for systems based on the Atmel AT91RM9200,
301 AT91SAM9 and AT91CAP9 processors.
304 bool "Broadcom BCMRING"
308 select ARM_TIMER_SP804
310 select GENERIC_CLOCKEVENTS
311 select ARCH_WANT_OPTIONAL_GPIOLIB
313 Support for Broadcom's BCMRing platform.
316 bool "Cirrus Logic CLPS711x/EP721x-based"
318 select ARCH_USES_GETTIMEOFFSET
320 Support for Cirrus Logic 711x/721x based boards.
323 bool "Cavium Networks CNS3XXX family"
325 select GENERIC_CLOCKEVENTS
327 select MIGHT_HAVE_PCI
328 select PCI_DOMAINS if PCI
330 Support for Cavium Networks CNS3XXX platform.
333 bool "Cortina Systems Gemini"
335 select ARCH_REQUIRE_GPIOLIB
336 select ARCH_USES_GETTIMEOFFSET
338 Support for the Cortina Systems Gemini family SoCs
345 select ARCH_USES_GETTIMEOFFSET
347 This is an evaluation board for the StrongARM processor available
348 from Digital. It has limited hardware on-board, including an
349 Ethernet interface, two PCMCIA sockets, two serial ports and a
358 select ARCH_REQUIRE_GPIOLIB
359 select ARCH_HAS_HOLES_MEMORYMODEL
360 select ARCH_USES_GETTIMEOFFSET
362 This enables support for the Cirrus EP93xx series of CPUs.
364 config ARCH_FOOTBRIDGE
368 select GENERIC_CLOCKEVENTS
370 Support for systems based on the DC21285 companion chip
371 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
374 bool "Freescale MXC/iMX-based"
375 select GENERIC_CLOCKEVENTS
376 select ARCH_REQUIRE_GPIOLIB
379 select HAVE_SCHED_CLOCK
381 Support for Freescale MXC/iMX-based family of processors
384 bool "Freescale MXS-based"
385 select GENERIC_CLOCKEVENTS
386 select ARCH_REQUIRE_GPIOLIB
390 Support for Freescale MXS-based family of processors
393 bool "Hilscher NetX based"
397 select GENERIC_CLOCKEVENTS
399 This enables support for systems based on the Hilscher NetX Soc
402 bool "Hynix HMS720x-based"
405 select ARCH_USES_GETTIMEOFFSET
407 This enables support for systems based on the Hynix HMS720x
415 select ARCH_SUPPORTS_MSI
418 Support for Intel's IOP13XX (XScale) family of processors.
426 select ARCH_REQUIRE_GPIOLIB
428 Support for Intel's 80219 and IOP32X (XScale) family of
437 select ARCH_REQUIRE_GPIOLIB
439 Support for Intel's IOP33X (XScale) family of processors.
446 select ARCH_USES_GETTIMEOFFSET
448 Support for Intel's IXP23xx (XScale) family of processors.
451 bool "IXP2400/2800-based"
455 select ARCH_USES_GETTIMEOFFSET
457 Support for Intel's IXP2400/2800 (XScale) family of processors.
465 select GENERIC_CLOCKEVENTS
466 select HAVE_SCHED_CLOCK
467 select MIGHT_HAVE_PCI
468 select DMABOUNCE if PCI
470 Support for Intel's IXP4XX (XScale) family of processors.
476 select ARCH_REQUIRE_GPIOLIB
477 select GENERIC_CLOCKEVENTS
480 Support for the Marvell Dove SoC 88AP510
483 bool "Marvell Kirkwood"
486 select ARCH_REQUIRE_GPIOLIB
487 select GENERIC_CLOCKEVENTS
490 Support for the following Marvell Kirkwood series SoCs:
491 88F6180, 88F6192 and 88F6281.
494 bool "Marvell Loki (88RC8480)"
496 select GENERIC_CLOCKEVENTS
499 Support for the Marvell Loki (88RC8480) SoC.
505 select ARCH_REQUIRE_GPIOLIB
508 select USB_ARCH_HAS_OHCI
511 select GENERIC_CLOCKEVENTS
513 Support for the NXP LPC32XX family of processors
516 bool "Marvell MV78xx0"
519 select ARCH_REQUIRE_GPIOLIB
520 select GENERIC_CLOCKEVENTS
523 Support for the following Marvell MV78xx0 series SoCs:
531 select ARCH_REQUIRE_GPIOLIB
532 select GENERIC_CLOCKEVENTS
535 Support for the following Marvell Orion 5x series SoCs:
536 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
537 Orion-2 (5281), Orion-1-90 (6183).
540 bool "Marvell PXA168/910/MMP2"
542 select ARCH_REQUIRE_GPIOLIB
544 select GENERIC_CLOCKEVENTS
545 select HAVE_SCHED_CLOCK
550 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
553 bool "Micrel/Kendin KS8695"
555 select ARCH_REQUIRE_GPIOLIB
556 select ARCH_USES_GETTIMEOFFSET
558 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
559 System-on-Chip devices.
562 bool "Nuvoton W90X900 CPU"
564 select ARCH_REQUIRE_GPIOLIB
567 select GENERIC_CLOCKEVENTS
569 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
570 At present, the w90x900 has been renamed nuc900, regarding
571 the ARM series product line, you can login the following
572 link address to know more.
574 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
575 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
578 bool "Nuvoton NUC93X CPU"
582 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
583 low-power and high performance MPEG-4/JPEG multimedia controller chip.
590 select GENERIC_CLOCKEVENTS
593 select HAVE_SCHED_CLOCK
594 select ARCH_HAS_BARRIERS if CACHE_L2X0
595 select ARCH_HAS_CPUFREQ
597 This enables support for NVIDIA Tegra based systems (Tegra APX,
598 Tegra 6xx and Tegra 2 series).
601 bool "Philips Nexperia PNX4008 Mobile"
604 select ARCH_USES_GETTIMEOFFSET
606 This enables support for Philips PNX4008 mobile platform.
609 bool "PXA2xx/PXA3xx-based"
612 select ARCH_HAS_CPUFREQ
615 select ARCH_REQUIRE_GPIOLIB
616 select GENERIC_CLOCKEVENTS
617 select HAVE_SCHED_CLOCK
622 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
627 select GENERIC_CLOCKEVENTS
628 select ARCH_REQUIRE_GPIOLIB
631 Support for Qualcomm MSM/QSD based systems. This runs on the
632 apps processor of the MSM/QSD and depends on a shared memory
633 interface to the modem processor which runs the baseband
634 stack and controls some vital subsystems
635 (clock and power control, etc).
638 bool "Renesas SH-Mobile / R-Mobile"
641 select GENERIC_CLOCKEVENTS
644 select MULTI_IRQ_HANDLER
646 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
653 select ARCH_MAY_HAVE_PC_FDC
654 select HAVE_PATA_PLATFORM
657 select ARCH_SPARSEMEM_ENABLE
658 select ARCH_USES_GETTIMEOFFSET
660 On the Acorn Risc-PC, Linux can support the internal IDE disk and
661 CD-ROM interface, serial and parallel port, and the floppy drive.
668 select ARCH_SPARSEMEM_ENABLE
670 select ARCH_HAS_CPUFREQ
672 select GENERIC_CLOCKEVENTS
674 select HAVE_SCHED_CLOCK
676 select ARCH_REQUIRE_GPIOLIB
678 Support for StrongARM 11x0 based boards.
681 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
683 select ARCH_HAS_CPUFREQ
685 select ARCH_USES_GETTIMEOFFSET
686 select HAVE_S3C2410_I2C if I2C
688 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
689 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
690 the Samsung SMDK2410 development board (and derivatives).
692 Note, the S3C2416 and the S3C2450 are so close that they even share
693 the same SoC ID code. This means that there is no separate machine
694 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
697 bool "Samsung S3C64XX"
703 select ARCH_USES_GETTIMEOFFSET
704 select ARCH_HAS_CPUFREQ
705 select ARCH_REQUIRE_GPIOLIB
706 select SAMSUNG_CLKSRC
707 select SAMSUNG_IRQ_VIC_TIMER
708 select SAMSUNG_IRQ_UART
709 select S3C_GPIO_TRACK
710 select S3C_GPIO_PULL_UPDOWN
711 select S3C_GPIO_CFG_S3C24XX
712 select S3C_GPIO_CFG_S3C64XX
714 select USB_ARCH_HAS_OHCI
715 select SAMSUNG_GPIOLIB_4BIT
716 select HAVE_S3C2410_I2C if I2C
717 select HAVE_S3C2410_WATCHDOG if WATCHDOG
719 Samsung S3C64XX series based systems
722 bool "Samsung S5P6440 S5P6450"
726 select HAVE_S3C2410_WATCHDOG if WATCHDOG
727 select GENERIC_CLOCKEVENTS
728 select HAVE_SCHED_CLOCK
729 select HAVE_S3C2410_I2C if I2C
730 select HAVE_S3C_RTC if RTC_CLASS
732 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
736 bool "Samsung S5PC100"
740 select ARM_L1_CACHE_SHIFT_6
741 select ARCH_USES_GETTIMEOFFSET
742 select HAVE_S3C2410_I2C if I2C
743 select HAVE_S3C_RTC if RTC_CLASS
744 select HAVE_S3C2410_WATCHDOG if WATCHDOG
746 Samsung S5PC100 series based systems
749 bool "Samsung S5PV210/S5PC110"
751 select ARCH_SPARSEMEM_ENABLE
754 select ARM_L1_CACHE_SHIFT_6
755 select ARCH_HAS_CPUFREQ
756 select GENERIC_CLOCKEVENTS
757 select HAVE_SCHED_CLOCK
758 select HAVE_S3C2410_I2C if I2C
759 select HAVE_S3C_RTC if RTC_CLASS
760 select HAVE_S3C2410_WATCHDOG if WATCHDOG
762 Samsung S5PV210/S5PC110 series based systems
765 bool "Samsung EXYNOS4"
767 select ARCH_SPARSEMEM_ENABLE
770 select ARCH_HAS_CPUFREQ
771 select GENERIC_CLOCKEVENTS
772 select HAVE_S3C_RTC if RTC_CLASS
773 select HAVE_S3C2410_I2C if I2C
774 select HAVE_S3C2410_WATCHDOG if WATCHDOG
776 Samsung EXYNOS4 series based systems
785 select ARCH_USES_GETTIMEOFFSET
787 Support for the StrongARM based Digital DNARD machine, also known
788 as "Shark" (<http://www.shark-linux.de/shark.html>).
791 bool "Telechips TCC ARM926-based systems"
796 select GENERIC_CLOCKEVENTS
798 Support for Telechips TCC ARM926-based systems.
801 bool "ST-Ericsson U300 Series"
805 select HAVE_SCHED_CLOCK
809 select GENERIC_CLOCKEVENTS
813 Support for ST-Ericsson U300 series mobile platforms.
816 bool "ST-Ericsson U8500 Series"
819 select GENERIC_CLOCKEVENTS
821 select ARCH_REQUIRE_GPIOLIB
822 select ARCH_HAS_CPUFREQ
824 Support for ST-Ericsson's Ux500 architecture
827 bool "STMicroelectronics Nomadik"
832 select GENERIC_CLOCKEVENTS
833 select ARCH_REQUIRE_GPIOLIB
835 Support for the Nomadik platform by ST-Ericsson
839 select GENERIC_CLOCKEVENTS
840 select ARCH_REQUIRE_GPIOLIB
844 select GENERIC_ALLOCATOR
845 select GENERIC_IRQ_CHIP
846 select ARCH_HAS_HOLES_MEMORYMODEL
848 Support for TI's DaVinci platform.
853 select ARCH_REQUIRE_GPIOLIB
854 select ARCH_HAS_CPUFREQ
855 select GENERIC_CLOCKEVENTS
856 select HAVE_SCHED_CLOCK
857 select ARCH_HAS_HOLES_MEMORYMODEL
859 Support for TI's OMAP platform (OMAP1/2/3/4).
862 bool "Rockchip Soc Rk29"
866 select HAVE_SCHED_CLOCK
867 select ARCH_HAS_CPUFREQ
869 select GENERIC_CLOCKEVENTS
870 select ARCH_REQUIRE_GPIOLIB
875 select ARM_L1_CACHE_SHIFT_6
877 Support for Rockchip RK29 soc.
882 select ARCH_REQUIRE_GPIOLIB
885 select GENERIC_CLOCKEVENTS
888 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
891 bool "VIA/WonderMedia 85xx"
894 select ARCH_HAS_CPUFREQ
895 select GENERIC_CLOCKEVENTS
896 select ARCH_REQUIRE_GPIOLIB
899 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
903 # This is sorted alphabetically by mach-* pathname. However, plat-*
904 # Kconfigs may be included either alphabetically (according to the
905 # plat- suffix) or along side the corresponding mach-* source.
907 source "arch/arm/mach-at91/Kconfig"
909 source "arch/arm/mach-bcmring/Kconfig"
911 source "arch/arm/mach-clps711x/Kconfig"
913 source "arch/arm/mach-cns3xxx/Kconfig"
915 source "arch/arm/mach-davinci/Kconfig"
917 source "arch/arm/mach-dove/Kconfig"
919 source "arch/arm/mach-ep93xx/Kconfig"
921 source "arch/arm/mach-footbridge/Kconfig"
923 source "arch/arm/mach-gemini/Kconfig"
925 source "arch/arm/mach-h720x/Kconfig"
927 source "arch/arm/mach-integrator/Kconfig"
929 source "arch/arm/mach-iop32x/Kconfig"
931 source "arch/arm/mach-iop33x/Kconfig"
933 source "arch/arm/mach-iop13xx/Kconfig"
935 source "arch/arm/mach-ixp4xx/Kconfig"
937 source "arch/arm/mach-ixp2000/Kconfig"
939 source "arch/arm/mach-ixp23xx/Kconfig"
941 source "arch/arm/mach-kirkwood/Kconfig"
943 source "arch/arm/mach-ks8695/Kconfig"
945 source "arch/arm/mach-loki/Kconfig"
947 source "arch/arm/mach-lpc32xx/Kconfig"
949 source "arch/arm/mach-msm/Kconfig"
951 source "arch/arm/mach-mv78xx0/Kconfig"
953 source "arch/arm/plat-mxc/Kconfig"
955 source "arch/arm/mach-mxs/Kconfig"
957 source "arch/arm/mach-netx/Kconfig"
959 source "arch/arm/mach-nomadik/Kconfig"
960 source "arch/arm/plat-nomadik/Kconfig"
962 source "arch/arm/mach-nuc93x/Kconfig"
964 source "arch/arm/plat-omap/Kconfig"
966 source "arch/arm/mach-omap1/Kconfig"
968 source "arch/arm/mach-omap2/Kconfig"
970 source "arch/arm/mach-orion5x/Kconfig"
972 source "arch/arm/mach-pxa/Kconfig"
973 source "arch/arm/plat-pxa/Kconfig"
975 source "arch/arm/mach-mmp/Kconfig"
977 source "arch/arm/mach-realview/Kconfig"
979 source "arch/arm/mach-rk29/Kconfig"
981 source "arch/arm/mach-sa1100/Kconfig"
983 source "arch/arm/plat-samsung/Kconfig"
984 source "arch/arm/plat-s3c24xx/Kconfig"
985 source "arch/arm/plat-s5p/Kconfig"
987 source "arch/arm/plat-spear/Kconfig"
989 source "arch/arm/plat-tcc/Kconfig"
992 source "arch/arm/mach-s3c2400/Kconfig"
993 source "arch/arm/mach-s3c2410/Kconfig"
994 source "arch/arm/mach-s3c2412/Kconfig"
995 source "arch/arm/mach-s3c2416/Kconfig"
996 source "arch/arm/mach-s3c2440/Kconfig"
997 source "arch/arm/mach-s3c2443/Kconfig"
1001 source "arch/arm/mach-s3c64xx/Kconfig"
1004 source "arch/arm/mach-s5p64x0/Kconfig"
1006 source "arch/arm/mach-s5pc100/Kconfig"
1008 source "arch/arm/mach-s5pv210/Kconfig"
1010 source "arch/arm/mach-exynos4/Kconfig"
1012 source "arch/arm/mach-shmobile/Kconfig"
1014 source "arch/arm/mach-tegra/Kconfig"
1016 source "arch/arm/mach-u300/Kconfig"
1018 source "arch/arm/mach-ux500/Kconfig"
1020 source "arch/arm/mach-versatile/Kconfig"
1022 source "arch/arm/mach-vexpress/Kconfig"
1023 source "arch/arm/plat-versatile/Kconfig"
1025 source "arch/arm/mach-vt8500/Kconfig"
1027 source "arch/arm/mach-w90x900/Kconfig"
1029 # Definitions to make life easier
1035 select GENERIC_CLOCKEVENTS
1036 select HAVE_SCHED_CLOCK
1041 select GENERIC_IRQ_CHIP
1042 select HAVE_SCHED_CLOCK
1047 config PLAT_VERSATILE
1050 config ARM_TIMER_SP804
1054 source arch/arm/mm/Kconfig
1057 bool "Enable iWMMXt support"
1058 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1059 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1061 Enable support for iWMMXt context switching at run time if
1062 running on a CPU that supports it.
1064 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1067 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1071 depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
1072 (!ARCH_OMAP3 || OMAP3_EMU)
1076 config MULTI_IRQ_HANDLER
1079 Allow each machine to specify it's own IRQ handler at run time.
1082 source "arch/arm/Kconfig-nommu"
1085 config ARM_ERRATA_411920
1086 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1087 depends on CPU_V6 || CPU_V6K
1089 Invalidation of the Instruction Cache operation can
1090 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1091 It does not affect the MPCore. This option enables the ARM Ltd.
1092 recommended workaround.
1094 config ARM_ERRATA_430973
1095 bool "ARM errata: Stale prediction on replaced interworking branch"
1098 This option enables the workaround for the 430973 Cortex-A8
1099 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1100 interworking branch is replaced with another code sequence at the
1101 same virtual address, whether due to self-modifying code or virtual
1102 to physical address re-mapping, Cortex-A8 does not recover from the
1103 stale interworking branch prediction. This results in Cortex-A8
1104 executing the new code sequence in the incorrect ARM or Thumb state.
1105 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1106 and also flushes the branch target cache at every context switch.
1107 Note that setting specific bits in the ACTLR register may not be
1108 available in non-secure mode.
1110 config ARM_ERRATA_458693
1111 bool "ARM errata: Processor deadlock when a false hazard is created"
1114 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1115 erratum. For very specific sequences of memory operations, it is
1116 possible for a hazard condition intended for a cache line to instead
1117 be incorrectly associated with a different cache line. This false
1118 hazard might then cause a processor deadlock. The workaround enables
1119 the L1 caching of the NEON accesses and disables the PLD instruction
1120 in the ACTLR register. Note that setting specific bits in the ACTLR
1121 register may not be available in non-secure mode.
1123 config ARM_ERRATA_460075
1124 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1127 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1128 erratum. Any asynchronous access to the L2 cache may encounter a
1129 situation in which recent store transactions to the L2 cache are lost
1130 and overwritten with stale memory contents from external memory. The
1131 workaround disables the write-allocate mode for the L2 cache via the
1132 ACTLR register. Note that setting specific bits in the ACTLR register
1133 may not be available in non-secure mode.
1135 config ARM_ERRATA_742230
1136 bool "ARM errata: DMB operation may be faulty"
1137 depends on CPU_V7 && SMP
1139 This option enables the workaround for the 742230 Cortex-A9
1140 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1141 between two write operations may not ensure the correct visibility
1142 ordering of the two writes. This workaround sets a specific bit in
1143 the diagnostic register of the Cortex-A9 which causes the DMB
1144 instruction to behave as a DSB, ensuring the correct behaviour of
1147 config ARM_ERRATA_742231
1148 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1149 depends on CPU_V7 && SMP
1151 This option enables the workaround for the 742231 Cortex-A9
1152 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1153 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1154 accessing some data located in the same cache line, may get corrupted
1155 data due to bad handling of the address hazard when the line gets
1156 replaced from one of the CPUs at the same time as another CPU is
1157 accessing it. This workaround sets specific bits in the diagnostic
1158 register of the Cortex-A9 which reduces the linefill issuing
1159 capabilities of the processor.
1161 config PL310_ERRATA_588369
1162 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1163 depends on CACHE_L2X0
1165 The PL310 L2 cache controller implements three types of Clean &
1166 Invalidate maintenance operations: by Physical Address
1167 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1168 They are architecturally defined to behave as the execution of a
1169 clean operation followed immediately by an invalidate operation,
1170 both performing to the same memory location. This functionality
1171 is not correctly implemented in PL310 as clean lines are not
1172 invalidated as a result of these operations.
1174 config ARM_ERRATA_720789
1175 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1176 depends on CPU_V7 && SMP
1178 This option enables the workaround for the 720789 Cortex-A9 (prior to
1179 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1180 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1181 As a consequence of this erratum, some TLB entries which should be
1182 invalidated are not, resulting in an incoherency in the system page
1183 tables. The workaround changes the TLB flushing routines to invalidate
1184 entries regardless of the ASID.
1186 config PL310_ERRATA_727915
1187 bool "Background Clean & Invalidate by Way operation can cause data corruption"
1188 depends on CACHE_L2X0
1190 PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1191 operation (offset 0x7FC). This operation runs in background so that
1192 PL310 can handle normal accesses while it is in progress. Under very
1193 rare circumstances, due to this erratum, write data can be lost when
1194 PL310 treats a cacheable write transaction during a Clean &
1195 Invalidate by Way operation.
1197 config ARM_ERRATA_743622
1198 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1201 This option enables the workaround for the 743622 Cortex-A9
1202 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1203 optimisation in the Cortex-A9 Store Buffer may lead to data
1204 corruption. This workaround sets a specific bit in the diagnostic
1205 register of the Cortex-A9 which disables the Store Buffer
1206 optimisation, preventing the defect from occurring. This has no
1207 visible impact on the overall performance or power consumption of the
1210 config ARM_ERRATA_751472
1211 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1212 depends on CPU_V7 && SMP
1214 This option enables the workaround for the 751472 Cortex-A9 (prior
1215 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1216 completion of a following broadcasted operation if the second
1217 operation is received by a CPU before the ICIALLUIS has completed,
1218 potentially leading to corrupted entries in the cache or TLB.
1220 config ARM_ERRATA_753970
1221 bool "ARM errata: cache sync operation may be faulty"
1222 depends on CACHE_PL310
1224 This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1226 Under some condition the effect of cache sync operation on
1227 the store buffer still remains when the operation completes.
1228 This means that the store buffer is always asked to drain and
1229 this prevents it from merging any further writes. The workaround
1230 is to replace the normal offset of cache sync operation (0x730)
1231 by another offset targeting an unmapped PL310 register 0x740.
1232 This has the same effect as the cache sync operation: store buffer
1233 drain and waiting for all buffers empty.
1235 config ARM_ERRATA_754322
1236 bool "ARM errata: possible faulty MMU translations following an ASID switch"
1239 This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1240 r3p*) erratum. A speculative memory access may cause a page table walk
1241 which starts prior to an ASID switch but completes afterwards. This
1242 can populate the micro-TLB with a stale entry which may be hit with
1243 the new ASID. This workaround places two dsb instructions in the mm
1244 switching code so that no page table walks can cross the ASID switch.
1246 config ARM_ERRATA_754327
1247 bool "ARM errata: no automatic Store Buffer drain"
1248 depends on CPU_V7 && SMP
1250 This option enables the workaround for the 754327 Cortex-A9 (prior to
1251 r2p0) erratum. The Store Buffer does not have any automatic draining
1252 mechanism and therefore a livelock may occur if an external agent
1253 continuously polls a memory location waiting to observe an update.
1254 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1255 written polling loops from denying visibility of updates to memory.
1259 source "arch/arm/common/Kconfig"
1269 Find out whether you have ISA slots on your motherboard. ISA is the
1270 name of a bus system, i.e. the way the CPU talks to the other stuff
1271 inside your box. Other bus systems are PCI, EISA, MicroChannel
1272 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1273 newer boards don't support it. If you have ISA, say Y, otherwise N.
1275 # Select ISA DMA controller support
1280 # Select ISA DMA interface
1285 bool "PCI support" if MIGHT_HAVE_PCI
1287 Find out whether you have a PCI motherboard. PCI is the name of a
1288 bus system, i.e. the way the CPU talks to the other stuff inside
1289 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1290 VESA. If you have PCI, say Y, otherwise N.
1296 config PCI_NANOENGINE
1297 bool "BSE nanoEngine PCI support"
1298 depends on SA1100_NANOENGINE
1300 Enable PCI on the BSE nanoEngine board.
1305 # Select the host bridge type
1306 config PCI_HOST_VIA82C505
1308 depends on PCI && ARCH_SHARK
1311 config PCI_HOST_ITE8152
1313 depends on PCI && MACH_ARMCORE
1317 source "drivers/pci/Kconfig"
1319 source "drivers/pcmcia/Kconfig"
1323 menu "Kernel Features"
1325 source "kernel/time/Kconfig"
1328 bool "Symmetric Multi-Processing"
1329 depends on CPU_V6K || CPU_V7
1330 depends on GENERIC_CLOCKEVENTS
1331 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1332 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1333 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1334 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1335 select USE_GENERIC_SMP_HELPERS
1336 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1338 This enables support for systems with more than one CPU. If you have
1339 a system with only one CPU, like most personal computers, say N. If
1340 you have a system with more than one CPU, say Y.
1342 If you say N here, the kernel will run on single and multiprocessor
1343 machines, but will use only one CPU of a multiprocessor machine. If
1344 you say Y here, the kernel will run on many, but not all, single
1345 processor machines. On a single processor machine, the kernel will
1346 run faster if you say N here.
1348 See also <file:Documentation/i386/IO-APIC.txt>,
1349 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1350 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1352 If you don't know what to do here, say N.
1355 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1356 depends on EXPERIMENTAL
1357 depends on SMP && !XIP_KERNEL
1360 SMP kernels contain instructions which fail on non-SMP processors.
1361 Enabling this option allows the kernel to modify itself to make
1362 these instructions safe. Disabling it allows about 1K of space
1365 If you don't know what to do here, say Y.
1371 This option enables support for the ARM system coherency unit
1378 This options enables support for the ARM timer and watchdog unit
1381 prompt "Memory split"
1384 Select the desired split between kernel and user memory.
1386 If you are not absolutely sure what you are doing, leave this
1390 bool "3G/1G user/kernel split"
1392 bool "2G/2G user/kernel split"
1394 bool "1G/3G user/kernel split"
1399 default 0x40000000 if VMSPLIT_1G
1400 default 0x80000000 if VMSPLIT_2G
1404 int "Maximum number of CPUs (2-32)"
1410 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1411 depends on SMP && HOTPLUG && EXPERIMENTAL
1413 Say Y here to experiment with turning CPUs off and on. CPUs
1414 can be controlled through /sys/devices/system/cpu.
1417 bool "Use local timer interrupts"
1420 select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1422 Enable support for local timers on SMP platforms, rather then the
1423 legacy IPI broadcast method. Local timers allows the system
1424 accounting to be spread across the timer interval, preventing a
1425 "thundering herd" at every timer tick.
1427 source kernel/Kconfig.preempt
1431 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1432 ARCH_S5PV210 || ARCH_EXYNOS4
1433 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1434 default AT91_TIMER_HZ if ARCH_AT91
1435 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1438 config THUMB2_KERNEL
1439 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1440 depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
1442 select ARM_ASM_UNIFIED
1444 By enabling this option, the kernel will be compiled in
1445 Thumb-2 mode. A compiler/assembler that understand the unified
1446 ARM-Thumb syntax is needed.
1450 config THUMB2_AVOID_R_ARM_THM_JUMP11
1451 bool "Work around buggy Thumb-2 short branch relocations in gas"
1452 depends on THUMB2_KERNEL && MODULES
1455 Various binutils versions can resolve Thumb-2 branches to
1456 locally-defined, preemptible global symbols as short-range "b.n"
1457 branch instructions.
1459 This is a problem, because there's no guarantee the final
1460 destination of the symbol, or any candidate locations for a
1461 trampoline, are within range of the branch. For this reason, the
1462 kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1463 relocation in modules at all, and it makes little sense to add
1466 The symptom is that the kernel fails with an "unsupported
1467 relocation" error when loading some modules.
1469 Until fixed tools are available, passing
1470 -fno-optimize-sibling-calls to gcc should prevent gcc generating
1471 code which hits this problem, at the cost of a bit of extra runtime
1472 stack usage in some cases.
1474 The problem is described in more detail at:
1475 https://bugs.launchpad.net/binutils-linaro/+bug/725126
1477 Only Thumb-2 kernels are affected.
1479 Unless you are sure your tools don't have this problem, say Y.
1481 config ARM_ASM_UNIFIED
1485 bool "Use the ARM EABI to compile the kernel"
1487 This option allows for the kernel to be compiled using the latest
1488 ARM ABI (aka EABI). This is only useful if you are using a user
1489 space environment that is also compiled with EABI.
1491 Since there are major incompatibilities between the legacy ABI and
1492 EABI, especially with regard to structure member alignment, this
1493 option also changes the kernel syscall calling convention to
1494 disambiguate both ABIs and allow for backward compatibility support
1495 (selected with CONFIG_OABI_COMPAT).
1497 To use this you need GCC version 4.0.0 or later.
1500 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1501 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1504 This option preserves the old syscall interface along with the
1505 new (ARM EABI) one. It also provides a compatibility layer to
1506 intercept syscalls that have structure arguments which layout
1507 in memory differs between the legacy ABI and the new ARM EABI
1508 (only for non "thumb" binaries). This option adds a tiny
1509 overhead to all syscalls and produces a slightly larger kernel.
1510 If you know you'll be using only pure EABI user space then you
1511 can say N here. If this option is not selected and you attempt
1512 to execute a legacy ABI binary then the result will be
1513 UNPREDICTABLE (in fact it can be predicted that it won't work
1514 at all). If in doubt say Y.
1516 config ARCH_HAS_HOLES_MEMORYMODEL
1519 config ARCH_SPARSEMEM_ENABLE
1522 config ARCH_SPARSEMEM_DEFAULT
1523 def_bool ARCH_SPARSEMEM_ENABLE
1525 config ARCH_SELECT_MEMORY_MODEL
1526 def_bool ARCH_SPARSEMEM_ENABLE
1528 config HAVE_ARCH_PFN_VALID
1529 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1532 bool "High Memory Support"
1535 The address space of ARM processors is only 4 Gigabytes large
1536 and it has to accommodate user address space, kernel address
1537 space as well as some memory mapped IO. That means that, if you
1538 have a large amount of physical memory and/or IO, not all of the
1539 memory can be "permanently mapped" by the kernel. The physical
1540 memory that is not permanently mapped is called "high memory".
1542 Depending on the selected kernel/user memory split, minimum
1543 vmalloc space and actual amount of RAM, you may not need this
1544 option which should result in a slightly faster kernel.
1549 bool "Allocate 2nd-level pagetables from highmem"
1552 config HW_PERF_EVENTS
1553 bool "Enable hardware performance counter support for perf events"
1554 depends on PERF_EVENTS && CPU_HAS_PMU
1557 Enable hardware performance counter support for perf events. If
1558 disabled, perf events will use software events only.
1562 config FORCE_MAX_ZONEORDER
1563 int "Maximum zone order" if ARCH_SHMOBILE
1564 range 11 64 if ARCH_SHMOBILE
1565 default "9" if SA1111
1568 The kernel memory allocator divides physically contiguous memory
1569 blocks into "zones", where each zone is a power of two number of
1570 pages. This option selects the largest power of two that the kernel
1571 keeps in the memory allocator. If you need to allocate very large
1572 blocks of physically contiguous memory, then you may need to
1573 increase this value.
1575 This config option is actually maximum order plus one. For example,
1576 a value of 11 means that the largest free memory block is 2^10 pages.
1579 bool "Timer and CPU usage LEDs"
1580 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1581 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1582 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1583 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1584 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1585 ARCH_AT91 || ARCH_DAVINCI || \
1586 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1588 If you say Y here, the LEDs on your machine will be used
1589 to provide useful information about your current system status.
1591 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1592 be able to select which LEDs are active using the options below. If
1593 you are compiling a kernel for the EBSA-110 or the LART however, the
1594 red LED will simply flash regularly to indicate that the system is
1595 still functional. It is safe to say Y here if you have a CATS
1596 system, but the driver will do nothing.
1599 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1600 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1601 || MACH_OMAP_PERSEUS2
1603 depends on !GENERIC_CLOCKEVENTS
1604 default y if ARCH_EBSA110
1606 If you say Y here, one of the system LEDs (the green one on the
1607 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1608 will flash regularly to indicate that the system is still
1609 operational. This is mainly useful to kernel hackers who are
1610 debugging unstable kernels.
1612 The LART uses the same LED for both Timer LED and CPU usage LED
1613 functions. You may choose to use both, but the Timer LED function
1614 will overrule the CPU usage LED.
1617 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1619 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1620 || MACH_OMAP_PERSEUS2
1623 If you say Y here, the red LED will be used to give a good real
1624 time indication of CPU usage, by lighting whenever the idle task
1625 is not currently executing.
1627 The LART uses the same LED for both Timer LED and CPU usage LED
1628 functions. You may choose to use both, but the Timer LED function
1629 will overrule the CPU usage LED.
1631 config ALIGNMENT_TRAP
1633 depends on CPU_CP15_MMU
1634 default y if !ARCH_EBSA110
1635 select HAVE_PROC_CPU if PROC_FS
1637 ARM processors cannot fetch/store information which is not
1638 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1639 address divisible by 4. On 32-bit ARM processors, these non-aligned
1640 fetch/store instructions will be emulated in software if you say
1641 here, which has a severe performance impact. This is necessary for
1642 correct operation of some network protocols. With an IP-only
1643 configuration it is safe to say N, otherwise say Y.
1645 config UACCESS_WITH_MEMCPY
1646 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1647 depends on MMU && EXPERIMENTAL
1648 default y if CPU_FEROCEON
1650 Implement faster copy_to_user and clear_user methods for CPU
1651 cores where a 8-word STM instruction give significantly higher
1652 memory write throughput than a sequence of individual 32bit stores.
1654 A possible side effect is a slight increase in scheduling latency
1655 between threads sharing the same address space if they invoke
1656 such copy operations with large buffers.
1658 However, if the CPU data cache is using a write-allocate mode,
1659 this option is unlikely to provide any performance gain.
1663 prompt "Enable seccomp to safely compute untrusted bytecode"
1665 This kernel feature is useful for number crunching applications
1666 that may need to compute untrusted bytecode during their
1667 execution. By using pipes or other transports made available to
1668 the process as file descriptors supporting the read/write
1669 syscalls, it's possible to isolate those applications in
1670 their own address space using seccomp. Once seccomp is
1671 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1672 and the task is only allowed to execute a few safe syscalls
1673 defined by each seccomp mode.
1675 config CC_STACKPROTECTOR
1676 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1677 depends on EXPERIMENTAL
1679 This option turns on the -fstack-protector GCC feature. This
1680 feature puts, at the beginning of functions, a canary value on
1681 the stack just before the return address, and validates
1682 the value just before actually returning. Stack based buffer
1683 overflows (that need to overwrite this return address) now also
1684 overwrite the canary, which gets detected and the attack is then
1685 neutralized via a kernel panic.
1686 This feature requires gcc version 4.2 or above.
1688 config DEPRECATED_PARAM_STRUCT
1689 bool "Provide old way to pass kernel parameters"
1691 This was deprecated in 2001 and announced to live on for 5 years.
1692 Some old boot loaders still use this way.
1694 config ARM_FLUSH_CONSOLE_ON_RESTART
1695 bool "Force flush the console on restart"
1697 If the console is locked while the system is rebooted, the messages
1698 in the temporary logbuffer would not have propogated to all the
1699 console drivers. This option forces the console lock to be
1700 released if it failed to be acquired, which will cause all the
1701 pending messages to be flushed.
1708 bool "Flattened Device Tree support"
1710 select OF_EARLY_FLATTREE
1712 Include support for flattened device tree machine descriptions.
1714 # Compressed boot loader in ROM. Yes, we really want to ask about
1715 # TEXT and BSS so we preserve their values in the config files.
1716 config ZBOOT_ROM_TEXT
1717 hex "Compressed ROM boot loader base address"
1720 The physical address at which the ROM-able zImage is to be
1721 placed in the target. Platforms which normally make use of
1722 ROM-able zImage formats normally set this to a suitable
1723 value in their defconfig file.
1725 If ZBOOT_ROM is not enabled, this has no effect.
1727 config ZBOOT_ROM_BSS
1728 hex "Compressed ROM boot loader BSS address"
1731 The base address of an area of read/write memory in the target
1732 for the ROM-able zImage which must be available while the
1733 decompressor is running. It must be large enough to hold the
1734 entire decompressed kernel plus an additional 128 KiB.
1735 Platforms which normally make use of ROM-able zImage formats
1736 normally set this to a suitable value in their defconfig file.
1738 If ZBOOT_ROM is not enabled, this has no effect.
1741 bool "Compressed boot loader in ROM/flash"
1742 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1744 Say Y here if you intend to execute your compressed kernel image
1745 (zImage) directly from ROM or flash. If unsure, say N.
1747 config ZBOOT_ROM_MMCIF
1748 bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1749 depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1751 Say Y here to include experimental MMCIF loading code in the
1752 ROM-able zImage. With this enabled it is possible to write the
1753 the ROM-able zImage kernel image to an MMC card and boot the
1754 kernel straight from the reset vector. At reset the processor
1755 Mask ROM will load the first part of the the ROM-able zImage
1756 which in turn loads the rest the kernel image to RAM using the
1757 MMCIF hardware block.
1760 string "Default kernel command string"
1763 On some architectures (EBSA110 and CATS), there is currently no way
1764 for the boot loader to pass arguments to the kernel. For these
1765 architectures, you should supply some command-line options at build
1766 time by entering them here. As a minimum, you should specify the
1767 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1770 prompt "Kernel command line type" if CMDLINE != ""
1771 default CMDLINE_FROM_BOOTLOADER
1773 config CMDLINE_FROM_BOOTLOADER
1774 bool "Use bootloader kernel arguments if available"
1776 Uses the command-line options passed by the boot loader. If
1777 the boot loader doesn't provide any, the default kernel command
1778 string provided in CMDLINE will be used.
1780 config CMDLINE_EXTEND
1781 bool "Extend bootloader kernel arguments"
1783 The command-line arguments provided by the boot loader will be
1784 appended to the default kernel command string.
1786 config CMDLINE_FORCE
1787 bool "Always use the default kernel command string"
1789 Always use the default kernel command string, even if the boot
1790 loader passes other arguments to the kernel.
1791 This is useful if you cannot or don't want to change the
1792 command-line options your boot loader passes to the kernel.
1796 bool "Kernel Execute-In-Place from ROM"
1797 depends on !ZBOOT_ROM
1799 Execute-In-Place allows the kernel to run from non-volatile storage
1800 directly addressable by the CPU, such as NOR flash. This saves RAM
1801 space since the text section of the kernel is not loaded from flash
1802 to RAM. Read-write sections, such as the data section and stack,
1803 are still copied to RAM. The XIP kernel is not compressed since
1804 it has to run directly from flash, so it will take more space to
1805 store it. The flash address used to link the kernel object files,
1806 and for storing it, is configuration dependent. Therefore, if you
1807 say Y here, you must know the proper physical address where to
1808 store the kernel image depending on your own flash memory usage.
1810 Also note that the make target becomes "make xipImage" rather than
1811 "make zImage" or "make Image". The final kernel binary to put in
1812 ROM memory will be arch/arm/boot/xipImage.
1816 config XIP_PHYS_ADDR
1817 hex "XIP Kernel Physical Location"
1818 depends on XIP_KERNEL
1819 default "0x00080000"
1821 This is the physical address in your flash memory the kernel will
1822 be linked for and stored to. This address is dependent on your
1826 bool "Kexec system call (EXPERIMENTAL)"
1827 depends on EXPERIMENTAL
1829 kexec is a system call that implements the ability to shutdown your
1830 current kernel, and to start another kernel. It is like a reboot
1831 but it is independent of the system firmware. And like a reboot
1832 you can start any kernel with it, not just Linux.
1834 It is an ongoing process to be certain the hardware in a machine
1835 is properly shutdown, so do not be surprised if this code does not
1836 initially work for you. It may help to enable device hotplugging
1840 bool "Export atags in procfs"
1844 Should the atags used to boot the kernel be exported in an "atags"
1845 file in procfs. Useful with kexec.
1848 bool "Build kdump crash kernel (EXPERIMENTAL)"
1849 depends on EXPERIMENTAL
1851 Generate crash dump after being started by kexec. This should
1852 be normally only set in special crash dump kernels which are
1853 loaded in the main kernel with kexec-tools into a specially
1854 reserved region and then later executed after a crash by
1855 kdump/kexec. The crash dump kernel must be compiled to a
1856 memory address not used by the main kernel
1858 For more details see Documentation/kdump/kdump.txt
1860 config AUTO_ZRELADDR
1861 bool "Auto calculation of the decompressed kernel image address"
1862 depends on !ZBOOT_ROM && !ARCH_U300
1864 ZRELADDR is the physical address where the decompressed kernel
1865 image will be placed. If AUTO_ZRELADDR is selected, the address
1866 will be determined at run-time by masking the current IP with
1867 0xf8000000. This assumes the zImage being placed in the first 128MB
1868 from start of memory.
1872 menu "CPU Power Management"
1876 source "drivers/cpufreq/Kconfig"
1879 tristate "CPUfreq driver for i.MX CPUs"
1880 depends on ARCH_MXC && CPU_FREQ
1882 This enables the CPUfreq driver for i.MX CPUs.
1884 config CPU_FREQ_SA1100
1887 config CPU_FREQ_SA1110
1890 config CPU_FREQ_INTEGRATOR
1891 tristate "CPUfreq driver for ARM Integrator CPUs"
1892 depends on ARCH_INTEGRATOR && CPU_FREQ
1895 This enables the CPUfreq driver for ARM Integrator CPUs.
1897 For details, take a look at <file:Documentation/cpu-freq>.
1903 depends on CPU_FREQ && ARCH_PXA && PXA25x
1905 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1907 config CPU_FREQ_S3C64XX
1908 bool "CPUfreq support for Samsung S3C64XX CPUs"
1909 depends on CPU_FREQ && CPU_S3C6410
1914 Internal configuration node for common cpufreq on Samsung SoC
1916 config CPU_FREQ_S3C24XX
1917 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1918 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1921 This enables the CPUfreq driver for the Samsung S3C24XX family
1924 For details, take a look at <file:Documentation/cpu-freq>.
1928 config CPU_FREQ_S3C24XX_PLL
1929 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1930 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1932 Compile in support for changing the PLL frequency from the
1933 S3C24XX series CPUfreq driver. The PLL takes time to settle
1934 after a frequency change, so by default it is not enabled.
1936 This also means that the PLL tables for the selected CPU(s) will
1937 be built which may increase the size of the kernel image.
1939 config CPU_FREQ_S3C24XX_DEBUG
1940 bool "Debug CPUfreq Samsung driver core"
1941 depends on CPU_FREQ_S3C24XX
1943 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1945 config CPU_FREQ_S3C24XX_IODEBUG
1946 bool "Debug CPUfreq Samsung driver IO timing"
1947 depends on CPU_FREQ_S3C24XX
1949 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1951 config CPU_FREQ_S3C24XX_DEBUGFS
1952 bool "Export debugfs for CPUFreq"
1953 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1955 Export status information via debugfs.
1959 source "drivers/cpuidle/Kconfig"
1963 menu "Floating point emulation"
1965 comment "At least one emulation must be selected"
1968 bool "NWFPE math emulation"
1969 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1971 Say Y to include the NWFPE floating point emulator in the kernel.
1972 This is necessary to run most binaries. Linux does not currently
1973 support floating point hardware so you need to say Y here even if
1974 your machine has an FPA or floating point co-processor podule.
1976 You may say N here if you are going to load the Acorn FPEmulator
1977 early in the bootup.
1980 bool "Support extended precision"
1981 depends on FPE_NWFPE
1983 Say Y to include 80-bit support in the kernel floating-point
1984 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1985 Note that gcc does not generate 80-bit operations by default,
1986 so in most cases this option only enlarges the size of the
1987 floating point emulator without any good reason.
1989 You almost surely want to say N here.
1992 bool "FastFPE math emulation (EXPERIMENTAL)"
1993 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1995 Say Y here to include the FAST floating point emulator in the kernel.
1996 This is an experimental much faster emulator which now also has full
1997 precision for the mantissa. It does not support any exceptions.
1998 It is very simple, and approximately 3-6 times faster than NWFPE.
2000 It should be sufficient for most programs. It may be not suitable
2001 for scientific calculations, but you have to check this for yourself.
2002 If you do not feel you need a faster FP emulation you should better
2006 bool "VFP-format floating point maths"
2007 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2009 Say Y to include VFP support code in the kernel. This is needed
2010 if your hardware includes a VFP unit.
2012 Please see <file:Documentation/arm/VFP/release-notes.txt> for
2013 release notes and additional status information.
2015 Say N if your target does not have VFP hardware.
2023 bool "Advanced SIMD (NEON) Extension support"
2024 depends on VFPv3 && CPU_V7
2026 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2031 menu "Userspace binary formats"
2033 source "fs/Kconfig.binfmt"
2036 tristate "RISC OS personality"
2039 Say Y here to include the kernel code necessary if you want to run
2040 Acorn RISC OS/Arthur binaries under Linux. This code is still very
2041 experimental; if this sounds frightening, say N and sleep in peace.
2042 You can also say M here to compile this support as a module (which
2043 will be called arthur).
2047 menu "Power management options"
2049 source "kernel/power/Kconfig"
2051 config ARCH_SUSPEND_POSSIBLE
2052 depends on !ARCH_S5P64X0 && !ARCH_S5PC100
2053 depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2054 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
2059 source "net/Kconfig"
2061 source "drivers/Kconfig"
2065 source "arch/arm/Kconfig.debug"
2067 source "security/Kconfig"
2069 source "crypto/Kconfig"
2071 source "lib/Kconfig"