2 * Device Tree Source for AM33XX SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
44 compatible = "arm,cortex-a8";
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
60 voltage-tolerance = <2>; /* 2 percentage */
62 clocks = <&dpll_mpu_ck>;
65 clock-latency = <300000>; /* From omap-cpufreq driver */
70 compatible = "arm,cortex-a8-pmu";
75 * The soc node represents the soc top level view. It is used for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself.
79 compatible = "ti,omap-infra";
81 compatible = "ti,omap3-mpu";
86 am33xx_pinmux: pinmux@44e10800 {
87 compatible = "pinctrl-single";
88 reg = <0x44e10800 0x0238>;
91 pinctrl-single,register-width = <32>;
92 pinctrl-single,function-mask = <0x7f>;
96 * XXX: Use a flat representation of the AM33XX interconnect.
97 * The real AM33XX interconnect network is quite complex. Since
98 * it will not bring real advantage to represent that in DT
99 * for the moment, just use a fake OCP bus entry to represent
100 * the whole bus hierarchy.
103 compatible = "simple-bus";
104 #address-cells = <1>;
107 ti,hwmods = "l3_main";
109 prcm: prcm@44e00000 {
110 compatible = "ti,am3-prcm";
111 reg = <0x44e00000 0x4000>;
113 prcm_clocks: clocks {
114 #address-cells = <1>;
118 prcm_clockdomains: clockdomains {
122 scrm: scrm@44e10000 {
123 compatible = "ti,am3-scrm";
124 reg = <0x44e10000 0x2000>;
126 scrm_clocks: clocks {
127 #address-cells = <1>;
131 scrm_clockdomains: clockdomains {
135 intc: interrupt-controller@48200000 {
136 compatible = "ti,omap2-intc";
137 interrupt-controller;
138 #interrupt-cells = <1>;
139 ti,intc-size = <128>;
140 reg = <0x48200000 0x1000>;
143 edma: edma@49000000 {
144 compatible = "ti,edma3";
145 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
146 reg = <0x49000000 0x10000>,
148 interrupts = <12 13 14>;
152 gpio0: gpio@44e07000 {
153 compatible = "ti,omap4-gpio";
157 interrupt-controller;
158 #interrupt-cells = <2>;
159 reg = <0x44e07000 0x1000>;
163 gpio1: gpio@4804c000 {
164 compatible = "ti,omap4-gpio";
168 interrupt-controller;
169 #interrupt-cells = <2>;
170 reg = <0x4804c000 0x1000>;
174 gpio2: gpio@481ac000 {
175 compatible = "ti,omap4-gpio";
179 interrupt-controller;
180 #interrupt-cells = <2>;
181 reg = <0x481ac000 0x1000>;
185 gpio3: gpio@481ae000 {
186 compatible = "ti,omap4-gpio";
190 interrupt-controller;
191 #interrupt-cells = <2>;
192 reg = <0x481ae000 0x1000>;
196 uart0: serial@44e09000 {
197 compatible = "ti,omap3-uart";
199 clock-frequency = <48000000>;
200 reg = <0x44e09000 0x2000>;
205 uart1: serial@48022000 {
206 compatible = "ti,omap3-uart";
208 clock-frequency = <48000000>;
209 reg = <0x48022000 0x2000>;
214 uart2: serial@48024000 {
215 compatible = "ti,omap3-uart";
217 clock-frequency = <48000000>;
218 reg = <0x48024000 0x2000>;
223 uart3: serial@481a6000 {
224 compatible = "ti,omap3-uart";
226 clock-frequency = <48000000>;
227 reg = <0x481a6000 0x2000>;
232 uart4: serial@481a8000 {
233 compatible = "ti,omap3-uart";
235 clock-frequency = <48000000>;
236 reg = <0x481a8000 0x2000>;
241 uart5: serial@481aa000 {
242 compatible = "ti,omap3-uart";
244 clock-frequency = <48000000>;
245 reg = <0x481aa000 0x2000>;
251 compatible = "ti,omap4-i2c";
252 #address-cells = <1>;
255 reg = <0x44e0b000 0x1000>;
261 compatible = "ti,omap4-i2c";
262 #address-cells = <1>;
265 reg = <0x4802a000 0x1000>;
271 compatible = "ti,omap4-i2c";
272 #address-cells = <1>;
275 reg = <0x4819c000 0x1000>;
281 compatible = "ti,omap4-hsmmc";
284 ti,needs-special-reset;
285 ti,needs-special-hs-handling;
288 dma-names = "tx", "rx";
290 interrupt-parent = <&intc>;
291 reg = <0x48060000 0x1000>;
296 compatible = "ti,omap4-hsmmc";
298 ti,needs-special-reset;
301 dma-names = "tx", "rx";
303 interrupt-parent = <&intc>;
304 reg = <0x481d8000 0x1000>;
309 compatible = "ti,omap4-hsmmc";
311 ti,needs-special-reset;
313 interrupt-parent = <&intc>;
314 reg = <0x47810000 0x1000>;
318 hwspinlock: spinlock@480ca000 {
319 compatible = "ti,omap4-hwspinlock";
320 reg = <0x480ca000 0x1000>;
321 ti,hwmods = "spinlock";
326 compatible = "ti,omap3-wdt";
327 ti,hwmods = "wd_timer2";
328 reg = <0x44e35000 0x1000>;
332 dcan0: d_can@481cc000 {
333 compatible = "bosch,d_can";
334 ti,hwmods = "d_can0";
335 reg = <0x481cc000 0x2000
341 dcan1: d_can@481d0000 {
342 compatible = "bosch,d_can";
343 ti,hwmods = "d_can1";
344 reg = <0x481d0000 0x2000
350 timer1: timer@44e31000 {
351 compatible = "ti,am335x-timer-1ms";
352 reg = <0x44e31000 0x400>;
354 ti,hwmods = "timer1";
358 timer2: timer@48040000 {
359 compatible = "ti,am335x-timer";
360 reg = <0x48040000 0x400>;
362 ti,hwmods = "timer2";
365 timer3: timer@48042000 {
366 compatible = "ti,am335x-timer";
367 reg = <0x48042000 0x400>;
369 ti,hwmods = "timer3";
372 timer4: timer@48044000 {
373 compatible = "ti,am335x-timer";
374 reg = <0x48044000 0x400>;
376 ti,hwmods = "timer4";
380 timer5: timer@48046000 {
381 compatible = "ti,am335x-timer";
382 reg = <0x48046000 0x400>;
384 ti,hwmods = "timer5";
388 timer6: timer@48048000 {
389 compatible = "ti,am335x-timer";
390 reg = <0x48048000 0x400>;
392 ti,hwmods = "timer6";
396 timer7: timer@4804a000 {
397 compatible = "ti,am335x-timer";
398 reg = <0x4804a000 0x400>;
400 ti,hwmods = "timer7";
405 compatible = "ti,da830-rtc";
406 reg = <0x44e3e000 0x1000>;
413 compatible = "ti,omap4-mcspi";
414 #address-cells = <1>;
416 reg = <0x48030000 0x400>;
424 dma-names = "tx0", "rx0", "tx1", "rx1";
429 compatible = "ti,omap4-mcspi";
430 #address-cells = <1>;
432 reg = <0x481a0000 0x400>;
440 dma-names = "tx0", "rx0", "tx1", "rx1";
445 compatible = "ti,am33xx-usb";
446 reg = <0x47400000 0x1000>;
448 #address-cells = <1>;
450 ti,hwmods = "usb_otg_hs";
453 usb_ctrl_mod: control@44e10620 {
454 compatible = "ti,am335x-usb-ctrl-module";
455 reg = <0x44e10620 0x10
457 reg-names = "phy_ctrl", "wakeup";
461 usb0_phy: usb-phy@47401300 {
462 compatible = "ti,am335x-usb-phy";
463 reg = <0x47401300 0x100>;
466 ti,ctrl_mod = <&usb_ctrl_mod>;
470 compatible = "ti,musb-am33xx";
472 reg = <0x47401400 0x400
474 reg-names = "mc", "control";
477 interrupt-names = "mc";
479 mentor,multipoint = <1>;
480 mentor,num-eps = <16>;
481 mentor,ram-bits = <12>;
482 mentor,power = <500>;
485 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
486 &cppi41dma 2 0 &cppi41dma 3 0
487 &cppi41dma 4 0 &cppi41dma 5 0
488 &cppi41dma 6 0 &cppi41dma 7 0
489 &cppi41dma 8 0 &cppi41dma 9 0
490 &cppi41dma 10 0 &cppi41dma 11 0
491 &cppi41dma 12 0 &cppi41dma 13 0
492 &cppi41dma 14 0 &cppi41dma 0 1
493 &cppi41dma 1 1 &cppi41dma 2 1
494 &cppi41dma 3 1 &cppi41dma 4 1
495 &cppi41dma 5 1 &cppi41dma 6 1
496 &cppi41dma 7 1 &cppi41dma 8 1
497 &cppi41dma 9 1 &cppi41dma 10 1
498 &cppi41dma 11 1 &cppi41dma 12 1
499 &cppi41dma 13 1 &cppi41dma 14 1>;
501 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
502 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
504 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
505 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
509 usb1_phy: usb-phy@47401b00 {
510 compatible = "ti,am335x-usb-phy";
511 reg = <0x47401b00 0x100>;
514 ti,ctrl_mod = <&usb_ctrl_mod>;
518 compatible = "ti,musb-am33xx";
520 reg = <0x47401c00 0x400
522 reg-names = "mc", "control";
524 interrupt-names = "mc";
526 mentor,multipoint = <1>;
527 mentor,num-eps = <16>;
528 mentor,ram-bits = <12>;
529 mentor,power = <500>;
532 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
533 &cppi41dma 17 0 &cppi41dma 18 0
534 &cppi41dma 19 0 &cppi41dma 20 0
535 &cppi41dma 21 0 &cppi41dma 22 0
536 &cppi41dma 23 0 &cppi41dma 24 0
537 &cppi41dma 25 0 &cppi41dma 26 0
538 &cppi41dma 27 0 &cppi41dma 28 0
539 &cppi41dma 29 0 &cppi41dma 15 1
540 &cppi41dma 16 1 &cppi41dma 17 1
541 &cppi41dma 18 1 &cppi41dma 19 1
542 &cppi41dma 20 1 &cppi41dma 21 1
543 &cppi41dma 22 1 &cppi41dma 23 1
544 &cppi41dma 24 1 &cppi41dma 25 1
545 &cppi41dma 26 1 &cppi41dma 27 1
546 &cppi41dma 28 1 &cppi41dma 29 1>;
548 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
549 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
551 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
552 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
556 cppi41dma: dma-controller@47402000 {
557 compatible = "ti,am3359-cppi41";
558 reg = <0x47400000 0x1000
562 reg-names = "glue", "controller", "scheduler", "queuemgr";
564 interrupt-names = "glue";
566 #dma-channels = <30>;
567 #dma-requests = <256>;
572 epwmss0: epwmss@48300000 {
573 compatible = "ti,am33xx-pwmss";
574 reg = <0x48300000 0x10>;
575 ti,hwmods = "epwmss0";
576 #address-cells = <1>;
579 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
580 0x48300180 0x48300180 0x80 /* EQEP */
581 0x48300200 0x48300200 0x80>; /* EHRPWM */
583 ecap0: ecap@48300100 {
584 compatible = "ti,am33xx-ecap";
586 reg = <0x48300100 0x80>;
588 interrupt-names = "ecap0";
593 ehrpwm0: ehrpwm@48300200 {
594 compatible = "ti,am33xx-ehrpwm";
596 reg = <0x48300200 0x80>;
597 ti,hwmods = "ehrpwm0";
602 epwmss1: epwmss@48302000 {
603 compatible = "ti,am33xx-pwmss";
604 reg = <0x48302000 0x10>;
605 ti,hwmods = "epwmss1";
606 #address-cells = <1>;
609 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
610 0x48302180 0x48302180 0x80 /* EQEP */
611 0x48302200 0x48302200 0x80>; /* EHRPWM */
613 ecap1: ecap@48302100 {
614 compatible = "ti,am33xx-ecap";
616 reg = <0x48302100 0x80>;
618 interrupt-names = "ecap1";
623 ehrpwm1: ehrpwm@48302200 {
624 compatible = "ti,am33xx-ehrpwm";
626 reg = <0x48302200 0x80>;
627 ti,hwmods = "ehrpwm1";
632 epwmss2: epwmss@48304000 {
633 compatible = "ti,am33xx-pwmss";
634 reg = <0x48304000 0x10>;
635 ti,hwmods = "epwmss2";
636 #address-cells = <1>;
639 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
640 0x48304180 0x48304180 0x80 /* EQEP */
641 0x48304200 0x48304200 0x80>; /* EHRPWM */
643 ecap2: ecap@48304100 {
644 compatible = "ti,am33xx-ecap";
646 reg = <0x48304100 0x80>;
648 interrupt-names = "ecap2";
653 ehrpwm2: ehrpwm@48304200 {
654 compatible = "ti,am33xx-ehrpwm";
656 reg = <0x48304200 0x80>;
657 ti,hwmods = "ehrpwm2";
662 mac: ethernet@4a100000 {
663 compatible = "ti,cpsw";
664 ti,hwmods = "cpgmac0";
665 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
666 clock-names = "fck", "cpts";
667 cpdma_channels = <8>;
668 ale_entries = <1024>;
669 bd_ram_size = <0x2000>;
672 mac_control = <0x20>;
675 cpts_clock_mult = <0x80000000>;
676 cpts_clock_shift = <29>;
677 reg = <0x4a100000 0x800
679 #address-cells = <1>;
681 interrupt-parent = <&intc>;
688 interrupts = <40 41 42 43>;
692 davinci_mdio: mdio@4a101000 {
693 compatible = "ti,davinci_mdio";
694 #address-cells = <1>;
696 ti,hwmods = "davinci_mdio";
697 bus_freq = <1000000>;
698 reg = <0x4a101000 0x100>;
702 cpsw_emac0: slave@4a100200 {
703 /* Filled in by U-Boot */
704 mac-address = [ 00 00 00 00 00 00 ];
707 cpsw_emac1: slave@4a100300 {
708 /* Filled in by U-Boot */
709 mac-address = [ 00 00 00 00 00 00 ];
712 phy_sel: cpsw-phy-sel@44e10650 {
713 compatible = "ti,am3352-cpsw-phy-sel";
714 reg= <0x44e10650 0x4>;
715 reg-names = "gmii-sel";
719 ocmcram: ocmcram@40300000 {
720 compatible = "ti,am3352-ocmcram";
721 reg = <0x40300000 0x10000>;
722 ti,hwmods = "ocmcram";
725 wkup_m3: wkup_m3@44d00000 {
726 compatible = "ti,am3353-wkup-m3";
727 reg = <0x44d00000 0x4000 /* M3 UMEM */
728 0x44d80000 0x2000>; /* M3 DMEM */
729 ti,hwmods = "wkup_m3";
734 compatible = "ti,am3352-elm";
735 reg = <0x48080000 0x2000>;
741 lcdc: lcdc@4830e000 {
742 compatible = "ti,am33xx-tilcdc";
743 reg = <0x4830e000 0x1000>;
744 interrupt-parent = <&intc>;
750 tscadc: tscadc@44e0d000 {
751 compatible = "ti,am3359-tscadc";
752 reg = <0x44e0d000 0x1000>;
753 interrupt-parent = <&intc>;
755 ti,hwmods = "adc_tsc";
759 compatible = "ti,am3359-tsc";
762 #io-channel-cells = <1>;
763 compatible = "ti,am3359-adc";
767 gpmc: gpmc@50000000 {
768 compatible = "ti,am3352-gpmc";
771 reg = <0x50000000 0x2000>;
774 gpmc,num-waitpins = <2>;
775 #address-cells = <2>;
780 sham: sham@53100000 {
781 compatible = "ti,omap4-sham";
783 reg = <0x53100000 0x200>;
790 compatible = "ti,omap4-aes";
792 reg = <0x53500000 0xa0>;
796 dma-names = "tx", "rx";
799 mcasp0: mcasp@48038000 {
800 compatible = "ti,am33xx-mcasp-audio";
801 ti,hwmods = "mcasp0";
802 reg = <0x48038000 0x2000>,
803 <0x46000000 0x400000>;
804 reg-names = "mpu", "dat";
805 interrupts = <80>, <81>;
806 interrupt-names = "tx", "rx";
810 dma-names = "tx", "rx";
813 mcasp1: mcasp@4803C000 {
814 compatible = "ti,am33xx-mcasp-audio";
815 ti,hwmods = "mcasp1";
816 reg = <0x4803C000 0x2000>,
817 <0x46400000 0x400000>;
818 reg-names = "mpu", "dat";
819 interrupts = <82>, <83>;
820 interrupt-names = "tx", "rx";
824 dma-names = "tx", "rx";
828 compatible = "ti,omap4-rng";
830 reg = <0x48310000 0x2000>;
836 /include/ "am33xx-clocks.dtsi"