2 * Device Tree Source for AM4372 SoC
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&gic>;
26 ethernet0 = &cpsw_emac0;
27 ethernet1 = &cpsw_emac1;
34 compatible = "arm,cortex-a9";
38 clocks = <&dpll_mpu_ck>;
41 clock-latency = <300000>; /* From omap-cpufreq driver */
45 gic: interrupt-controller@48241000 {
46 compatible = "arm,cortex-a9-gic";
48 #interrupt-cells = <3>;
49 reg = <0x48241000 0x1000>,
53 l2-cache-controller@48242000 {
54 compatible = "arm,pl310-cache";
55 reg = <0x48242000 0x1000>;
60 am43xx_pinmux: pinmux@44e10800 {
61 compatible = "ti,am437-padconf", "pinctrl-single";
62 reg = <0x44e10800 0x31c>;
65 #interrupt-cells = <1>;
67 pinctrl-single,register-width = <32>;
68 pinctrl-single,function-mask = <0xffffffff>;
72 compatible = "ti,am4372-l3-noc", "simple-bus";
76 ti,hwmods = "l3_main";
77 reg = <0x44000000 0x400000
79 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
80 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
83 compatible = "ti,am4-prcm";
84 reg = <0x44df0000 0x11000>;
91 prcm_clockdomains: clockdomains {
96 compatible = "ti,am4-scrm";
97 reg = <0x44e10000 0x2000>;
100 #address-cells = <1>;
104 scrm_clockdomains: clockdomains {
108 edma: edma@49000000 {
109 compatible = "ti,edma3";
110 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
111 reg = <0x49000000 0x10000>,
113 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
114 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
115 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
119 uart0: serial@44e09000 {
120 compatible = "ti,am4372-uart","ti,omap2-uart";
121 reg = <0x44e09000 0x2000>;
122 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
126 uart1: serial@48022000 {
127 compatible = "ti,am4372-uart","ti,omap2-uart";
128 reg = <0x48022000 0x2000>;
129 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
134 uart2: serial@48024000 {
135 compatible = "ti,am4372-uart","ti,omap2-uart";
136 reg = <0x48024000 0x2000>;
137 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
142 uart3: serial@481a6000 {
143 compatible = "ti,am4372-uart","ti,omap2-uart";
144 reg = <0x481a6000 0x2000>;
145 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
150 uart4: serial@481a8000 {
151 compatible = "ti,am4372-uart","ti,omap2-uart";
152 reg = <0x481a8000 0x2000>;
153 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
158 uart5: serial@481aa000 {
159 compatible = "ti,am4372-uart","ti,omap2-uart";
160 reg = <0x481aa000 0x2000>;
161 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
166 mailbox: mailbox@480C8000 {
167 compatible = "ti,omap4-mailbox";
168 reg = <0x480C8000 0x200>;
169 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
170 ti,hwmods = "mailbox";
171 ti,mbox-num-users = <4>;
172 ti,mbox-num-fifos = <8>;
173 mbox_wkupm3: wkup_m3 {
174 ti,mbox-tx = <0 0 0>;
175 ti,mbox-rx = <0 0 3>;
179 timer1: timer@44e31000 {
180 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
181 reg = <0x44e31000 0x400>;
182 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
184 ti,hwmods = "timer1";
187 timer2: timer@48040000 {
188 compatible = "ti,am4372-timer","ti,am335x-timer";
189 reg = <0x48040000 0x400>;
190 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
191 ti,hwmods = "timer2";
194 timer3: timer@48042000 {
195 compatible = "ti,am4372-timer","ti,am335x-timer";
196 reg = <0x48042000 0x400>;
197 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
198 ti,hwmods = "timer3";
202 timer4: timer@48044000 {
203 compatible = "ti,am4372-timer","ti,am335x-timer";
204 reg = <0x48044000 0x400>;
205 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
207 ti,hwmods = "timer4";
211 timer5: timer@48046000 {
212 compatible = "ti,am4372-timer","ti,am335x-timer";
213 reg = <0x48046000 0x400>;
214 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
216 ti,hwmods = "timer5";
220 timer6: timer@48048000 {
221 compatible = "ti,am4372-timer","ti,am335x-timer";
222 reg = <0x48048000 0x400>;
223 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
225 ti,hwmods = "timer6";
229 timer7: timer@4804a000 {
230 compatible = "ti,am4372-timer","ti,am335x-timer";
231 reg = <0x4804a000 0x400>;
232 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
234 ti,hwmods = "timer7";
238 timer8: timer@481c1000 {
239 compatible = "ti,am4372-timer","ti,am335x-timer";
240 reg = <0x481c1000 0x400>;
241 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
242 ti,hwmods = "timer8";
246 timer9: timer@4833d000 {
247 compatible = "ti,am4372-timer","ti,am335x-timer";
248 reg = <0x4833d000 0x400>;
249 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
250 ti,hwmods = "timer9";
254 timer10: timer@4833f000 {
255 compatible = "ti,am4372-timer","ti,am335x-timer";
256 reg = <0x4833f000 0x400>;
257 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
258 ti,hwmods = "timer10";
262 timer11: timer@48341000 {
263 compatible = "ti,am4372-timer","ti,am335x-timer";
264 reg = <0x48341000 0x400>;
265 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
266 ti,hwmods = "timer11";
270 counter32k: counter@44e86000 {
271 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
272 reg = <0x44e86000 0x40>;
273 ti,hwmods = "counter_32k";
277 compatible = "ti,am4372-rtc","ti,da830-rtc";
278 reg = <0x44e3e000 0x1000>;
279 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
280 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
286 compatible = "ti,am4372-wdt","ti,omap3-wdt";
287 reg = <0x44e35000 0x1000>;
288 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
289 ti,hwmods = "wd_timer2";
292 gpio0: gpio@44e07000 {
293 compatible = "ti,am4372-gpio","ti,omap4-gpio";
294 reg = <0x44e07000 0x1000>;
295 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
298 interrupt-controller;
299 #interrupt-cells = <2>;
304 gpio1: gpio@4804c000 {
305 compatible = "ti,am4372-gpio","ti,omap4-gpio";
306 reg = <0x4804c000 0x1000>;
307 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
310 interrupt-controller;
311 #interrupt-cells = <2>;
316 gpio2: gpio@481ac000 {
317 compatible = "ti,am4372-gpio","ti,omap4-gpio";
318 reg = <0x481ac000 0x1000>;
319 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
322 interrupt-controller;
323 #interrupt-cells = <2>;
328 gpio3: gpio@481ae000 {
329 compatible = "ti,am4372-gpio","ti,omap4-gpio";
330 reg = <0x481ae000 0x1000>;
331 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
334 interrupt-controller;
335 #interrupt-cells = <2>;
340 gpio4: gpio@48320000 {
341 compatible = "ti,am4372-gpio","ti,omap4-gpio";
342 reg = <0x48320000 0x1000>;
343 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
346 interrupt-controller;
347 #interrupt-cells = <2>;
352 gpio5: gpio@48322000 {
353 compatible = "ti,am4372-gpio","ti,omap4-gpio";
354 reg = <0x48322000 0x1000>;
355 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
358 interrupt-controller;
359 #interrupt-cells = <2>;
364 hwspinlock: spinlock@480ca000 {
365 compatible = "ti,omap4-hwspinlock";
366 reg = <0x480ca000 0x1000>;
367 ti,hwmods = "spinlock";
372 compatible = "ti,am4372-i2c","ti,omap4-i2c";
373 reg = <0x44e0b000 0x1000>;
374 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
376 #address-cells = <1>;
382 compatible = "ti,am4372-i2c","ti,omap4-i2c";
383 reg = <0x4802a000 0x1000>;
384 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
386 #address-cells = <1>;
392 compatible = "ti,am4372-i2c","ti,omap4-i2c";
393 reg = <0x4819c000 0x1000>;
394 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
396 #address-cells = <1>;
402 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
403 reg = <0x48030000 0x400>;
404 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
406 #address-cells = <1>;
412 compatible = "ti,omap4-hsmmc";
413 reg = <0x48060000 0x1000>;
416 ti,needs-special-reset;
419 dma-names = "tx", "rx";
420 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
425 compatible = "ti,omap4-hsmmc";
426 reg = <0x481d8000 0x1000>;
428 ti,needs-special-reset;
431 dma-names = "tx", "rx";
432 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
437 compatible = "ti,omap4-hsmmc";
438 reg = <0x47810000 0x1000>;
440 ti,needs-special-reset;
441 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
446 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
447 reg = <0x481a0000 0x400>;
448 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
450 #address-cells = <1>;
456 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
457 reg = <0x481a2000 0x400>;
458 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
460 #address-cells = <1>;
466 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
467 reg = <0x481a4000 0x400>;
468 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
470 #address-cells = <1>;
476 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
477 reg = <0x48345000 0x400>;
478 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
480 #address-cells = <1>;
485 mac: ethernet@4a100000 {
486 compatible = "ti,am4372-cpsw","ti,cpsw";
487 reg = <0x4a100000 0x800
489 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
490 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
491 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
492 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
493 #address-cells = <1>;
495 ti,hwmods = "cpgmac0";
496 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
497 clock-names = "fck", "cpts";
499 cpdma_channels = <8>;
500 ale_entries = <1024>;
501 bd_ram_size = <0x2000>;
504 mac_control = <0x20>;
507 cpts_clock_mult = <0x80000000>;
508 cpts_clock_shift = <29>;
511 davinci_mdio: mdio@4a101000 {
512 compatible = "ti,am4372-mdio","ti,davinci_mdio";
513 reg = <0x4a101000 0x100>;
514 #address-cells = <1>;
516 ti,hwmods = "davinci_mdio";
517 bus_freq = <1000000>;
521 cpsw_emac0: slave@4a100200 {
522 /* Filled in by U-Boot */
523 mac-address = [ 00 00 00 00 00 00 ];
526 cpsw_emac1: slave@4a100300 {
527 /* Filled in by U-Boot */
528 mac-address = [ 00 00 00 00 00 00 ];
531 phy_sel: cpsw-phy-sel@44e10650 {
532 compatible = "ti,am43xx-cpsw-phy-sel";
533 reg= <0x44e10650 0x4>;
534 reg-names = "gmii-sel";
538 epwmss0: epwmss@48300000 {
539 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
540 reg = <0x48300000 0x10>;
541 #address-cells = <1>;
544 ti,hwmods = "epwmss0";
547 ecap0: ecap@48300100 {
548 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
550 reg = <0x48300100 0x80>;
555 ehrpwm0: ehrpwm@48300200 {
556 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
558 reg = <0x48300200 0x80>;
559 ti,hwmods = "ehrpwm0";
564 epwmss1: epwmss@48302000 {
565 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
566 reg = <0x48302000 0x10>;
567 #address-cells = <1>;
570 ti,hwmods = "epwmss1";
573 ecap1: ecap@48302100 {
574 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
576 reg = <0x48302100 0x80>;
581 ehrpwm1: ehrpwm@48302200 {
582 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
584 reg = <0x48302200 0x80>;
585 ti,hwmods = "ehrpwm1";
590 epwmss2: epwmss@48304000 {
591 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
592 reg = <0x48304000 0x10>;
593 #address-cells = <1>;
596 ti,hwmods = "epwmss2";
599 ecap2: ecap@48304100 {
600 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
602 reg = <0x48304100 0x80>;
607 ehrpwm2: ehrpwm@48304200 {
608 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
610 reg = <0x48304200 0x80>;
611 ti,hwmods = "ehrpwm2";
616 epwmss3: epwmss@48306000 {
617 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
618 reg = <0x48306000 0x10>;
619 #address-cells = <1>;
622 ti,hwmods = "epwmss3";
625 ehrpwm3: ehrpwm@48306200 {
626 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
628 reg = <0x48306200 0x80>;
629 ti,hwmods = "ehrpwm3";
634 epwmss4: epwmss@48308000 {
635 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
636 reg = <0x48308000 0x10>;
637 #address-cells = <1>;
640 ti,hwmods = "epwmss4";
643 ehrpwm4: ehrpwm@48308200 {
644 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
646 reg = <0x48308200 0x80>;
647 ti,hwmods = "ehrpwm4";
652 epwmss5: epwmss@4830a000 {
653 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
654 reg = <0x4830a000 0x10>;
655 #address-cells = <1>;
658 ti,hwmods = "epwmss5";
661 ehrpwm5: ehrpwm@4830a200 {
662 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
664 reg = <0x4830a200 0x80>;
665 ti,hwmods = "ehrpwm5";
670 sham: sham@53100000 {
671 compatible = "ti,omap5-sham";
673 reg = <0x53100000 0x300>;
676 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
680 compatible = "ti,omap4-aes";
682 reg = <0x53501000 0xa0>;
683 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
686 dma-names = "tx", "rx";
690 compatible = "ti,omap4-des";
692 reg = <0x53701000 0xa0>;
693 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
696 dma-names = "tx", "rx";
699 mcasp0: mcasp@48038000 {
700 compatible = "ti,am33xx-mcasp-audio";
701 ti,hwmods = "mcasp0";
702 reg = <0x48038000 0x2000>,
703 <0x46000000 0x400000>;
704 reg-names = "mpu", "dat";
705 interrupts = <80>, <81>;
706 interrupt-names = "tx", "rx";
710 dma-names = "tx", "rx";
713 mcasp1: mcasp@4803C000 {
714 compatible = "ti,am33xx-mcasp-audio";
715 ti,hwmods = "mcasp1";
716 reg = <0x4803C000 0x2000>,
717 <0x46400000 0x400000>;
718 reg-names = "mpu", "dat";
719 interrupts = <82>, <83>;
720 interrupt-names = "tx", "rx";
724 dma-names = "tx", "rx";
728 compatible = "ti,am3352-elm";
729 reg = <0x48080000 0x2000>;
730 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
732 clocks = <&l4ls_gclk>;
737 gpmc: gpmc@50000000 {
738 compatible = "ti,am3352-gpmc";
740 clocks = <&l3s_gclk>;
742 reg = <0x50000000 0x2000>;
743 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
745 gpmc,num-waitpins = <2>;
746 #address-cells = <2>;
751 am43xx_control_usb2phy1: control-phy@44e10620 {
752 compatible = "ti,control-phy-usb2-am437";
753 reg = <0x44e10620 0x4>;
757 am43xx_control_usb2phy2: control-phy@0x44e10628 {
758 compatible = "ti,control-phy-usb2-am437";
759 reg = <0x44e10628 0x4>;
763 ocp2scp0: ocp2scp@483a8000 {
764 compatible = "ti,omap-ocp2scp";
765 #address-cells = <1>;
768 ti,hwmods = "ocp2scp0";
770 usb2_phy1: phy@483a8000 {
771 compatible = "ti,am437x-usb2";
772 reg = <0x483a8000 0x8000>;
773 ctrl-module = <&am43xx_control_usb2phy1>;
774 clocks = <&usb_phy0_always_on_clk32k>,
775 <&usb_otg_ss0_refclk960m>;
776 clock-names = "wkupclk", "refclk";
782 ocp2scp1: ocp2scp@483e8000 {
783 compatible = "ti,omap-ocp2scp";
784 #address-cells = <1>;
787 ti,hwmods = "ocp2scp1";
789 usb2_phy2: phy@483e8000 {
790 compatible = "ti,am437x-usb2";
791 reg = <0x483e8000 0x8000>;
792 ctrl-module = <&am43xx_control_usb2phy2>;
793 clocks = <&usb_phy1_always_on_clk32k>,
794 <&usb_otg_ss1_refclk960m>;
795 clock-names = "wkupclk", "refclk";
801 dwc3_1: omap_dwc3@48380000 {
802 compatible = "ti,am437x-dwc3";
803 ti,hwmods = "usb_otg_ss0";
804 reg = <0x48380000 0x10000>;
805 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
806 #address-cells = <1>;
812 compatible = "synopsys,dwc3";
813 reg = <0x48390000 0x10000>;
814 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
816 phy-names = "usb2-phy";
817 maximum-speed = "high-speed";
823 dwc3_2: omap_dwc3@483c0000 {
824 compatible = "ti,am437x-dwc3";
825 ti,hwmods = "usb_otg_ss1";
826 reg = <0x483c0000 0x10000>;
827 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
828 #address-cells = <1>;
834 compatible = "synopsys,dwc3";
835 reg = <0x483d0000 0x10000>;
836 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
838 phy-names = "usb2-phy";
839 maximum-speed = "high-speed";
845 qspi: qspi@47900000 {
846 compatible = "ti,am4372-qspi";
847 reg = <0x47900000 0x100>;
848 #address-cells = <1>;
851 interrupts = <0 138 0x4>;
857 compatible = "ti,am43xx-hdq";
858 reg = <0x48347000 0x1000>;
859 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
860 clocks = <&func_12m_clk>;
867 compatible = "ti,omap3-dss";
868 reg = <0x4832a000 0x200>;
870 ti,hwmods = "dss_core";
871 clocks = <&disp_clk>;
873 #address-cells = <1>;
877 dispc: dispc@4832a400 {
878 compatible = "ti,omap3-dispc";
879 reg = <0x4832a400 0x400>;
880 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
881 ti,hwmods = "dss_dispc";
882 clocks = <&disp_clk>;
886 rfbi: rfbi@4832a800 {
887 compatible = "ti,omap3-rfbi";
888 reg = <0x4832a800 0x100>;
889 ti,hwmods = "dss_rfbi";
890 clocks = <&disp_clk>;
895 ocmcram: ocmcram@40300000 {
896 compatible = "mmio-sram";
897 reg = <0x40300000 0x40000>; /* 256k */
902 /include/ "am43xx-clocks.dtsi"