arch/arm/boot/dts/am4372.dtsi

   1 /*
   2  * Device Tree Source for AM4372 SoC
   3  *
   4  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/interrupt-controller/arm-gic.h>
  12
  13 #include "skeleton.dtsi"
  14
  15 / {
  16         compatible = "ti,am4372", "ti,am43";
  17         interrupt-parent = <&gic>;
  18
  19
  20         aliases {
  21                 serial0 = &uart0;
  22                 ethernet0 = &cpsw_emac0;
  23                 ethernet1 = &cpsw_emac1;
  24         };
  25
  26         cpus {
  27                 #address-cells = <1>;
  28                 #size-cells = <0>;
  29                 cpu@0 {
  30                         compatible = "arm,cortex-a9";
  31                         device_type = "cpu";
  32                         reg = <0>;
  33                 };
  34         };
  35
  36         gic: interrupt-controller@48241000 {
  37                 compatible = "arm,cortex-a9-gic";
  38                 interrupt-controller;
  39                 #interrupt-cells = <3>;
  40                 reg = <0x48241000 0x1000>,
  41                       <0x48240100 0x0100>;
  42         };
  43
  44         l2-cache-controller@48242000 {
  45                 compatible = "arm,pl310-cache";
  46                 reg = <0x48242000 0x1000>;
  47                 cache-unified;
  48                 cache-level = <2>;
  49         };
  50
  51         am43xx_pinmux: pinmux@44e10800 {
  52                 compatible = "pinctrl-single";
  53                 reg = <0x44e10800 0x31c>;
  54                 #address-cells = <1>;
  55                 #size-cells = <0>;
  56                 pinctrl-single,register-width = <32>;
  57                 pinctrl-single,function-mask = <0xffffffff>;
  58         };
  59
  60         ocp {
  61                 compatible = "simple-bus";
  62                 #address-cells = <1>;
  63                 #size-cells = <1>;
  64                 ranges;
  65                 ti,hwmods = "l3_main";
  66
  67                 edma: edma@49000000 {
  68                         compatible = "ti,edma3";
  69                         ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
  70                         reg =   <0x49000000 0x10000>,
  71                                 <0x44e10f90 0x10>;
  72                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
  73                                         <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
  74                                         <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
  75                         #dma-cells = <1>;
  76                         dma-channels = <64>;
  77                         ti,edma-regions = <4>;
  78                         ti,edma-slots = <256>;
  79                 };
  80
  81                 uart0: serial@44e09000 {
  82                         compatible = "ti,am4372-uart","ti,omap2-uart";
  83                         reg = <0x44e09000 0x2000>;
  84                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
  85                         ti,hwmods = "uart1";
  86                 };
  87
  88                 uart1: serial@48022000 {
  89                         compatible = "ti,am4372-uart","ti,omap2-uart";
  90                         reg = <0x48022000 0x2000>;
  91                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
  92                         ti,hwmods = "uart2";
  93                         status = "disabled";
  94                 };
  95
  96                 uart2: serial@48024000 {
  97                         compatible = "ti,am4372-uart","ti,omap2-uart";
  98                         reg = <0x48024000 0x2000>;
  99                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 100                         ti,hwmods = "uart3";
 101                         status = "disabled";
 102                 };
 103
 104                 uart3: serial@481a6000 {
 105                         compatible = "ti,am4372-uart","ti,omap2-uart";
 106                         reg = <0x481a6000 0x2000>;
 107                         interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 108                         ti,hwmods = "uart4";
 109                         status = "disabled";
 110                 };
 111
 112                 uart4: serial@481a8000 {
 113                         compatible = "ti,am4372-uart","ti,omap2-uart";
 114                         reg = <0x481a8000 0x2000>;
 115                         interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 116                         ti,hwmods = "uart5";
 117                         status = "disabled";
 118                 };
 119
 120                 uart5: serial@481aa000 {
 121                         compatible = "ti,am4372-uart","ti,omap2-uart";
 122                         reg = <0x481aa000 0x2000>;
 123                         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 124                         ti,hwmods = "uart6";
 125                         status = "disabled";
 126                 };
 127
 128                 mailbox: mailbox@480C8000 {
 129                         compatible = "ti,omap4-mailbox";
 130                         reg = <0x480C8000 0x200>;
 131                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 132                         ti,hwmods = "mailbox";
 133                         ti,mbox-num-users = <4>;
 134                         ti,mbox-num-fifos = <8>;
 135                         ti,mbox-names = "wkup_m3";
 136                         ti,mbox-data = <0 0 0 0>;
 137                         status = "disabled";
 138                 };
 139
 140                 timer1: timer@44e31000 {
 141                         compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
 142                         reg = <0x44e31000 0x400>;
 143                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 144                         ti,timer-alwon;
 145                         ti,hwmods = "timer1";
 146                 };
 147
 148                 timer2: timer@48040000  {
 149                         compatible = "ti,am4372-timer","ti,am335x-timer";
 150                         reg = <0x48040000  0x400>;
 151                         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 152                         ti,hwmods = "timer2";
 153                 };
 154
 155                 timer3: timer@48042000 {
 156                         compatible = "ti,am4372-timer","ti,am335x-timer";
 157                         reg = <0x48042000 0x400>;
 158                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 159                         ti,hwmods = "timer3";
 160                         status = "disabled";
 161                 };
 162
 163                 timer4: timer@48044000 {
 164                         compatible = "ti,am4372-timer","ti,am335x-timer";
 165                         reg = <0x48044000 0x400>;
 166                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
 167                         ti,timer-pwm;
 168                         ti,hwmods = "timer4";
 169                         status = "disabled";
 170                 };
 171
 172                 timer5: timer@48046000 {
 173                         compatible = "ti,am4372-timer","ti,am335x-timer";
 174                         reg = <0x48046000 0x400>;
 175                         interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 176                         ti,timer-pwm;
 177                         ti,hwmods = "timer5";
 178                         status = "disabled";
 179                 };
 180
 181                 timer6: timer@48048000 {
 182                         compatible = "ti,am4372-timer","ti,am335x-timer";
 183                         reg = <0x48048000 0x400>;
 184                         interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
 185                         ti,timer-pwm;
 186                         ti,hwmods = "timer6";
 187                         status = "disabled";
 188                 };
 189
 190                 timer7: timer@4804a000 {
 191                         compatible = "ti,am4372-timer","ti,am335x-timer";
 192                         reg = <0x4804a000 0x400>;
 193                         interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
 194                         ti,timer-pwm;
 195                         ti,hwmods = "timer7";
 196                         status = "disabled";
 197                 };
 198
 199                 timer8: timer@481c1000 {
 200                         compatible = "ti,am4372-timer","ti,am335x-timer";
 201                         reg = <0x481c1000 0x400>;
 202                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
 203                         ti,hwmods = "timer8";
 204                         status = "disabled";
 205                 };
 206
 207                 timer9: timer@4833d000 {
 208                         compatible = "ti,am4372-timer","ti,am335x-timer";
 209                         reg = <0x4833d000 0x400>;
 210                         interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
 211                         ti,hwmods = "timer9";
 212                         status = "disabled";
 213                 };
 214
 215                 timer10: timer@4833f000 {
 216                         compatible = "ti,am4372-timer","ti,am335x-timer";
 217                         reg = <0x4833f000 0x400>;
 218                         interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 219                         ti,hwmods = "timer10";
 220                         status = "disabled";
 221                 };
 222
 223                 timer11: timer@48341000 {
 224                         compatible = "ti,am4372-timer","ti,am335x-timer";
 225                         reg = <0x48341000 0x400>;
 226                         interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
 227                         ti,hwmods = "timer11";
 228                         status = "disabled";
 229                 };
 230
 231                 counter32k: counter@44e86000 {
 232                         compatible = "ti,am4372-counter32k","ti,omap-counter32k";
 233                         reg = <0x44e86000 0x40>;
 234                         ti,hwmods = "counter_32k";
 235                 };
 236
 237                 rtc@44e3e000 {
 238                         compatible = "ti,am4372-rtc","ti,da830-rtc";
 239                         reg = <0x44e3e000 0x1000>;
 240                         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
 241                                       GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 242                         ti,hwmods = "rtc";
 243                         status = "disabled";
 244                 };
 245
 246                 wdt@44e35000 {
 247                         compatible = "ti,am4372-wdt","ti,omap3-wdt";
 248                         reg = <0x44e35000 0x1000>;
 249                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 250                         ti,hwmods = "wd_timer2";
 251                 };
 252
 253                 gpio0: gpio@44e07000 {
 254                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 255                         reg = <0x44e07000 0x1000>;
 256                         interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
 257                         gpio-controller;
 258                         #gpio-cells = <2>;
 259                         interrupt-controller;
 260                         #interrupt-cells = <2>;
 261                         ti,hwmods = "gpio1";
 262                         status = "disabled";
 263                 };
 264
 265                 gpio1: gpio@4804c000 {
 266                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 267                         reg = <0x4804c000 0x1000>;
 268                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
 269                         gpio-controller;
 270                         #gpio-cells = <2>;
 271                         interrupt-controller;
 272                         #interrupt-cells = <2>;
 273                         ti,hwmods = "gpio2";
 274                         status = "disabled";
 275                 };
 276
 277                 gpio2: gpio@481ac000 {
 278                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 279                         reg = <0x481ac000 0x1000>;
 280                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 281                         gpio-controller;
 282                         #gpio-cells = <2>;
 283                         interrupt-controller;
 284                         #interrupt-cells = <2>;
 285                         ti,hwmods = "gpio3";
 286                         status = "disabled";
 287                 };
 288
 289                 gpio3: gpio@481ae000 {
 290                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 291                         reg = <0x481ae000 0x1000>;
 292                         interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 293                         gpio-controller;
 294                         #gpio-cells = <2>;
 295                         interrupt-controller;
 296                         #interrupt-cells = <2>;
 297                         ti,hwmods = "gpio4";
 298                         status = "disabled";
 299                 };
 300
 301                 gpio4: gpio@48320000 {
 302                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 303                         reg = <0x48320000 0x1000>;
 304                         interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
 305                         gpio-controller;
 306                         #gpio-cells = <2>;
 307                         interrupt-controller;
 308                         #interrupt-cells = <2>;
 309                         ti,hwmods = "gpio5";
 310                         status = "disabled";
 311                 };
 312
 313                 gpio5: gpio@48322000 {
 314                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 315                         reg = <0x48322000 0x1000>;
 316                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 317                         gpio-controller;
 318                         #gpio-cells = <2>;
 319                         interrupt-controller;
 320                         #interrupt-cells = <2>;
 321                         ti,hwmods = "gpio6";
 322                         status = "disabled";
 323                 };
 324
 325                 i2c0: i2c@44e0b000 {
 326                         compatible = "ti,am4372-i2c","ti,omap4-i2c";
 327                         reg = <0x44e0b000 0x1000>;
 328                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 329                         ti,hwmods = "i2c1";
 330                         #address-cells = <1>;
 331                         #size-cells = <0>;
 332                         status = "disabled";
 333                 };
 334
 335                 i2c1: i2c@4802a000 {
 336                         compatible = "ti,am4372-i2c","ti,omap4-i2c";
 337                         reg = <0x4802a000 0x1000>;
 338                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 339                         ti,hwmods = "i2c2";
 340                         #address-cells = <1>;
 341                         #size-cells = <0>;
 342                         status = "disabled";
 343                 };
 344
 345                 i2c2: i2c@4819c000 {
 346                         compatible = "ti,am4372-i2c","ti,omap4-i2c";
 347                         reg = <0x4819c000 0x1000>;
 348                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 349                         ti,hwmods = "i2c3";
 350                         #address-cells = <1>;
 351                         #size-cells = <0>;
 352                         status = "disabled";
 353                 };
 354
 355                 spi0: spi@48030000 {
 356                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 357                         reg = <0x48030000 0x400>;
 358                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 359                         ti,hwmods = "spi0";
 360                         #address-cells = <1>;
 361                         #size-cells = <0>;
 362                         status = "disabled";
 363                 };
 364
 365                 mmc1: mmc@48060000 {
 366                         compatible = "ti,omap4-hsmmc";
 367                         reg = <0x48060000 0x1000>;
 368                         ti,hwmods = "mmc1";
 369                         ti,dual-volt;
 370                         ti,needs-special-reset;
 371                         dmas = <&edma 24
 372                                 &edma 25>;
 373                         dma-names = "tx", "rx";
 374                         interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
 375                         status = "disabled";
 376                 };
 377
 378                 mmc2: mmc@481d8000 {
 379                         compatible = "ti,omap4-hsmmc";
 380                         reg = <0x481d8000 0x1000>;
 381                         ti,hwmods = "mmc2";
 382                         ti,needs-special-reset;
 383                         dmas = <&edma 2
 384                                 &edma 3>;
 385                         dma-names = "tx", "rx";
 386                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 387                         status = "disabled";
 388                 };
 389
 390                 mmc3: mmc@47810000 {
 391                         compatible = "ti,omap4-hsmmc";
 392                         reg = <0x47810000 0x1000>;
 393                         ti,hwmods = "mmc3";
 394                         ti,needs-special-reset;
 395                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 396                         status = "disabled";
 397                 };
 398
 399                 spi1: spi@481a0000 {
 400                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 401                         reg = <0x481a0000 0x400>;
 402                         interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
 403                         ti,hwmods = "spi1";
 404                         #address-cells = <1>;
 405                         #size-cells = <0>;
 406                         status = "disabled";
 407                 };
 408
 409                 spi2: spi@481a2000 {
 410                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 411                         reg = <0x481a2000 0x400>;
 412                         interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 413                         ti,hwmods = "spi2";
 414                         #address-cells = <1>;
 415                         #size-cells = <0>;
 416                         status = "disabled";
 417                 };
 418
 419                 spi3: spi@481a4000 {
 420                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 421                         reg = <0x481a4000 0x400>;
 422                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
 423                         ti,hwmods = "spi3";
 424                         #address-cells = <1>;
 425                         #size-cells = <0>;
 426                         status = "disabled";
 427                 };
 428
 429                 spi4: spi@48345000 {
 430                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 431                         reg = <0x48345000 0x400>;
 432                         interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
 433                         ti,hwmods = "spi4";
 434                         #address-cells = <1>;
 435                         #size-cells = <0>;
 436                         status = "disabled";
 437                 };
 438
 439                 mac: ethernet@4a100000 {
 440                         compatible = "ti,am4372-cpsw","ti,cpsw";
 441                         reg = <0x4a100000 0x800
 442                                0x4a101200 0x100>;
 443                         interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
 444                                       GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
 445                                       GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
 446                                       GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 447                         #address-cells = <1>;
 448                         #size-cells = <1>;
 449                         ti,hwmods = "cpgmac0";
 450                         status = "disabled";
 451                         cpdma_channels = <8>;
 452                         ale_entries = <1024>;
 453                         bd_ram_size = <0x2000>;
 454                         no_bd_ram = <0>;
 455                         rx_descs = <64>;
 456                         mac_control = <0x20>;
 457                         slaves = <2>;
 458                         active_slave = <0>;
 459                         cpts_clock_mult = <0x80000000>;
 460                         cpts_clock_shift = <29>;
 461                         ranges;
 462
 463                         davinci_mdio: mdio@4a101000 {
 464                                 compatible = "ti,am4372-mdio","ti,davinci_mdio";
 465                                 reg = <0x4a101000 0x100>;
 466                                 #address-cells = <1>;
 467                                 #size-cells = <0>;
 468                                 ti,hwmods = "davinci_mdio";
 469                                 bus_freq = <1000000>;
 470                                 status = "disabled";
 471                         };
 472
 473                         cpsw_emac0: slave@4a100200 {
 474                                 /* Filled in by U-Boot */
 475                                 mac-address = [ 00 00 00 00 00 00 ];
 476                         };
 477
 478                         cpsw_emac1: slave@4a100300 {
 479                                 /* Filled in by U-Boot */
 480                                 mac-address = [ 00 00 00 00 00 00 ];
 481                         };
 482                 };
 483
 484                 epwmss0: epwmss@48300000 {
 485                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 486                         reg = <0x48300000 0x10>;
 487                         #address-cells = <1>;
 488                         #size-cells = <1>;
 489                         ranges;
 490                         ti,hwmods = "epwmss0";
 491                         status = "disabled";
 492
 493                         ecap0: ecap@48300100 {
 494                                 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
 495                                 reg = <0x48300100 0x80>;
 496                                 ti,hwmods = "ecap0";
 497                                 status = "disabled";
 498                         };
 499
 500                         ehrpwm0: ehrpwm@48300200 {
 501                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 502                                 reg = <0x48300200 0x80>;
 503                                 ti,hwmods = "ehrpwm0";
 504                                 status = "disabled";
 505                         };
 506                 };
 507
 508                 epwmss1: epwmss@48302000 {
 509                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 510                         reg = <0x48302000 0x10>;
 511                         #address-cells = <1>;
 512                         #size-cells = <1>;
 513                         ranges;
 514                         ti,hwmods = "epwmss1";
 515                         status = "disabled";
 516
 517                         ecap1: ecap@48302100 {
 518                                 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
 519                                 reg = <0x48302100 0x80>;
 520                                 ti,hwmods = "ecap1";
 521                                 status = "disabled";
 522                         };
 523
 524                         ehrpwm1: ehrpwm@48302200 {
 525                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 526                                 reg = <0x48302200 0x80>;
 527                                 ti,hwmods = "ehrpwm1";
 528                                 status = "disabled";
 529                         };
 530                 };
 531
 532                 epwmss2: epwmss@48304000 {
 533                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 534                         reg = <0x48304000 0x10>;
 535                         #address-cells = <1>;
 536                         #size-cells = <1>;
 537                         ranges;
 538                         ti,hwmods = "epwmss2";
 539                         status = "disabled";
 540
 541                         ecap2: ecap@48304100 {
 542                                 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
 543                                 reg = <0x48304100 0x80>;
 544                                 ti,hwmods = "ecap2";
 545                                 status = "disabled";
 546                         };
 547
 548                         ehrpwm2: ehrpwm@48304200 {
 549                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 550                                 reg = <0x48304200 0x80>;
 551                                 ti,hwmods = "ehrpwm2";
 552                                 status = "disabled";
 553                         };
 554                 };
 555
 556                 epwmss3: epwmss@48306000 {
 557                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 558                         reg = <0x48306000 0x10>;
 559                         #address-cells = <1>;
 560                         #size-cells = <1>;
 561                         ranges;
 562                         ti,hwmods = "epwmss3";
 563                         status = "disabled";
 564
 565                         ehrpwm3: ehrpwm@48306200 {
 566                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 567                                 reg = <0x48306200 0x80>;
 568                                 ti,hwmods = "ehrpwm3";
 569                                 status = "disabled";
 570                         };
 571                 };
 572
 573                 epwmss4: epwmss@48308000 {
 574                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 575                         reg = <0x48308000 0x10>;
 576                         #address-cells = <1>;
 577                         #size-cells = <1>;
 578                         ranges;
 579                         ti,hwmods = "epwmss4";
 580                         status = "disabled";
 581
 582                         ehrpwm4: ehrpwm@48308200 {
 583                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 584                                 reg = <0x48308200 0x80>;
 585                                 ti,hwmods = "ehrpwm4";
 586                                 status = "disabled";
 587                         };
 588                 };
 589
 590                 epwmss5: epwmss@4830a000 {
 591                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 592                         reg = <0x4830a000 0x10>;
 593                         #address-cells = <1>;
 594                         #size-cells = <1>;
 595                         ranges;
 596                         ti,hwmods = "epwmss5";
 597                         status = "disabled";
 598
 599                         ehrpwm5: ehrpwm@4830a200 {
 600                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 601                                 reg = <0x4830a200 0x80>;
 602                                 ti,hwmods = "ehrpwm5";
 603                                 status = "disabled";
 604                         };
 605                 };
 606
 607                 sham: sham@53100000 {
 608                         compatible = "ti,omap5-sham";
 609                         ti,hwmods = "sham";
 610                         reg = <0x53100000 0x300>;
 611                         dmas = <&edma 36>;
 612                         dma-names = "rx";
 613                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 614                 };
 615
 616                 aes: aes@53501000 {
 617                         compatible = "ti,omap4-aes";
 618                         ti,hwmods = "aes";
 619                         reg = <0x53501000 0xa0>;
 620                         interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 621                         dmas = <&edma 6
 622                                 &edma 5>;
 623                         dma-names = "tx", "rx";
 624                 };
 625
 626                 des: des@53701000 {
 627                         compatible = "ti,omap4-des";
 628                         ti,hwmods = "des";
 629                         reg = <0x53701000 0xa0>;
 630                         interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 631                         dmas = <&edma 34
 632                                 &edma 33>;
 633                         dma-names = "tx", "rx";
 634                 };
 635
 636                 mcasp0: mcasp@48038000 {
 637                         compatible = "ti,am33xx-mcasp-audio";
 638                         ti,hwmods = "mcasp0";
 639                         reg = <0x48038000 0x2000>,
 640                               <0x46000000 0x400000>;
 641                         reg-names = "mpu", "dat";
 642                         interrupts = <80>, <81>;
 643                         interrupts-names = "tx", "rx";
 644                         status = "disabled";
 645                         dmas = <&edma 8>,
 646                                <&edma 9>;
 647                         dma-names = "tx", "rx";
 648                 };
 649
 650                 mcasp1: mcasp@4803C000 {
 651                         compatible = "ti,am33xx-mcasp-audio";
 652                         ti,hwmods = "mcasp1";
 653                         reg = <0x4803C000 0x2000>,
 654                               <0x46400000 0x400000>;
 655                         reg-names = "mpu", "dat";
 656                         interrupts = <82>, <83>;
 657                         interrupts-names = "tx", "rx";
 658                         status = "disabled";
 659                         dmas = <&edma 10>,
 660                                <&edma 11>;
 661                         dma-names = "tx", "rx";
 662                 };
 663         };
 664 };