ARM: at91: dt: at91sam9260: split rts and cts pinctrl not
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / armada-370.dtsi
1 /*
2  * Device Tree Include file for Marvell Armada 370 family SoC
3  *
4  * Copyright (C) 2012 Marvell
5  *
6  * Lior Amsalem <alior@marvell.com>
7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9  *
10  * This file is licensed under the terms of the GNU General Public
11  * License version 2.  This program is licensed "as is" without any
12  * warranty of any kind, whether express or implied.
13  *
14  * Contains definitions specific to the Armada 370 SoC that are not
15  * common to all Armada SoCs.
16  */
17
18 /include/ "armada-370-xp.dtsi"
19
20 / {
21         model = "Marvell Armada 370 family SoC";
22         compatible = "marvell,armada370", "marvell,armada-370-xp";
23
24         aliases {
25                 gpio0 = &gpio0;
26                 gpio1 = &gpio1;
27                 gpio2 = &gpio2;
28         };
29
30         mpic: interrupt-controller@d0020000 {
31               reg = <0xd0020a00 0x1d0>,
32                     <0xd0021870 0x58>;
33         };
34
35         soc {
36                 system-controller@d0018200 {
37                                 compatible = "marvell,armada-370-xp-system-controller";
38                                 reg = <0xd0018200 0x100>;
39                 };
40
41                 pinctrl {
42                         compatible = "marvell,mv88f6710-pinctrl";
43                         reg = <0xd0018000 0x38>;
44                 };
45
46                 gpio0: gpio@d0018100 {
47                         compatible = "marvell,orion-gpio";
48                         reg = <0xd0018100 0x40>;
49                         ngpios = <32>;
50                         gpio-controller;
51                         #gpio-cells = <2>;
52                         interrupt-controller;
53                         #interrupts-cells = <2>;
54                         interrupts = <82>, <83>, <84>, <85>;
55                 };
56
57                 gpio1: gpio@d0018140 {
58                         compatible = "marvell,orion-gpio";
59                         reg = <0xd0018140 0x40>;
60                         ngpios = <32>;
61                         gpio-controller;
62                         #gpio-cells = <2>;
63                         interrupt-controller;
64                         #interrupts-cells = <2>;
65                         interrupts = <87>, <88>, <89>, <90>;
66                 };
67
68                 gpio2: gpio@d0018180 {
69                         compatible = "marvell,orion-gpio";
70                         reg = <0xd0018180 0x40>;
71                         ngpios = <2>;
72                         gpio-controller;
73                         #gpio-cells = <2>;
74                         interrupt-controller;
75                         #interrupts-cells = <2>;
76                         interrupts = <91>;
77                 };
78         };
79 };