2 * Device Tree file for Marvell Armada 375 evaluation board
5 * Copyright (C) 2014 Marvell
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
16 #include <dt-bindings/gpio/gpio.h>
17 #include "armada-375.dtsi"
20 model = "Marvell Armada 375 Development Board";
21 compatible = "marvell,a375-db", "marvell,armada375";
24 bootargs = "console=ttyS0,115200 earlyprintk";
28 device_type = "memory";
29 reg = <0x00000000 0x40000000>; /* 1 GB */
33 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
34 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
38 pinctrl-0 = <&spi0_pins>;
39 pinctrl-names = "default";
41 * SPI conflicts with NAND, so we disable it
42 * here, and select NAND as the enabled device
50 compatible = "n25q128a13";
51 reg = <0>; /* Chip select 0 */
52 spi-max-frequency = <108000000>;
58 clock-frequency = <100000>;
59 pinctrl-0 = <&i2c0_pins>;
60 pinctrl-names = "default";
65 clock-frequency = <100000>;
66 pinctrl-0 = <&i2c1_pins>;
67 pinctrl-names = "default";
75 sdio_st_pins: sdio-st-pins {
76 marvell,pins = "mpp44", "mpp45";
77 marvell,function = "gpio";
87 pinctrl-0 = <&nand_pins>;
88 pinctrl-names = "default";
91 marvell,nand-keep-config;
92 marvell,nand-enable-arbiter;
94 nand-ecc-strength = <4>;
95 nand-ecc-step-size = <512>;
103 reg = <0x800000 0x800000>;
106 label = "Filesystem";
107 reg = <0x1000000 0x3f000000>;
120 pinctrl-0 = <&sdio_pins &sdio_st_pins>;
121 pinctrl-names = "default";
123 cd-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
124 wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
128 phy0: ethernet-phy@0 {
132 phy3: ethernet-phy@3 {
143 phy-mode = "rgmii-id";
157 * The two PCIe units are accessible through
158 * standard PCIe slots on the board.