Merge tag 'uapi-20121219' into for-linus
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / armada-xp-mv78460.dtsi
1 /*
2  * Device Tree Include file for Marvell Armada XP family SoC
3  *
4  * Copyright (C) 2012 Marvell
5  *
6  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7  *
8  * This file is licensed under the terms of the GNU General Public
9  * License version 2.  This program is licensed "as is" without any
10  * warranty of any kind, whether express or implied.
11  *
12  * Contains definitions specific to the Armada XP MV78460 SoC that are not
13  * common to all Armada XP SoCs.
14  */
15
16 /include/ "armada-xp.dtsi"
17
18 / {
19         model = "Marvell Armada XP MV78460 SoC";
20         compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
21
22         aliases {
23                 gpio0 = &gpio0;
24                 gpio1 = &gpio1;
25                 gpio2 = &gpio2;
26         };
27
28
29         cpus {
30             #address-cells = <1>;
31             #size-cells = <0>;
32
33             cpu@0 {
34                 device_type = "cpu";
35                 compatible = "marvell,sheeva-v7";
36                 reg = <0>;
37                 clocks = <&cpuclk 0>;
38             };
39
40             cpu@1 {
41                 device_type = "cpu";
42                 compatible = "marvell,sheeva-v7";
43                 reg = <1>;
44                 clocks = <&cpuclk 1>;
45             };
46
47             cpu@2 {
48                 device_type = "cpu";
49                 compatible = "marvell,sheeva-v7";
50                 reg = <2>;
51                 clocks = <&cpuclk 2>;
52             };
53
54             cpu@3 {
55                 device_type = "cpu";
56                 compatible = "marvell,sheeva-v7";
57                 reg = <3>;
58                 clocks = <&cpuclk 3>;
59             };
60         };
61
62         soc {
63                 pinctrl {
64                         compatible = "marvell,mv78460-pinctrl";
65                         reg = <0xd0018000 0x38>;
66                 };
67
68                 gpio0: gpio@d0018100 {
69                         compatible = "marvell,orion-gpio";
70                         reg = <0xd0018100 0x40>;
71                         ngpios = <32>;
72                         gpio-controller;
73                         #gpio-cells = <2>;
74                         interrupt-controller;
75                         #interrupts-cells = <2>;
76                         interrupts = <82>, <83>, <84>, <85>;
77                 };
78
79                 gpio1: gpio@d0018140 {
80                         compatible = "marvell,orion-gpio";
81                         reg = <0xd0018140 0x40>;
82                         ngpios = <32>;
83                         gpio-controller;
84                         #gpio-cells = <2>;
85                         interrupt-controller;
86                         #interrupts-cells = <2>;
87                         interrupts = <87>, <88>, <89>, <90>;
88                 };
89
90                 gpio2: gpio@d0018180 {
91                         compatible = "marvell,orion-gpio";
92                         reg = <0xd0018180 0x40>;
93                         ngpios = <3>;
94                         gpio-controller;
95                         #gpio-cells = <2>;
96                         interrupt-controller;
97                         #interrupts-cells = <2>;
98                         interrupts = <91>;
99                 };
100
101                 ethernet@d0034000 {
102                                 compatible = "marvell,armada-370-neta";
103                                 reg = <0xd0034000 0x2500>;
104                                 interrupts = <14>;
105                                 clocks = <&gateclk 1>;
106                                 status = "disabled";
107                 };
108         };
109  };