arch/arm/boot/dts/armada-xp.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada XP family SoC
   3  *
   4  * Copyright (C) 2012 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  * Ben Dooks <ben.dooks@codethink.co.uk>
  10  *
  11  * This file is licensed under the terms of the GNU General Public
  12  * License version 2.  This program is licensed "as is" without any
  13  * warranty of any kind, whether express or implied.
  14  *
  15  * Contains definitions specific to the Armada XP SoC that are not
  16  * common to all Armada SoCs.
  17  */
  18
  19 /include/ "armada-370-xp.dtsi"
  20
  21 / {
  22         model = "Marvell Armada XP family SoC";
  23         compatible = "marvell,armadaxp", "marvell,armada-370-xp";
  24
  25         mpic: interrupt-controller@d0020000 {
  26               reg = <0xd0020a00 0x1d0>,
  27                     <0xd0021870 0x58>;
  28         };
  29
  30         armada-370-xp-pmsu@d0022000 {
  31                 compatible = "marvell,armada-370-xp-pmsu";
  32                 reg = <0xd0022100 0x430>,
  33                       <0xd0020800 0x20>;
  34         };
  35
  36         soc {
  37                 serial@d0012200 {
  38                                 compatible = "ns16550";
  39                                 reg = <0xd0012200 0x100>;
  40                                 reg-shift = <2>;
  41                                 interrupts = <43>;
  42                                 status = "disabled";
  43                 };
  44                 serial@d0012300 {
  45                                 compatible = "ns16550";
  46                                 reg = <0xd0012300 0x100>;
  47                                 reg-shift = <2>;
  48                                 interrupts = <44>;
  49                                 status = "disabled";
  50                 };
  51
  52                 timer@d0020300 {
  53                                 marvell,timer-25Mhz;
  54                 };
  55
  56                 coreclk: mvebu-sar@d0018230 {
  57                         compatible = "marvell,armada-xp-core-clock";
  58                         reg = <0xd0018230 0x08>;
  59                         #clock-cells = <1>;
  60                 };
  61
  62                 cpuclk: clock-complex@d0018700 {
  63                         #clock-cells = <1>;
  64                         compatible = "marvell,armada-xp-cpu-clock";
  65                         reg = <0xd0018700 0xA0>;
  66                         clocks = <&coreclk 1>;
  67                 };
  68
  69                 gateclk: clock-gating-control@d0018220 {
  70                         compatible = "marvell,armada-xp-gating-clock";
  71                         reg = <0xd0018220 0x4>;
  72                         clocks = <&coreclk 0>;
  73                         #clock-cells = <1>;
  74                 };
  75
  76                 system-controller@d0018200 {
  77                                 compatible = "marvell,armada-370-xp-system-controller";
  78                                 reg = <0xd0018200 0x500>;
  79                 };
  80         };
  81 };