arch/arm/boot/dts/armada-xp.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada XP family SoC
   3  *
   4  * Copyright (C) 2012 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  * Ben Dooks <ben.dooks@codethink.co.uk>
  10  *
  11  * This file is licensed under the terms of the GNU General Public
  12  * License version 2.  This program is licensed "as is" without any
  13  * warranty of any kind, whether express or implied.
  14  *
  15  * Contains definitions specific to the Armada XP SoC that are not
  16  * common to all Armada SoCs.
  17  */
  18
  19 /include/ "armada-370-xp.dtsi"
  20
  21 / {
  22         model = "Marvell Armada XP family SoC";
  23         compatible = "marvell,armadaxp", "marvell,armada-370-xp";
  24
  25         mpic: interrupt-controller@d0020000 {
  26               reg = <0xd0020a00 0x1d0>,
  27                     <0xd0021870 0x58>;
  28         };
  29
  30         soc {
  31                 serial@d0012200 {
  32                                 compatible = "ns16550";
  33                                 reg = <0xd0012200 0x100>;
  34                                 reg-shift = <2>;
  35                                 interrupts = <43>;
  36                                 status = "disabled";
  37                 };
  38                 serial@d0012300 {
  39                                 compatible = "ns16550";
  40                                 reg = <0xd0012300 0x100>;
  41                                 reg-shift = <2>;
  42                                 interrupts = <44>;
  43                                 status = "disabled";
  44                 };
  45
  46                 timer@d0020300 {
  47                                 marvell,timer-25Mhz;
  48                 };
  49
  50                 coreclk: mvebu-sar@d0018230 {
  51                         compatible = "marvell,armada-xp-core-clock";
  52                         reg = <0xd0018230 0x08>;
  53                         #clock-cells = <1>;
  54                 };
  55
  56                 cpuclk: clock-complex@d0018700 {
  57                         #clock-cells = <1>;
  58                         compatible = "marvell,armada-xp-cpu-clock";
  59                         reg = <0xd0018700 0xA0>;
  60                         clocks = <&coreclk 1>;
  61                 };
  62
  63                 gateclk: clock-gating-control@d0018220 {
  64                         compatible = "marvell,armada-xp-gating-clock";
  65                         reg = <0xd0018220 0x4>;
  66                         clocks = <&coreclk 0>;
  67                         #clock-cells = <1>;
  68                 };
  69
  70                 system-controller@d0018200 {
  71                                 compatible = "marvell,armada-370-xp-system-controller";
  72                                 reg = <0xd0018200 0x500>;
  73                 };
  74
  75                 ethernet@d0030000 {
  76                                 compatible = "marvell,armada-370-neta";
  77                                 reg = <0xd0030000 0x2500>;
  78                                 interrupts = <12>;
  79                                 clocks = <&gateclk 2>;
  80                                 status = "disabled";
  81                 };
  82
  83                 ethernet@d0034000 {
  84                                 compatible = "marvell,armada-370-neta";
  85                                 reg = <0xd0034000 0x2500>;
  86                                 interrupts = <14>;
  87                                 clocks = <&gateclk 1>;
  88                                 status = "disabled";
  89                 };
  90
  91                 xor@d0060900 {
  92                         compatible = "marvell,orion-xor";
  93                         reg = <0xd0060900 0x100
  94                                0xd0060b00 0x100>;
  95                         clocks = <&gateclk 22>;
  96                         status = "okay";
  97
  98                         xor10 {
  99                                 interrupts = <51>;
 100                                 dmacap,memcpy;
 101                                 dmacap,xor;
 102                         };
 103                         xor11 {
 104                                 interrupts = <52>;
 105                                 dmacap,memcpy;
 106                                 dmacap,xor;
 107                                 dmacap,memset;
 108                         };
 109                 };
 110
 111                 xor@d00f0900 {
 112                         compatible = "marvell,orion-xor";
 113                         reg = <0xd00F0900 0x100
 114                                0xd00F0B00 0x100>;
 115                         clocks = <&gateclk 28>;
 116                         status = "okay";
 117
 118                         xor00 {
 119                                 interrupts = <94>;
 120                                 dmacap,memcpy;
 121                                 dmacap,xor;
 122                         };
 123                         xor01 {
 124                                 interrupts = <95>;
 125                                 dmacap,memcpy;
 126                                 dmacap,xor;
 127                                 dmacap,memset;
 128                         };
 129                 };
 130         };
 131 };