2 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2012 Joachim Eastwood <manabian@gmail.com>
8 * Based on at91sam9260.dtsi
10 * Licensed under GPLv2 or later.
13 #include "skeleton.dtsi"
14 #include <dt-bindings/pinctrl/at91.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/at91.h>
20 model = "Atmel AT91RM9200 family SoC";
21 compatible = "atmel,at91rm9200";
22 interrupt-parent = <&aic>;
46 compatible = "arm,arm920t";
52 reg = <0x20000000 0x04000000>;
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
59 clock-frequency = <0>;
62 main_xtal: main_xtal {
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
70 compatible = "simple-bus";
76 compatible = "simple-bus";
81 aic: interrupt-controller@fffff000 {
82 #interrupt-cells = <3>;
83 compatible = "atmel,at91rm9200-aic";
85 reg = <0xfffff000 0x200>;
86 atmel,external-irqs = <25 26 27 28 29 30 31>;
89 ramc0: ramc@ffffff00 {
90 compatible = "atmel,at91rm9200-sdramc";
91 reg = <0xffffff00 0x100>;
95 compatible = "atmel,at91rm9200-pmc";
96 reg = <0xfffffc00 0x100>;
97 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
101 #interrupt-cells = <1>;
104 compatible = "atmel,at91rm9200-clk-main-osc";
106 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
107 clocks = <&main_xtal>;
111 compatible = "atmel,at91rm9200-clk-main";
113 clocks = <&main_osc>;
117 compatible = "atmel,at91rm9200-clk-pll";
119 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
122 atmel,clk-input-range = <1000000 32000000>;
123 #atmel,pll-clk-output-range-cells = <3>;
124 atmel,pll-clk-output-ranges = <80000000 160000000 0>,
125 <150000000 180000000 2>;
129 compatible = "atmel,at91rm9200-clk-pll";
131 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
134 atmel,clk-input-range = <1000000 32000000>;
135 #atmel,pll-clk-output-range-cells = <3>;
136 atmel,pll-clk-output-ranges = <80000000 160000000 0>,
137 <150000000 180000000 2>;
141 compatible = "atmel,at91rm9200-clk-master";
143 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
144 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
145 atmel,clk-output-range = <0 80000000>;
146 atmel,clk-divisors = <1 2 3 4>;
150 compatible = "atmel,at91rm9200-clk-usb";
152 atmel,clk-divisors = <1 2>;
157 compatible = "atmel,at91rm9200-clk-programmable";
158 #address-cells = <1>;
160 interrupt-parent = <&pmc>;
161 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
166 interrupts = <AT91_PMC_PCKRDY(0)>;
172 interrupts = <AT91_PMC_PCKRDY(1)>;
178 interrupts = <AT91_PMC_PCKRDY(2)>;
184 interrupts = <AT91_PMC_PCKRDY(3)>;
189 compatible = "atmel,at91rm9200-clk-system";
190 #address-cells = <1>;
231 compatible = "atmel,at91rm9200-clk-peripheral";
232 #address-cells = <1>;
256 usart0_clk: usart0_clk {
261 usart1_clk: usart1_clk {
266 usart2_clk: usart2_clk {
271 usart3_clk: usart3_clk {
346 macb0_clk: macb0_clk {
354 compatible = "atmel,at91rm9200-st";
355 reg = <0xfffffd00 0x100>;
356 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
359 tcb0: timer@fffa0000 {
360 compatible = "atmel,at91rm9200-tcb";
361 reg = <0xfffa0000 0x100>;
362 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
363 18 IRQ_TYPE_LEVEL_HIGH 0
364 19 IRQ_TYPE_LEVEL_HIGH 0>;
365 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
366 clock-names = "t0_clk", "t1_clk", "t2_clk";
369 tcb1: timer@fffa4000 {
370 compatible = "atmel,at91rm9200-tcb";
371 reg = <0xfffa4000 0x100>;
372 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
373 21 IRQ_TYPE_LEVEL_HIGH 0
374 22 IRQ_TYPE_LEVEL_HIGH 0>;
375 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>;
376 clock-names = "t0_clk", "t1_clk", "t2_clk";
380 compatible = "atmel,at91rm9200-i2c";
381 reg = <0xfffb8000 0x4000>;
382 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
383 pinctrl-names = "default";
384 pinctrl-0 = <&pinctrl_twi>;
385 clocks = <&twi0_clk>;
386 #address-cells = <1>;
392 compatible = "atmel,hsmci";
393 reg = <0xfffb4000 0x4000>;
394 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
395 clocks = <&mci0_clk>;
396 clock-names = "mci_clk";
397 #address-cells = <1>;
399 pinctrl-names = "default";
404 compatible = "atmel,at91rm9200-ssc";
405 reg = <0xfffd0000 0x4000>;
406 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
407 pinctrl-names = "default";
408 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
409 clocks = <&ssc0_clk>;
410 clock-names = "pclk";
415 compatible = "atmel,at91rm9200-ssc";
416 reg = <0xfffd4000 0x4000>;
417 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
418 pinctrl-names = "default";
419 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
420 clocks = <&ssc1_clk>;
421 clock-names = "pclk";
426 compatible = "atmel,at91rm9200-ssc";
427 reg = <0xfffd8000 0x4000>;
428 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
429 pinctrl-names = "default";
430 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
431 clocks = <&ssc2_clk>;
432 clock-names = "pclk";
436 macb0: ethernet@fffbc000 {
437 compatible = "cdns,at91rm9200-emac", "cdns,emac";
438 reg = <0xfffbc000 0x4000>;
439 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
441 pinctrl-names = "default";
442 pinctrl-0 = <&pinctrl_macb_rmii>;
443 clocks = <&macb0_clk>;
444 clock-names = "ether_clk";
449 #address-cells = <1>;
451 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
452 ranges = <0xfffff400 0xfffff400 0x800>;
456 0xffffffff 0xffffffff /* pioA */
457 0xffffffff 0x083fffff /* pioB */
458 0xffff3fff 0x00000000 /* pioC */
459 0x03ff87ff 0x0fffff80 /* pioD */
462 /* shared pinctrl settings */
464 pinctrl_dbgu: dbgu-0 {
466 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A */
467 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA31 periph with pullup */
472 pinctrl_uart0: uart0-0 {
474 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
475 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */
478 pinctrl_uart0_cts: uart0_cts-0 {
480 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
483 pinctrl_uart0_rts: uart0_rts-0 {
485 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
490 pinctrl_uart1: uart1-0 {
492 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB20 periph A with pullup */
493 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
496 pinctrl_uart1_rts: uart1_rts-0 {
498 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
501 pinctrl_uart1_cts: uart1_cts-0 {
503 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
506 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
508 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
509 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
512 pinctrl_uart1_dcd: uart1_dcd-0 {
514 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
517 pinctrl_uart1_ri: uart1_ri-0 {
519 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
524 pinctrl_uart2: uart2-0 {
526 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA22 periph A */
527 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
530 pinctrl_uart2_rts: uart2_rts-0 {
532 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
535 pinctrl_uart2_cts: uart2_cts-0 {
537 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
542 pinctrl_uart3: uart3-0 {
544 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
545 AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA6 periph B */
548 pinctrl_uart3_rts: uart3_rts-0 {
550 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
553 pinctrl_uart3_cts: uart3_cts-0 {
555 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
560 pinctrl_nand: nand-0 {
562 <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */
563 AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */
568 pinctrl_macb_rmii: macb_rmii-0 {
570 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */
571 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */
572 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
573 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
574 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
575 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
576 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
577 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
578 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
579 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
582 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
584 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */
585 AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */
586 AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */
587 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */
588 AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */
589 AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */
590 AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */
591 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
596 pinctrl_mmc0_clk: mmc0_clk-0 {
598 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
601 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
603 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
604 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */
607 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
609 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
610 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
611 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */
614 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
616 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
617 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */
620 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
622 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */
623 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
624 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */
629 pinctrl_ssc0_tx: ssc0_tx-0 {
631 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
632 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
633 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */
636 pinctrl_ssc0_rx: ssc0_rx-0 {
638 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
639 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
640 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
645 pinctrl_ssc1_tx: ssc1_tx-0 {
647 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
648 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
649 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
652 pinctrl_ssc1_rx: ssc1_rx-0 {
654 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
655 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
656 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
661 pinctrl_ssc2_tx: ssc2_tx-0 {
663 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
664 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
665 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
668 pinctrl_ssc2_rx: ssc2_rx-0 {
670 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
671 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
672 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
679 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */
680 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */
683 pinctrl_twi_gpio: twi_gpio-0 {
685 <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
686 AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */
691 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
692 atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
695 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
696 atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
699 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
700 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
703 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
704 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
707 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
708 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
711 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
712 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
715 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
716 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
719 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
720 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
723 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
724 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
729 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
730 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
733 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
734 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
737 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
738 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
741 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
742 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
745 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
746 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
749 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
750 atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
753 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
754 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
757 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
758 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
761 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
762 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
767 pinctrl_spi0: spi0-0 {
769 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
770 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
771 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
775 pioA: gpio@fffff400 {
776 compatible = "atmel,at91rm9200-gpio";
777 reg = <0xfffff400 0x200>;
778 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
781 interrupt-controller;
782 #interrupt-cells = <2>;
783 clocks = <&pioA_clk>;
786 pioB: gpio@fffff600 {
787 compatible = "atmel,at91rm9200-gpio";
788 reg = <0xfffff600 0x200>;
789 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
792 interrupt-controller;
793 #interrupt-cells = <2>;
794 clocks = <&pioB_clk>;
797 pioC: gpio@fffff800 {
798 compatible = "atmel,at91rm9200-gpio";
799 reg = <0xfffff800 0x200>;
800 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
803 interrupt-controller;
804 #interrupt-cells = <2>;
805 clocks = <&pioC_clk>;
808 pioD: gpio@fffffa00 {
809 compatible = "atmel,at91rm9200-gpio";
810 reg = <0xfffffa00 0x200>;
811 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
814 interrupt-controller;
815 #interrupt-cells = <2>;
816 clocks = <&pioD_clk>;
820 dbgu: serial@fffff200 {
821 compatible = "atmel,at91rm9200-usart";
822 reg = <0xfffff200 0x200>;
823 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
824 pinctrl-names = "default";
825 pinctrl-0 = <&pinctrl_dbgu>;
827 clock-names = "usart";
831 usart0: serial@fffc0000 {
832 compatible = "atmel,at91rm9200-usart";
833 reg = <0xfffc0000 0x200>;
834 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
837 pinctrl-names = "default";
838 pinctrl-0 = <&pinctrl_uart0>;
839 clocks = <&usart0_clk>;
840 clock-names = "usart";
844 usart1: serial@fffc4000 {
845 compatible = "atmel,at91rm9200-usart";
846 reg = <0xfffc4000 0x200>;
847 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
850 pinctrl-names = "default";
851 pinctrl-0 = <&pinctrl_uart1>;
852 clocks = <&usart1_clk>;
853 clock-names = "usart";
857 usart2: serial@fffc8000 {
858 compatible = "atmel,at91rm9200-usart";
859 reg = <0xfffc8000 0x200>;
860 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
863 pinctrl-names = "default";
864 pinctrl-0 = <&pinctrl_uart2>;
865 clocks = <&usart2_clk>;
866 clock-names = "usart";
870 usart3: serial@fffcc000 {
871 compatible = "atmel,at91rm9200-usart";
872 reg = <0xfffcc000 0x200>;
873 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
876 pinctrl-names = "default";
877 pinctrl-0 = <&pinctrl_uart3>;
878 clocks = <&usart3_clk>;
879 clock-names = "usart";
883 usb1: gadget@fffb0000 {
884 compatible = "atmel,at91rm9200-udc";
885 reg = <0xfffb0000 0x4000>;
886 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
887 clocks = <&udc_clk>, <&udpck>;
888 clock-names = "pclk", "hclk";
893 #address-cells = <1>;
895 compatible = "atmel,at91rm9200-spi";
896 reg = <0xfffe0000 0x200>;
897 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
898 pinctrl-names = "default";
899 pinctrl-0 = <&pinctrl_spi0>;
900 clocks = <&spi0_clk>;
901 clock-names = "spi_clk";
906 nand0: nand@40000000 {
907 compatible = "atmel,at91rm9200-nand";
908 #address-cells = <1>;
910 reg = <0x40000000 0x10000000>;
911 atmel,nand-addr-offset = <21>;
912 atmel,nand-cmd-offset = <22>;
913 pinctrl-names = "default";
914 pinctrl-0 = <&pinctrl_nand>;
915 nand-ecc-mode = "soft";
916 gpios = <&pioC 2 GPIO_ACTIVE_HIGH
918 &pioB 1 GPIO_ACTIVE_HIGH
923 usb0: ohci@00300000 {
924 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
925 reg = <0x00300000 0x100000>;
926 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
927 clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
928 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
934 compatible = "i2c-gpio";
935 gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
936 &pioA 26 GPIO_ACTIVE_HIGH /* scl */
938 i2c-gpio,sda-open-drain;
939 i2c-gpio,scl-open-drain;
940 i2c-gpio,delay-us = <2>; /* ~100 kHz */
941 pinctrl-names = "default";
942 pinctrl-0 = <&pinctrl_twi_gpio>;
943 #address-cells = <1>;