ARM: at91: add TWI bindings to RM9200 DT
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / at91rm9200.dtsi
1 /*
2  * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
3  *
4  *  Copyright (C) 2011 Atmel,
5  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6  *                2012 Joachim Eastwood <manabian@gmail.com>
7  *
8  * Based on at91sam9260.dtsi
9  *
10  * Licensed under GPLv2 or later.
11  */
12
13 /include/ "skeleton.dtsi"
14
15 / {
16         model = "Atmel AT91RM9200 family SoC";
17         compatible = "atmel,at91rm9200";
18         interrupt-parent = <&aic>;
19
20         aliases {
21                 serial0 = &dbgu;
22                 serial1 = &usart0;
23                 serial2 = &usart1;
24                 serial3 = &usart2;
25                 serial4 = &usart3;
26                 gpio0 = &pioA;
27                 gpio1 = &pioB;
28                 gpio2 = &pioC;
29                 gpio3 = &pioD;
30                 tcb0 = &tcb0;
31                 tcb1 = &tcb1;
32                 i2c0 = &i2c0;
33                 ssc0 = &ssc0;
34                 ssc1 = &ssc1;
35                 ssc2 = &ssc2;
36         };
37         cpus {
38                 cpu@0 {
39                         compatible = "arm,arm920t";
40                 };
41         };
42
43         memory {
44                 reg = <0x20000000 0x04000000>;
45         };
46
47         ahb {
48                 compatible = "simple-bus";
49                 #address-cells = <1>;
50                 #size-cells = <1>;
51                 ranges;
52
53                 apb {
54                         compatible = "simple-bus";
55                         #address-cells = <1>;
56                         #size-cells = <1>;
57                         ranges;
58
59                         aic: interrupt-controller@fffff000 {
60                                 #interrupt-cells = <3>;
61                                 compatible = "atmel,at91rm9200-aic";
62                                 interrupt-controller;
63                                 reg = <0xfffff000 0x200>;
64                                 atmel,external-irqs = <25 26 27 28 29 30 31>;
65                         };
66
67                         ramc0: ramc@ffffff00 {
68                                 compatible = "atmel,at91rm9200-sdramc";
69                                 reg = <0xffffff00 0x100>;
70                         };
71
72                         pmc: pmc@fffffc00 {
73                                 compatible = "atmel,at91rm9200-pmc";
74                                 reg = <0xfffffc00 0x100>;
75                         };
76
77                         st: timer@fffffd00 {
78                                 compatible = "atmel,at91rm9200-st";
79                                 reg = <0xfffffd00 0x100>;
80                                 interrupts = <1 4 7>;
81                         };
82
83                         tcb0: timer@fffa0000 {
84                                 compatible = "atmel,at91rm9200-tcb";
85                                 reg = <0xfffa0000 0x100>;
86                                 interrupts = <17 4 0 18 4 0 19 4 0>;
87                         };
88
89                         tcb1: timer@fffa4000 {
90                                 compatible = "atmel,at91rm9200-tcb";
91                                 reg = <0xfffa4000 0x100>;
92                                 interrupts = <20 4 0 21 4 0 22 4 0>;
93                         };
94
95                         i2c0: i2c@fffb8000 {
96                                 compatible = "atmel,at91rm9200-i2c";
97                                 reg = <0xfffb8000 0x4000>;
98                                 interrupts = <12 4 6>;
99                                 pinctrl-names = "default";
100                                 pinctrl-0 = <&pinctrl_twi>;
101                                 #address-cells = <1>;
102                                 #size-cells = <0>;
103                                 status = "disabled";
104                         };
105
106                         mmc0: mmc@fffb4000 {
107                                 compatible = "atmel,hsmci";
108                                 reg = <0xfffb4000 0x4000>;
109                                 interrupts = <10 4 0>;
110                                 #address-cells = <1>;
111                                 #size-cells = <0>;
112                                 status = "disabled";
113                         };
114
115                         ssc0: ssc@fffd0000 {
116                                 compatible = "atmel,at91rm9200-ssc";
117                                 reg = <0xfffd0000 0x4000>;
118                                 interrupts = <14 4 5>;
119                                 pinctrl-names = "default";
120                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
121                                 status = "disable";
122                         };
123
124                         ssc1: ssc@fffd4000 {
125                                 compatible = "atmel,at91rm9200-ssc";
126                                 reg = <0xfffd4000 0x4000>;
127                                 interrupts = <15 4 5>;
128                                 pinctrl-names = "default";
129                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
130                                 status = "disable";
131                         };
132
133                         ssc2: ssc@fffd8000 {
134                                 compatible = "atmel,at91rm9200-ssc";
135                                 reg = <0xfffd8000 0x4000>;
136                                 interrupts = <16 4 5>;
137                                 pinctrl-names = "default";
138                                 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
139                                 status = "disable";
140                         };
141
142                         macb0: ethernet@fffbc000 {
143                                 compatible = "cdns,at91rm9200-emac", "cdns,emac";
144                                 reg = <0xfffbc000 0x4000>;
145                                 interrupts = <24 4 3>;
146                                 phy-mode = "rmii";
147                                 pinctrl-names = "default";
148                                 pinctrl-0 = <&pinctrl_macb_rmii>;
149                                 status = "disabled";
150                         };
151
152                         pinctrl@fffff400 {
153                                 #address-cells = <1>;
154                                 #size-cells = <1>;
155                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
156                                 ranges = <0xfffff400 0xfffff400 0x800>;
157
158                                 atmel,mux-mask = <
159                                         /*    A         B     */
160                                          0xffffffff 0xffffffff  /* pioA */
161                                          0xffffffff 0x083fffff  /* pioB */
162                                          0xffff3fff 0x00000000  /* pioC */
163                                          0x03ff87ff 0x0fffff80  /* pioD */
164                                         >;
165
166                                 /* shared pinctrl settings */
167                                 dbgu {
168                                         pinctrl_dbgu: dbgu-0 {
169                                                 atmel,pins =
170                                                         <0 30 0x1 0x0   /* PA30 periph A */
171                                                          0 31 0x1 0x1>; /* PA31 periph with pullup */
172                                         };
173                                 };
174
175                                 uart0 {
176                                         pinctrl_uart0: uart0-0 {
177                                                 atmel,pins =
178                                                         <0 17 0x1 0x0   /* PA17 periph A */
179                                                          0 18 0x1 0x0>; /* PA18 periph A */
180                                         };
181
182                                         pinctrl_uart0_rts: uart0_rts-0 {
183                                                 atmel,pins =
184                                                         <0 20 0x1 0x0>; /* PA20 periph A */
185                                         };
186
187                                         pinctrl_uart0_cts: uart0_cts-0 {
188                                                 atmel,pins =
189                                                         <0 21 0x1 0x0>; /* PA21 periph A */
190                                         };
191                                 };
192
193                                 uart1 {
194                                         pinctrl_uart1: uart1-0 {
195                                                 atmel,pins =
196                                                         <1 20 0x1 0x1   /* PB20 periph A with pullup */
197                                                          1 21 0x1 0x0>; /* PB21 periph A */
198                                         };
199
200                                         pinctrl_uart1_rts: uart1_rts-0 {
201                                                 atmel,pins =
202                                                         <1 24 0x1 0x0>; /* PB24 periph A */
203                                         };
204
205                                         pinctrl_uart1_cts: uart1_cts-0 {
206                                                 atmel,pins =
207                                                         <1 26 0x1 0x0>; /* PB26 periph A */
208                                         };
209
210                                         pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
211                                                 atmel,pins =
212                                                         <1 19 0x1 0x0   /* PB19 periph A */
213                                                          1 25 0x1 0x0>; /* PB25 periph A */
214                                         };
215
216                                         pinctrl_uart1_dcd: uart1_dcd-0 {
217                                                 atmel,pins =
218                                                         <1 23 0x1 0x0>; /* PB23 periph A */
219                                         };
220
221                                         pinctrl_uart1_ri: uart1_ri-0 {
222                                                 atmel,pins =
223                                                         <1 18 0x1 0x0>; /* PB18 periph A */
224                                         };
225                                 };
226
227                                 uart2 {
228                                         pinctrl_uart2: uart2-0 {
229                                                 atmel,pins =
230                                                         <0 22 0x1 0x0   /* PA22 periph A */
231                                                          0 23 0x1 0x1>; /* PA23 periph A with pullup */
232                                         };
233
234                                         pinctrl_uart2_rts: uart2_rts-0 {
235                                                 atmel,pins =
236                                                         <0 30 0x2 0x0>; /* PA30 periph B */
237                                         };
238
239                                         pinctrl_uart2_cts: uart2_cts-0 {
240                                                 atmel,pins =
241                                                         <0 31 0x2 0x0>; /* PA31 periph B */
242                                         };
243                                 };
244
245                                 uart3 {
246                                         pinctrl_uart3: uart3-0 {
247                                                 atmel,pins =
248                                                         <0 5 0x2 0x1    /* PA5 periph B with pullup */
249                                                          0 6 0x2 0x0>;  /* PA6 periph B */
250                                         };
251
252                                         pinctrl_uart3_rts: uart3_rts-0 {
253                                                 atmel,pins =
254                                                         <1 0 0x2 0x0>;  /* PB0 periph B */
255                                         };
256
257                                         pinctrl_uart3_cts: uart3_cts-0 {
258                                                 atmel,pins =
259                                                         <1 1 0x2 0x0>;  /* PB1 periph B */
260                                         };
261                                 };
262
263                                 nand {
264                                         pinctrl_nand: nand-0 {
265                                                 atmel,pins =
266                                                         <2 2 0x0 0x1    /* PC2 gpio RDY pin pull_up */
267                                                          1 1 0x0 0x1>;  /* PB1 gpio CD pin pull_up */
268                                         };
269                                 };
270
271                                 macb {
272                                         pinctrl_macb_rmii: macb_rmii-0 {
273                                                 atmel,pins =
274                                                         <0 7 0x1 0x0    /* PA7 periph A */
275                                                          0 8 0x1 0x0    /* PA8 periph A */
276                                                          0 9 0x1 0x0    /* PA9 periph A */
277                                                          0 10 0x1 0x0   /* PA10 periph A */
278                                                          0 11 0x1 0x0   /* PA11 periph A */
279                                                          0 12 0x1 0x0   /* PA12 periph A */
280                                                          0 13 0x1 0x0   /* PA13 periph A */
281                                                          0 14 0x1 0x0   /* PA14 periph A */
282                                                          0 15 0x1 0x0   /* PA15 periph A */
283                                                          0 16 0x1 0x0>; /* PA16 periph A */
284                                         };
285
286                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
287                                                 atmel,pins =
288                                                         <1 12 0x2 0x0   /* PB12 periph B */
289                                                          1 13 0x2 0x0   /* PB13 periph B */
290                                                          1 14 0x2 0x0   /* PB14 periph B */
291                                                          1 15 0x2 0x0   /* PB15 periph B */
292                                                          1 16 0x2 0x0   /* PB16 periph B */
293                                                          1 17 0x2 0x0   /* PB17 periph B */
294                                                          1 18 0x2 0x0   /* PB18 periph B */
295                                                          1 19 0x2 0x0>; /* PB19 periph B */
296                                         };
297                                 };
298
299                                 mmc0 {
300                                         pinctrl_mmc0_clk: mmc0_clk-0 {
301                                                 atmel,pins =
302                                                         <0 27 0x1 0x0>; /* PA27 periph A */
303                                         };
304
305                                         pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
306                                                 atmel,pins =
307                                                         <0 28 0x1 0x1   /* PA28 periph A with pullup */
308                                                          0 29 0x1 0x1>; /* PA29 periph A with pullup */
309                                         };
310
311                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
312                                                 atmel,pins =
313                                                         <1 3 0x2 0x1    /* PB3 periph B with pullup */
314                                                          1 4 0x2 0x1    /* PB4 periph B with pullup */
315                                                          1 5 0x2 0x1>;  /* PB5 periph B with pullup */
316                                         };
317
318                                         pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
319                                                 atmel,pins =
320                                                         <0 8 0x2 0x1    /* PA8 periph B with pullup */
321                                                          0 9 0x2 0x1>;  /* PA9 periph B with pullup */
322                                         };
323
324                                         pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
325                                                 atmel,pins =
326                                                         <0 10 0x2 0x1   /* PA10 periph B with pullup */
327                                                          0 11 0x2 0x1   /* PA11 periph B with pullup */
328                                                          0 12 0x2 0x1>; /* PA12 periph B with pullup */
329                                         };
330                                 };
331
332                                 ssc0 {
333                                         pinctrl_ssc0_tx: ssc0_tx-0 {
334                                                 atmel,pins =
335                                                         <1 0 0x1 0x0    /* PB0 periph A */
336                                                          1 1 0x1 0x0    /* PB1 periph A */
337                                                          1 2 0x1 0x0>;  /* PB2 periph A */
338                                         };
339
340                                         pinctrl_ssc0_rx: ssc0_rx-0 {
341                                                 atmel,pins =
342                                                         <1 3 0x1 0x0    /* PB3 periph A */
343                                                          1 4 0x1 0x0    /* PB4 periph A */
344                                                          1 5 0x1 0x0>;  /* PB5 periph A */
345                                         };
346                                 };
347
348                                 ssc1 {
349                                         pinctrl_ssc1_tx: ssc1_tx-0 {
350                                                 atmel,pins =
351                                                         <1 6 0x1 0x0    /* PB6 periph A */
352                                                          1 7 0x1 0x0    /* PB7 periph A */
353                                                          1 8 0x1 0x0>;  /* PB8 periph A */
354                                         };
355
356                                         pinctrl_ssc1_rx: ssc1_rx-0 {
357                                                 atmel,pins =
358                                                         <1 9 0x1 0x0    /* PB9 periph A */
359                                                          1 10 0x1 0x0   /* PB10 periph A */
360                                                          1 11 0x1 0x0>; /* PB11 periph A */
361                                         };
362                                 };
363
364                                 ssc2 {
365                                         pinctrl_ssc2_tx: ssc2_tx-0 {
366                                                 atmel,pins =
367                                                         <1 12 0x1 0x0   /* PB12 periph A */
368                                                          1 13 0x1 0x0   /* PB13 periph A */
369                                                          1 14 0x1 0x0>; /* PB14 periph A */
370                                         };
371
372                                         pinctrl_ssc2_rx: ssc2_rx-0 {
373                                                 atmel,pins =
374                                                         <1 15 0x1 0x0   /* PB15 periph A */
375                                                          1 16 0x1 0x0   /* PB16 periph A */
376                                                          1 17 0x1 0x0>; /* PB17 periph A */
377                                         };
378                                 };
379
380                                 twi {
381                                         pinctrl_twi: twi-0 {
382                                                 atmel,pins =
383                                                         <0 25 0x1 0x2   /* PA25 periph A with multi drive */
384                                                          0 26 0x1 0x2>; /* PA26 periph A with multi drive */
385                                         };
386                                 };
387
388                                 pioA: gpio@fffff400 {
389                                         compatible = "atmel,at91rm9200-gpio";
390                                         reg = <0xfffff400 0x200>;
391                                         interrupts = <2 4 1>;
392                                         #gpio-cells = <2>;
393                                         gpio-controller;
394                                         interrupt-controller;
395                                         #interrupt-cells = <2>;
396                                 };
397
398                                 pioB: gpio@fffff600 {
399                                         compatible = "atmel,at91rm9200-gpio";
400                                         reg = <0xfffff600 0x200>;
401                                         interrupts = <3 4 1>;
402                                         #gpio-cells = <2>;
403                                         gpio-controller;
404                                         interrupt-controller;
405                                         #interrupt-cells = <2>;
406                                 };
407
408                                 pioC: gpio@fffff800 {
409                                         compatible = "atmel,at91rm9200-gpio";
410                                         reg = <0xfffff800 0x200>;
411                                         interrupts = <4 4 1>;
412                                         #gpio-cells = <2>;
413                                         gpio-controller;
414                                         interrupt-controller;
415                                         #interrupt-cells = <2>;
416                                 };
417
418                                 pioD: gpio@fffffa00 {
419                                         compatible = "atmel,at91rm9200-gpio";
420                                         reg = <0xfffffa00 0x200>;
421                                         interrupts = <5 4 1>;
422                                         #gpio-cells = <2>;
423                                         gpio-controller;
424                                         interrupt-controller;
425                                         #interrupt-cells = <2>;
426                                 };
427                         };
428
429                         dbgu: serial@fffff200 {
430                                 compatible = "atmel,at91rm9200-usart";
431                                 reg = <0xfffff200 0x200>;
432                                 interrupts = <1 4 7>;
433                                 pinctrl-names = "default";
434                                 pinctrl-0 = <&pinctrl_dbgu>;
435                                 status = "disabled";
436                         };
437
438                         usart0: serial@fffc0000 {
439                                 compatible = "atmel,at91rm9200-usart";
440                                 reg = <0xfffc0000 0x200>;
441                                 interrupts = <6 4 5>;
442                                 atmel,use-dma-rx;
443                                 atmel,use-dma-tx;
444                                 pinctrl-names = "default";
445                                 pinctrl-0 = <&pinctrl_uart0>;
446                                 status = "disabled";
447                         };
448
449                         usart1: serial@fffc4000 {
450                                 compatible = "atmel,at91rm9200-usart";
451                                 reg = <0xfffc4000 0x200>;
452                                 interrupts = <7 4 5>;
453                                 atmel,use-dma-rx;
454                                 atmel,use-dma-tx;
455                                 pinctrl-names = "default";
456                                 pinctrl-0 = <&pinctrl_uart1>;
457                                 status = "disabled";
458                         };
459
460                         usart2: serial@fffc8000 {
461                                 compatible = "atmel,at91rm9200-usart";
462                                 reg = <0xfffc8000 0x200>;
463                                 interrupts = <8 4 5>;
464                                 atmel,use-dma-rx;
465                                 atmel,use-dma-tx;
466                                 pinctrl-names = "default";
467                                 pinctrl-0 = <&pinctrl_uart2>;
468                                 status = "disabled";
469                         };
470
471                         usart3: serial@fffcc000 {
472                                 compatible = "atmel,at91rm9200-usart";
473                                 reg = <0xfffcc000 0x200>;
474                                 interrupts = <23 4 5>;
475                                 atmel,use-dma-rx;
476                                 atmel,use-dma-tx;
477                                 pinctrl-names = "default";
478                                 pinctrl-0 = <&pinctrl_uart3>;
479                                 status = "disabled";
480                         };
481
482                         usb1: gadget@fffb0000 {
483                                 compatible = "atmel,at91rm9200-udc";
484                                 reg = <0xfffb0000 0x4000>;
485                                 interrupts = <11 4 2>;
486                                 status = "disabled";
487                         };
488                 };
489
490                 nand0: nand@40000000 {
491                         compatible = "atmel,at91rm9200-nand";
492                         #address-cells = <1>;
493                         #size-cells = <1>;
494                         reg = <0x40000000 0x10000000>;
495                         atmel,nand-addr-offset = <21>;
496                         atmel,nand-cmd-offset = <22>;
497                         pinctrl-names = "default";
498                         pinctrl-0 = <&pinctrl_nand>;
499                         nand-ecc-mode = "soft";
500                         gpios = <&pioC 2 0
501                                  0
502                                  &pioB 1 0
503                                 >;
504                         status = "disabled";
505                 };
506
507                 usb0: ohci@00300000 {
508                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
509                         reg = <0x00300000 0x100000>;
510                         interrupts = <23 4 2>;
511                         status = "disabled";
512                 };
513         };
514
515         i2c@0 {
516                 compatible = "i2c-gpio";
517                 gpios = <&pioA 25 0 /* sda */
518                          &pioA 26 0 /* scl */
519                         >;
520                 i2c-gpio,sda-open-drain;
521                 i2c-gpio,scl-open-drain;
522                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
523                 #address-cells = <1>;
524                 #size-cells = <0>;
525                 status = "disabled";
526         };
527 };