2 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2012 Joachim Eastwood <manabian@gmail.com>
8 * Based on at91sam9260.dtsi
10 * Licensed under GPLv2 or later.
13 /include/ "skeleton.dtsi"
16 model = "Atmel AT91RM9200 family SoC";
17 compatible = "atmel,at91rm9200";
18 interrupt-parent = <&aic>;
35 compatible = "arm,arm920t";
40 reg = <0x20000000 0x04000000>;
44 compatible = "simple-bus";
50 compatible = "simple-bus";
55 aic: interrupt-controller@fffff000 {
56 #interrupt-cells = <3>;
57 compatible = "atmel,at91rm9200-aic";
59 reg = <0xfffff000 0x200>;
60 atmel,external-irqs = <25 26 27 28 29 30 31>;
63 ramc0: ramc@ffffff00 {
64 compatible = "atmel,at91rm9200-sdramc";
65 reg = <0xffffff00 0x100>;
69 compatible = "atmel,at91rm9200-pmc";
70 reg = <0xfffffc00 0x100>;
74 compatible = "atmel,at91rm9200-st";
75 reg = <0xfffffd00 0x100>;
79 tcb0: timer@fffa0000 {
80 compatible = "atmel,at91rm9200-tcb";
81 reg = <0xfffa0000 0x100>;
82 interrupts = <17 4 0 18 4 0 19 4 0>;
85 tcb1: timer@fffa4000 {
86 compatible = "atmel,at91rm9200-tcb";
87 reg = <0xfffa4000 0x100>;
88 interrupts = <20 4 0 21 4 0 22 4 0>;
94 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
95 ranges = <0xfffff400 0xfffff400 0x800>;
99 0xffffffff 0xffffffff /* pioA */
100 0xffffffff 0x083fffff /* pioB */
101 0xffff3fff 0x00000000 /* pioC */
102 0x03ff87ff 0x0fffff80 /* pioD */
105 /* shared pinctrl settings */
107 pinctrl_dbgu: dbgu-0 {
109 <0 30 0x1 0x0 /* PA30 periph A */
110 0 31 0x1 0x1>; /* PA31 periph with pullup */
115 pinctrl_uart0: uart0-0 {
117 <0 17 0x1 0x0 /* PA17 periph A */
118 0 18 0x1 0x0>; /* PA18 periph A */
121 pinctrl_uart0_rts: uart0_rts-0 {
123 <0 20 0x1 0x0>; /* PA20 periph A */
126 pinctrl_uart0_cts: uart0_cts-0 {
128 <0 21 0x1 0x0>; /* PA21 periph A */
133 pinctrl_uart1: uart1-0 {
135 <1 20 0x1 0x1 /* PB20 periph A with pullup */
136 1 21 0x1 0x0>; /* PB21 periph A */
139 pinctrl_uart1_rts: uart1_rts-0 {
141 <1 24 0x1 0x0>; /* PB24 periph A */
144 pinctrl_uart1_cts: uart1_cts-0 {
146 <1 26 0x1 0x0>; /* PB26 periph A */
149 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
151 <1 19 0x1 0x0 /* PB19 periph A */
152 1 25 0x1 0x0>; /* PB25 periph A */
155 pinctrl_uart1_dcd: uart1_dcd-0 {
157 <1 23 0x1 0x0>; /* PB23 periph A */
160 pinctrl_uart1_ri: uart1_ri-0 {
162 <1 18 0x1 0x0>; /* PB18 periph A */
167 pinctrl_uart2: uart2-0 {
169 <0 22 0x1 0x0 /* PA22 periph A */
170 0 23 0x1 0x1>; /* PA23 periph A with pullup */
173 pinctrl_uart2_rts: uart2_rts-0 {
175 <0 30 0x2 0x0>; /* PA30 periph B */
178 pinctrl_uart2_cts: uart2_cts-0 {
180 <0 31 0x2 0x0>; /* PA31 periph B */
185 pinctrl_uart3: uart3-0 {
187 <0 5 0x2 0x1 /* PA5 periph B with pullup */
188 0 6 0x2 0x0>; /* PA6 periph B */
191 pinctrl_uart3_rts: uart3_rts-0 {
193 <1 0 0x2 0x0>; /* PB0 periph B */
196 pinctrl_uart3_cts: uart3_cts-0 {
198 <1 1 0x2 0x0>; /* PB1 periph B */
203 pinctrl_nand: nand-0 {
205 <2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */
206 1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */
210 pioA: gpio@fffff400 {
211 compatible = "atmel,at91rm9200-gpio";
212 reg = <0xfffff400 0x200>;
213 interrupts = <2 4 1>;
216 interrupt-controller;
217 #interrupt-cells = <2>;
220 pioB: gpio@fffff600 {
221 compatible = "atmel,at91rm9200-gpio";
222 reg = <0xfffff600 0x200>;
223 interrupts = <3 4 1>;
226 interrupt-controller;
227 #interrupt-cells = <2>;
230 pioC: gpio@fffff800 {
231 compatible = "atmel,at91rm9200-gpio";
232 reg = <0xfffff800 0x200>;
233 interrupts = <4 4 1>;
236 interrupt-controller;
237 #interrupt-cells = <2>;
240 pioD: gpio@fffffa00 {
241 compatible = "atmel,at91rm9200-gpio";
242 reg = <0xfffffa00 0x200>;
243 interrupts = <5 4 1>;
246 interrupt-controller;
247 #interrupt-cells = <2>;
251 dbgu: serial@fffff200 {
252 compatible = "atmel,at91rm9200-usart";
253 reg = <0xfffff200 0x200>;
254 interrupts = <1 4 7>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&pinctrl_dbgu>;
260 usart0: serial@fffc0000 {
261 compatible = "atmel,at91rm9200-usart";
262 reg = <0xfffc0000 0x200>;
263 interrupts = <6 4 5>;
266 pinctrl-names = "default";
267 pinctrl-0 = <&pinctrl_uart0>;
271 usart1: serial@fffc4000 {
272 compatible = "atmel,at91rm9200-usart";
273 reg = <0xfffc4000 0x200>;
274 interrupts = <7 4 5>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&pinctrl_uart1>;
282 usart2: serial@fffc8000 {
283 compatible = "atmel,at91rm9200-usart";
284 reg = <0xfffc8000 0x200>;
285 interrupts = <8 4 5>;
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_uart2>;
293 usart3: serial@fffcc000 {
294 compatible = "atmel,at91rm9200-usart";
295 reg = <0xfffcc000 0x200>;
296 interrupts = <23 4 5>;
299 pinctrl-names = "default";
300 pinctrl-0 = <&pinctrl_uart3>;
304 usb1: gadget@fffb0000 {
305 compatible = "atmel,at91rm9200-udc";
306 reg = <0xfffb0000 0x4000>;
307 interrupts = <11 4 2>;
312 nand0: nand@40000000 {
313 compatible = "atmel,at91rm9200-nand";
314 #address-cells = <1>;
316 reg = <0x40000000 0x10000000>;
317 atmel,nand-addr-offset = <21>;
318 atmel,nand-cmd-offset = <22>;
319 pinctrl-names = "default";
320 pinctrl-0 = <&pinctrl_nand>;
321 nand-ecc-mode = "soft";
329 usb0: ohci@00300000 {
330 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
331 reg = <0x00300000 0x100000>;
332 interrupts = <23 4 2>;
338 compatible = "i2c-gpio";
339 gpios = <&pioA 23 0 /* sda */
342 i2c-gpio,sda-open-drain;
343 i2c-gpio,scl-open-drain;
344 i2c-gpio,delay-us = <2>; /* ~100 kHz */
345 #address-cells = <1>;