2 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6 * Licensed under GPLv2 only.
9 #include "skeleton.dtsi"
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
15 model = "Atmel AT91SAM9263 family SoC";
16 compatible = "atmel,at91sam9263";
17 interrupt-parent = <&aic>;
39 compatible = "arm,arm926ej-s";
45 reg = <0x20000000 0x08000000>;
49 compatible = "simple-bus";
55 compatible = "simple-bus";
60 aic: interrupt-controller@fffff000 {
61 #interrupt-cells = <3>;
62 compatible = "atmel,at91rm9200-aic";
64 reg = <0xfffff000 0x200>;
65 atmel,external-irqs = <30 31>;
69 compatible = "atmel,at91rm9200-pmc";
70 reg = <0xfffffc00 0x100>;
74 compatible = "atmel,at91sam9260-sdramc";
75 reg = <0xffffe200 0x200
80 compatible = "atmel,at91sam9260-pit";
81 reg = <0xfffffd30 0xf>;
82 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
85 tcb0: timer@fff7c000 {
86 compatible = "atmel,at91rm9200-tcb";
87 reg = <0xfff7c000 0x100>;
88 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
92 compatible = "atmel,at91sam9260-rstc";
93 reg = <0xfffffd00 0x10>;
97 compatible = "atmel,at91sam9260-shdwc";
98 reg = <0xfffffd10 0x10>;
102 #address-cells = <1>;
104 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
105 ranges = <0xfffff200 0xfffff200 0xa00>;
109 0xfffffffb 0xffffe07f /* pioA */
110 0x0007ffff 0x39072fff /* pioB */
111 0xffffffff 0x3ffffff8 /* pioC */
112 0xfffffbff 0xffffffff /* pioD */
113 0xffe00fff 0xfbfcff00 /* pioE */
116 /* shared pinctrl settings */
118 pinctrl_dbgu: dbgu-0 {
120 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */
121 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */
126 pinctrl_usart0: usart0-0 {
128 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
129 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
132 pinctrl_usart0_rts: usart0_rts-0 {
134 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
137 pinctrl_usart0_cts: usart0_cts-0 {
139 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
144 pinctrl_usart1: usart1-0 {
146 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
147 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
150 pinctrl_usart1_rts: usart1_rts-0 {
152 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
155 pinctrl_usart1_cts: usart1_cts-0 {
157 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
162 pinctrl_usart2: usart2-0 {
164 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
165 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
168 pinctrl_usart2_rts: usart2_rts-0 {
170 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
173 pinctrl_usart2_cts: usart2_cts-0 {
175 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
180 pinctrl_nand: nand-0 {
182 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/
183 AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */
188 pinctrl_macb_rmii: macb_rmii-0 {
190 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
191 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
192 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
193 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
194 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
195 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
196 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
197 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
198 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
199 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
202 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
204 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
205 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
206 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
207 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
208 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
209 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
210 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
211 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
216 pinctrl_mmc0_clk: mmc0_clk-0 {
218 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
221 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
223 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
224 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
227 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
229 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
230 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
231 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
234 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
236 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
237 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
240 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
242 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
243 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
244 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
249 pinctrl_mmc1_clk: mmc1_clk-0 {
251 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
254 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
256 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
257 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
260 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
262 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
263 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
264 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
267 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
269 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
270 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
273 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
275 <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
276 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
277 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
282 pinctrl_ssc0_tx: ssc0_tx-0 {
284 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
285 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
286 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
289 pinctrl_ssc0_rx: ssc0_rx-0 {
291 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
292 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
293 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
298 pinctrl_ssc1_tx: ssc1_tx-0 {
300 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
301 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
302 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
305 pinctrl_ssc1_rx: ssc1_rx-0 {
307 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
308 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
309 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
314 pinctrl_spi0: spi0-0 {
316 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
317 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
318 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
323 pinctrl_spi1: spi1-0 {
325 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
326 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
327 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
332 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
333 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
336 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
337 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
340 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
341 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
344 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
345 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
348 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
349 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
352 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
353 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
356 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
357 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
360 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
361 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
364 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
365 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
369 pioA: gpio@fffff200 {
370 compatible = "atmel,at91rm9200-gpio";
371 reg = <0xfffff200 0x200>;
372 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
375 interrupt-controller;
376 #interrupt-cells = <2>;
379 pioB: gpio@fffff400 {
380 compatible = "atmel,at91rm9200-gpio";
381 reg = <0xfffff400 0x200>;
382 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
385 interrupt-controller;
386 #interrupt-cells = <2>;
389 pioC: gpio@fffff600 {
390 compatible = "atmel,at91rm9200-gpio";
391 reg = <0xfffff600 0x200>;
392 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
395 interrupt-controller;
396 #interrupt-cells = <2>;
399 pioD: gpio@fffff800 {
400 compatible = "atmel,at91rm9200-gpio";
401 reg = <0xfffff800 0x200>;
402 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
405 interrupt-controller;
406 #interrupt-cells = <2>;
409 pioE: gpio@fffffa00 {
410 compatible = "atmel,at91rm9200-gpio";
411 reg = <0xfffffa00 0x200>;
412 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
415 interrupt-controller;
416 #interrupt-cells = <2>;
420 dbgu: serial@ffffee00 {
421 compatible = "atmel,at91sam9260-usart";
422 reg = <0xffffee00 0x200>;
423 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
424 pinctrl-names = "default";
425 pinctrl-0 = <&pinctrl_dbgu>;
429 usart0: serial@fff8c000 {
430 compatible = "atmel,at91sam9260-usart";
431 reg = <0xfff8c000 0x200>;
432 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
435 pinctrl-names = "default";
436 pinctrl-0 = <&pinctrl_usart0>;
440 usart1: serial@fff90000 {
441 compatible = "atmel,at91sam9260-usart";
442 reg = <0xfff90000 0x200>;
443 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
446 pinctrl-names = "default";
447 pinctrl-0 = <&pinctrl_usart1>;
451 usart2: serial@fff94000 {
452 compatible = "atmel,at91sam9260-usart";
453 reg = <0xfff94000 0x200>;
454 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
457 pinctrl-names = "default";
458 pinctrl-0 = <&pinctrl_usart2>;
463 compatible = "atmel,at91rm9200-ssc";
464 reg = <0xfff98000 0x4000>;
465 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
466 pinctrl-names = "default";
467 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
472 compatible = "atmel,at91rm9200-ssc";
473 reg = <0xfff9c000 0x4000>;
474 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
475 pinctrl-names = "default";
476 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
480 macb0: ethernet@fffbc000 {
481 compatible = "cdns,at32ap7000-macb", "cdns,macb";
482 reg = <0xfffbc000 0x100>;
483 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
484 pinctrl-names = "default";
485 pinctrl-0 = <&pinctrl_macb_rmii>;
489 usb1: gadget@fff78000 {
490 compatible = "atmel,at91rm9200-udc";
491 reg = <0xfff78000 0x4000>;
492 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
497 compatible = "atmel,at91sam9263-i2c";
498 reg = <0xfff88000 0x100>;
499 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
500 #address-cells = <1>;
506 compatible = "atmel,hsmci";
507 reg = <0xfff80000 0x600>;
508 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
509 #address-cells = <1>;
515 compatible = "atmel,hsmci";
516 reg = <0xfff84000 0x600>;
517 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
518 #address-cells = <1>;
524 compatible = "atmel,at91sam9260-wdt";
525 reg = <0xfffffd40 0x10>;
530 #address-cells = <1>;
532 compatible = "atmel,at91rm9200-spi";
533 reg = <0xfffa4000 0x200>;
534 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
535 pinctrl-names = "default";
536 pinctrl-0 = <&pinctrl_spi0>;
541 #address-cells = <1>;
543 compatible = "atmel,at91rm9200-spi";
544 reg = <0xfffa8000 0x200>;
545 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
546 pinctrl-names = "default";
547 pinctrl-0 = <&pinctrl_spi1>;
552 nand0: nand@40000000 {
553 compatible = "atmel,at91rm9200-nand";
554 #address-cells = <1>;
556 reg = <0x40000000 0x10000000
559 atmel,nand-addr-offset = <21>;
560 atmel,nand-cmd-offset = <22>;
561 pinctrl-names = "default";
562 pinctrl-0 = <&pinctrl_nand>;
563 gpios = <&pioA 22 GPIO_ACTIVE_HIGH
564 &pioD 15 GPIO_ACTIVE_HIGH
570 usb0: ohci@00a00000 {
571 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
572 reg = <0x00a00000 0x100000>;
573 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
579 compatible = "i2c-gpio";
580 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
581 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
583 i2c-gpio,sda-open-drain;
584 i2c-gpio,scl-open-drain;
585 i2c-gpio,delay-us = <2>; /* ~100 kHz */
586 #address-cells = <1>;