2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 /include/ "skeleton.dtsi"
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
35 compatible = "arm,arm926ejs";
40 reg = <0x70000000 0x10000000>;
44 compatible = "simple-bus";
50 compatible = "simple-bus";
55 aic: interrupt-controller@fffff000 {
56 #interrupt-cells = <2>;
57 compatible = "atmel,at91rm9200-aic";
60 reg = <0xfffff000 0x200>;
63 ramc0: ramc@ffffe400 {
64 compatible = "atmel,at91sam9g45-ddramc";
65 reg = <0xffffe400 0x200
70 compatible = "atmel,at91rm9200-pmc";
71 reg = <0xfffffc00 0x100>;
75 compatible = "atmel,at91sam9g45-rstc";
76 reg = <0xfffffd00 0x10>;
80 compatible = "atmel,at91sam9260-pit";
81 reg = <0xfffffd30 0xf>;
86 tcb0: timer@fff7c000 {
87 compatible = "atmel,at91rm9200-tcb";
88 reg = <0xfff7c000 0x100>;
92 tcb1: timer@fffd4000 {
93 compatible = "atmel,at91rm9200-tcb";
94 reg = <0xfffd4000 0x100>;
98 dma: dma-controller@ffffec00 {
99 compatible = "atmel,at91sam9g45-dma";
100 reg = <0xffffec00 0x200>;
104 pioA: gpio@fffff200 {
105 compatible = "atmel,at91rm9200-gpio";
106 reg = <0xfffff200 0x100>;
110 interrupt-controller;
113 pioB: gpio@fffff400 {
114 compatible = "atmel,at91rm9200-gpio";
115 reg = <0xfffff400 0x100>;
119 interrupt-controller;
122 pioC: gpio@fffff600 {
123 compatible = "atmel,at91rm9200-gpio";
124 reg = <0xfffff600 0x100>;
128 interrupt-controller;
131 pioD: gpio@fffff800 {
132 compatible = "atmel,at91rm9200-gpio";
133 reg = <0xfffff800 0x100>;
137 interrupt-controller;
140 pioE: gpio@fffffa00 {
141 compatible = "atmel,at91rm9200-gpio";
142 reg = <0xfffffa00 0x100>;
146 interrupt-controller;
149 dbgu: serial@ffffee00 {
150 compatible = "atmel,at91sam9260-usart";
151 reg = <0xffffee00 0x200>;
156 usart0: serial@fff8c000 {
157 compatible = "atmel,at91sam9260-usart";
158 reg = <0xfff8c000 0x200>;
165 usart1: serial@fff90000 {
166 compatible = "atmel,at91sam9260-usart";
167 reg = <0xfff90000 0x200>;
174 usart2: serial@fff94000 {
175 compatible = "atmel,at91sam9260-usart";
176 reg = <0xfff94000 0x200>;
183 usart3: serial@fff98000 {
184 compatible = "atmel,at91sam9260-usart";
185 reg = <0xfff98000 0x200>;
192 macb0: ethernet@fffbc000 {
193 compatible = "cdns,at32ap7000-macb", "cdns,macb";
194 reg = <0xfffbc000 0x100>;
200 nand0: nand@40000000 {
201 compatible = "atmel,at91rm9200-nand";
202 #address-cells = <1>;
204 reg = <0x40000000 0x10000000
207 atmel,nand-addr-offset = <21>;
208 atmel,nand-cmd-offset = <22>;
218 compatible = "i2c-gpio";
219 gpios = <&pioA 20 0 /* sda */
222 i2c-gpio,sda-open-drain;
223 i2c-gpio,scl-open-drain;
224 i2c-gpio,delay-us = <5>; /* ~100 kHz */
225 #address-cells = <1>;