2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 #include "skeleton.dtsi"
13 #include <dt-bindings/dma/at91.h>
14 #include <dt-bindings/pinctrl/at91.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
19 model = "Atmel AT91SAM9G45 family SoC";
20 compatible = "atmel,at91sam9g45";
21 interrupt-parent = <&aic>;
47 compatible = "arm,arm926ej-s";
53 reg = <0x70000000 0x10000000>;
57 compatible = "simple-bus";
63 compatible = "simple-bus";
68 aic: interrupt-controller@fffff000 {
69 #interrupt-cells = <3>;
70 compatible = "atmel,at91rm9200-aic";
72 reg = <0xfffff000 0x200>;
73 atmel,external-irqs = <31>;
76 ramc0: ramc@ffffe400 {
77 compatible = "atmel,at91sam9g45-ddramc";
78 reg = <0xffffe400 0x200
83 compatible = "atmel,at91rm9200-pmc";
84 reg = <0xfffffc00 0x100>;
88 compatible = "atmel,at91sam9g45-rstc";
89 reg = <0xfffffd00 0x10>;
93 compatible = "atmel,at91sam9260-pit";
94 reg = <0xfffffd30 0xf>;
95 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
100 compatible = "atmel,at91sam9rl-shdwc";
101 reg = <0xfffffd10 0x10>;
104 tcb0: timer@fff7c000 {
105 compatible = "atmel,at91rm9200-tcb";
106 reg = <0xfff7c000 0x100>;
107 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
110 tcb1: timer@fffd4000 {
111 compatible = "atmel,at91rm9200-tcb";
112 reg = <0xfffd4000 0x100>;
113 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
116 dma: dma-controller@ffffec00 {
117 compatible = "atmel,at91sam9g45-dma";
118 reg = <0xffffec00 0x200>;
119 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
124 #address-cells = <1>;
126 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
127 ranges = <0xfffff200 0xfffff200 0xa00>;
131 0xffffffff 0xffc003ff /* pioA */
132 0xffffffff 0x800f8f00 /* pioB */
133 0xffffffff 0x00000e00 /* pioC */
134 0xffffffff 0xff0c1381 /* pioD */
135 0xffffffff 0x81ffff81 /* pioE */
138 /* shared pinctrl settings */
140 pinctrl_adc0_adtrg: adc0_adtrg {
141 atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
143 pinctrl_adc0_ad0: adc0_ad0 {
144 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
146 pinctrl_adc0_ad1: adc0_ad1 {
147 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
149 pinctrl_adc0_ad2: adc0_ad2 {
150 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
152 pinctrl_adc0_ad3: adc0_ad3 {
153 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
155 pinctrl_adc0_ad4: adc0_ad4 {
156 atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
158 pinctrl_adc0_ad5: adc0_ad5 {
159 atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
161 pinctrl_adc0_ad6: adc0_ad6 {
162 atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
164 pinctrl_adc0_ad7: adc0_ad7 {
165 atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
170 pinctrl_dbgu: dbgu-0 {
172 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
173 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
178 pinctrl_i2c0: i2c0-0 {
180 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */
181 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
186 pinctrl_i2c1: i2c1-0 {
188 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */
189 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
194 pinctrl_usart0: usart0-0 {
196 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
197 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
200 pinctrl_usart0_rts: usart0_rts-0 {
202 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
205 pinctrl_usart0_cts: usart0_cts-0 {
207 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
212 pinctrl_usart1: usart1-0 {
214 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
215 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
218 pinctrl_usart1_rts: usart1_rts-0 {
220 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
223 pinctrl_usart1_cts: usart1_cts-0 {
225 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
230 pinctrl_usart2: usart2-0 {
232 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
233 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
236 pinctrl_usart2_rts: usart2_rts-0 {
238 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
241 pinctrl_usart2_cts: usart2_cts-0 {
243 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
248 pinctrl_usart3: usart3-0 {
250 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
251 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
254 pinctrl_usart3_rts: usart3_rts-0 {
256 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
259 pinctrl_usart3_cts: usart3_cts-0 {
261 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
266 pinctrl_nand: nand-0 {
268 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
269 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
274 pinctrl_macb_rmii: macb_rmii-0 {
276 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
277 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
278 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
279 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
280 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
281 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
282 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
283 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
284 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
285 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
288 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
290 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
291 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
292 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
293 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
294 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
295 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
296 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
297 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
302 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
304 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
305 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
306 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
309 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
311 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
312 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
313 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
316 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
318 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
319 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
320 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
321 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
326 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
328 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
329 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
330 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
333 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
335 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
336 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
337 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
340 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
342 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
343 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
344 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
345 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
350 pinctrl_ssc0_tx: ssc0_tx-0 {
352 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
353 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
354 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
357 pinctrl_ssc0_rx: ssc0_rx-0 {
359 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
360 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
361 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
366 pinctrl_ssc1_tx: ssc1_tx-0 {
368 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
369 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
370 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
373 pinctrl_ssc1_rx: ssc1_rx-0 {
375 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
376 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
377 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
382 pinctrl_spi0: spi0-0 {
384 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
385 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
386 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
391 pinctrl_spi1: spi1-0 {
393 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
394 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
395 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
400 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
401 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
404 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
405 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
408 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
409 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
412 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
413 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
416 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
417 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
420 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
421 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
424 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
425 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
428 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
429 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
432 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
433 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
438 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
439 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
442 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
443 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
446 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
447 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
450 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
451 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
454 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
455 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
458 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
459 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
462 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
463 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
466 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
467 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
470 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
471 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
478 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */
479 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */
480 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */
481 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */
482 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */
483 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */
484 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */
485 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */
486 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */
487 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */
488 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */
489 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */
490 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */
491 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */
492 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */
493 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */
494 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */
495 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */
496 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */
497 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */
498 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
499 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */
500 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
501 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
502 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
503 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
504 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
505 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
506 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
507 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
511 pioA: gpio@fffff200 {
512 compatible = "atmel,at91rm9200-gpio";
513 reg = <0xfffff200 0x200>;
514 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
517 interrupt-controller;
518 #interrupt-cells = <2>;
521 pioB: gpio@fffff400 {
522 compatible = "atmel,at91rm9200-gpio";
523 reg = <0xfffff400 0x200>;
524 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
527 interrupt-controller;
528 #interrupt-cells = <2>;
531 pioC: gpio@fffff600 {
532 compatible = "atmel,at91rm9200-gpio";
533 reg = <0xfffff600 0x200>;
534 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
537 interrupt-controller;
538 #interrupt-cells = <2>;
541 pioD: gpio@fffff800 {
542 compatible = "atmel,at91rm9200-gpio";
543 reg = <0xfffff800 0x200>;
544 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
547 interrupt-controller;
548 #interrupt-cells = <2>;
551 pioE: gpio@fffffa00 {
552 compatible = "atmel,at91rm9200-gpio";
553 reg = <0xfffffa00 0x200>;
554 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
557 interrupt-controller;
558 #interrupt-cells = <2>;
562 dbgu: serial@ffffee00 {
563 compatible = "atmel,at91sam9260-usart";
564 reg = <0xffffee00 0x200>;
565 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
566 pinctrl-names = "default";
567 pinctrl-0 = <&pinctrl_dbgu>;
571 usart0: serial@fff8c000 {
572 compatible = "atmel,at91sam9260-usart";
573 reg = <0xfff8c000 0x200>;
574 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
577 pinctrl-names = "default";
578 pinctrl-0 = <&pinctrl_usart0>;
582 usart1: serial@fff90000 {
583 compatible = "atmel,at91sam9260-usart";
584 reg = <0xfff90000 0x200>;
585 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
588 pinctrl-names = "default";
589 pinctrl-0 = <&pinctrl_usart1>;
593 usart2: serial@fff94000 {
594 compatible = "atmel,at91sam9260-usart";
595 reg = <0xfff94000 0x200>;
596 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
599 pinctrl-names = "default";
600 pinctrl-0 = <&pinctrl_usart2>;
604 usart3: serial@fff98000 {
605 compatible = "atmel,at91sam9260-usart";
606 reg = <0xfff98000 0x200>;
607 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
610 pinctrl-names = "default";
611 pinctrl-0 = <&pinctrl_usart3>;
615 macb0: ethernet@fffbc000 {
616 compatible = "cdns,at32ap7000-macb", "cdns,macb";
617 reg = <0xfffbc000 0x100>;
618 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
619 pinctrl-names = "default";
620 pinctrl-0 = <&pinctrl_macb_rmii>;
625 compatible = "atmel,at91sam9g10-i2c";
626 reg = <0xfff84000 0x100>;
627 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
628 pinctrl-names = "default";
629 pinctrl-0 = <&pinctrl_i2c0>;
630 #address-cells = <1>;
636 compatible = "atmel,at91sam9g10-i2c";
637 reg = <0xfff88000 0x100>;
638 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
639 pinctrl-names = "default";
640 pinctrl-0 = <&pinctrl_i2c1>;
641 #address-cells = <1>;
647 compatible = "atmel,at91sam9g45-ssc";
648 reg = <0xfff9c000 0x4000>;
649 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
650 pinctrl-names = "default";
651 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
656 compatible = "atmel,at91sam9g45-ssc";
657 reg = <0xfffa0000 0x4000>;
658 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
659 pinctrl-names = "default";
660 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
665 #address-cells = <1>;
667 compatible = "atmel,at91sam9g45-adc";
668 reg = <0xfffb0000 0x100>;
669 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
670 atmel,adc-channels-used = <0xff>;
671 atmel,adc-vref = <3300>;
672 atmel,adc-startup-time = <40>;
673 atmel,adc-res = <8 10>;
674 atmel,adc-res-names = "lowres", "highres";
675 atmel,adc-use-res = "highres";
679 trigger-name = "external-rising";
680 trigger-value = <0x1>;
685 trigger-name = "external-falling";
686 trigger-value = <0x2>;
692 trigger-name = "external-any";
693 trigger-value = <0x3>;
699 trigger-name = "continuous";
700 trigger-value = <0x6>;
705 compatible = "atmel,at91sam9rl-pwm";
706 reg = <0xfffb8000 0x300>;
707 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
713 compatible = "atmel,hsmci";
714 reg = <0xfff80000 0x600>;
715 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
716 pinctrl-names = "default";
717 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
719 #address-cells = <1>;
725 compatible = "atmel,hsmci";
726 reg = <0xfffd0000 0x600>;
727 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
728 pinctrl-names = "default";
729 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
731 #address-cells = <1>;
737 compatible = "atmel,at91sam9260-wdt";
738 reg = <0xfffffd40 0x10>;
739 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
740 atmel,watchdog-type = "hardware";
741 atmel,reset-type = "all";
748 #address-cells = <1>;
750 compatible = "atmel,at91rm9200-spi";
751 reg = <0xfffa4000 0x200>;
752 interrupts = <14 4 3>;
753 pinctrl-names = "default";
754 pinctrl-0 = <&pinctrl_spi0>;
759 #address-cells = <1>;
761 compatible = "atmel,at91rm9200-spi";
762 reg = <0xfffa8000 0x200>;
763 interrupts = <15 4 3>;
764 pinctrl-names = "default";
765 pinctrl-0 = <&pinctrl_spi1>;
769 usb2: gadget@fff78000 {
770 #address-cells = <1>;
772 compatible = "atmel,at91sam9rl-udc";
773 reg = <0x00600000 0x80000
775 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
780 atmel,fifo-size = <64>;
781 atmel,nb-banks = <1>;
786 atmel,fifo-size = <1024>;
787 atmel,nb-banks = <2>;
794 atmel,fifo-size = <1024>;
795 atmel,nb-banks = <2>;
802 atmel,fifo-size = <1024>;
803 atmel,nb-banks = <3>;
809 atmel,fifo-size = <1024>;
810 atmel,nb-banks = <3>;
816 atmel,fifo-size = <1024>;
817 atmel,nb-banks = <3>;
824 atmel,fifo-size = <1024>;
825 atmel,nb-banks = <3>;
833 compatible = "atmel,at91sam9g45-lcdc";
834 reg = <0x00500000 0x1000>;
835 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
836 pinctrl-names = "default";
837 pinctrl-0 = <&pinctrl_fb>;
841 nand0: nand@40000000 {
842 compatible = "atmel,at91rm9200-nand";
843 #address-cells = <1>;
845 reg = <0x40000000 0x10000000
848 atmel,nand-addr-offset = <21>;
849 atmel,nand-cmd-offset = <22>;
851 pinctrl-names = "default";
852 pinctrl-0 = <&pinctrl_nand>;
853 gpios = <&pioC 8 GPIO_ACTIVE_HIGH
854 &pioC 14 GPIO_ACTIVE_HIGH
860 usb0: ohci@00700000 {
861 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
862 reg = <0x00700000 0x100000>;
863 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
867 usb1: ehci@00800000 {
868 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
869 reg = <0x00800000 0x100000>;
870 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
876 compatible = "i2c-gpio";
877 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
878 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
880 i2c-gpio,sda-open-drain;
881 i2c-gpio,scl-open-drain;
882 i2c-gpio,delay-us = <5>; /* ~100 kHz */
883 #address-cells = <1>;