2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 #include "skeleton.dtsi"
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
18 model = "Atmel AT91SAM9G45 family SoC";
19 compatible = "atmel,at91sam9g45";
20 interrupt-parent = <&aic>;
42 compatible = "arm,arm926ejs";
47 reg = <0x70000000 0x10000000>;
51 compatible = "simple-bus";
57 compatible = "simple-bus";
62 aic: interrupt-controller@fffff000 {
63 #interrupt-cells = <3>;
64 compatible = "atmel,at91rm9200-aic";
66 reg = <0xfffff000 0x200>;
67 atmel,external-irqs = <31>;
70 ramc0: ramc@ffffe400 {
71 compatible = "atmel,at91sam9g45-ddramc";
72 reg = <0xffffe400 0x200
77 compatible = "atmel,at91rm9200-pmc";
78 reg = <0xfffffc00 0x100>;
82 compatible = "atmel,at91sam9g45-rstc";
83 reg = <0xfffffd00 0x10>;
87 compatible = "atmel,at91sam9260-pit";
88 reg = <0xfffffd30 0xf>;
89 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
94 compatible = "atmel,at91sam9rl-shdwc";
95 reg = <0xfffffd10 0x10>;
98 tcb0: timer@fff7c000 {
99 compatible = "atmel,at91rm9200-tcb";
100 reg = <0xfff7c000 0x100>;
101 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
104 tcb1: timer@fffd4000 {
105 compatible = "atmel,at91rm9200-tcb";
106 reg = <0xfffd4000 0x100>;
107 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
110 dma: dma-controller@ffffec00 {
111 compatible = "atmel,at91sam9g45-dma";
112 reg = <0xffffec00 0x200>;
113 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
118 #address-cells = <1>;
120 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
121 ranges = <0xfffff200 0xfffff200 0xa00>;
125 0xffffffff 0xffc003ff /* pioA */
126 0xffffffff 0x800f8f00 /* pioB */
127 0xffffffff 0x00000e00 /* pioC */
128 0xffffffff 0xff0c1381 /* pioD */
129 0xffffffff 0x81ffff81 /* pioE */
132 /* shared pinctrl settings */
134 pinctrl_dbgu: dbgu-0 {
136 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
137 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
142 pinctrl_usart0: usart0-0 {
144 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
145 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
148 pinctrl_usart0_rts: usart0_rts-0 {
150 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
153 pinctrl_usart0_cts: usart0_cts-0 {
155 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
160 pinctrl_usart1: usart1-0 {
162 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
163 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
166 pinctrl_usart1_rts: usart1_rts-0 {
168 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
171 pinctrl_usart1_cts: usart1_cts-0 {
173 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
178 pinctrl_usart2: usart2-0 {
180 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
181 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
184 pinctrl_usart2_rts: usart2_rts-0 {
186 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
189 pinctrl_usart2_cts: usart2_cts-0 {
191 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
196 pinctrl_usart3: usart3-0 {
198 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
199 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
202 pinctrl_usart3_rts: usart3_rts-0 {
204 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
207 pinctrl_usart3_cts: usart3_cts-0 {
209 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
214 pinctrl_nand: nand-0 {
216 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
217 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
222 pinctrl_macb_rmii: macb_rmii-0 {
224 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
225 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
226 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
227 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
228 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
229 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
230 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
231 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
232 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
233 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
236 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
238 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
239 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
240 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
241 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
242 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
243 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
244 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
245 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
250 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
252 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
253 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
254 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
257 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
259 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
260 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
261 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
264 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
266 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
267 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
268 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
269 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
274 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
276 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
277 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
278 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
281 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
283 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
284 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
285 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
288 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
290 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
291 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
292 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
293 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
298 pinctrl_ssc0_tx: ssc0_tx-0 {
300 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
301 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
302 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
305 pinctrl_ssc0_rx: ssc0_rx-0 {
307 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
308 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
309 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
314 pinctrl_ssc1_tx: ssc1_tx-0 {
316 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
317 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
318 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
321 pinctrl_ssc1_rx: ssc1_rx-0 {
323 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
324 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
325 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
330 pinctrl_spi0: spi0-0 {
332 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
333 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
334 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
339 pinctrl_spi1: spi1-0 {
341 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
342 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
343 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
347 pioA: gpio@fffff200 {
348 compatible = "atmel,at91rm9200-gpio";
349 reg = <0xfffff200 0x200>;
350 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
353 interrupt-controller;
354 #interrupt-cells = <2>;
357 pioB: gpio@fffff400 {
358 compatible = "atmel,at91rm9200-gpio";
359 reg = <0xfffff400 0x200>;
360 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
363 interrupt-controller;
364 #interrupt-cells = <2>;
367 pioC: gpio@fffff600 {
368 compatible = "atmel,at91rm9200-gpio";
369 reg = <0xfffff600 0x200>;
370 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
373 interrupt-controller;
374 #interrupt-cells = <2>;
377 pioD: gpio@fffff800 {
378 compatible = "atmel,at91rm9200-gpio";
379 reg = <0xfffff800 0x200>;
380 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
383 interrupt-controller;
384 #interrupt-cells = <2>;
387 pioE: gpio@fffffa00 {
388 compatible = "atmel,at91rm9200-gpio";
389 reg = <0xfffffa00 0x200>;
390 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
393 interrupt-controller;
394 #interrupt-cells = <2>;
398 dbgu: serial@ffffee00 {
399 compatible = "atmel,at91sam9260-usart";
400 reg = <0xffffee00 0x200>;
401 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
402 pinctrl-names = "default";
403 pinctrl-0 = <&pinctrl_dbgu>;
407 usart0: serial@fff8c000 {
408 compatible = "atmel,at91sam9260-usart";
409 reg = <0xfff8c000 0x200>;
410 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
413 pinctrl-names = "default";
414 pinctrl-0 = <&pinctrl_usart0>;
418 usart1: serial@fff90000 {
419 compatible = "atmel,at91sam9260-usart";
420 reg = <0xfff90000 0x200>;
421 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
424 pinctrl-names = "default";
425 pinctrl-0 = <&pinctrl_usart1>;
429 usart2: serial@fff94000 {
430 compatible = "atmel,at91sam9260-usart";
431 reg = <0xfff94000 0x200>;
432 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
435 pinctrl-names = "default";
436 pinctrl-0 = <&pinctrl_usart2>;
440 usart3: serial@fff98000 {
441 compatible = "atmel,at91sam9260-usart";
442 reg = <0xfff98000 0x200>;
443 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
446 pinctrl-names = "default";
447 pinctrl-0 = <&pinctrl_usart3>;
451 macb0: ethernet@fffbc000 {
452 compatible = "cdns,at32ap7000-macb", "cdns,macb";
453 reg = <0xfffbc000 0x100>;
454 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
455 pinctrl-names = "default";
456 pinctrl-0 = <&pinctrl_macb_rmii>;
461 compatible = "atmel,at91sam9g10-i2c";
462 reg = <0xfff84000 0x100>;
463 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
464 #address-cells = <1>;
470 compatible = "atmel,at91sam9g10-i2c";
471 reg = <0xfff88000 0x100>;
472 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
473 #address-cells = <1>;
479 compatible = "atmel,at91sam9g45-ssc";
480 reg = <0xfff9c000 0x4000>;
481 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
482 pinctrl-names = "default";
483 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
488 compatible = "atmel,at91sam9g45-ssc";
489 reg = <0xfffa0000 0x4000>;
490 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
491 pinctrl-names = "default";
492 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
497 compatible = "atmel,at91sam9260-adc";
498 reg = <0xfffb0000 0x100>;
499 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
500 atmel,adc-use-external-triggers;
501 atmel,adc-channels-used = <0xff>;
502 atmel,adc-vref = <3300>;
503 atmel,adc-num-channels = <8>;
504 atmel,adc-startup-time = <40>;
505 atmel,adc-channel-base = <0x30>;
506 atmel,adc-drdy-mask = <0x10000>;
507 atmel,adc-status-register = <0x1c>;
508 atmel,adc-trigger-register = <0x08>;
509 atmel,adc-res = <8 10>;
510 atmel,adc-res-names = "lowres", "highres";
511 atmel,adc-use-res = "highres";
514 trigger-name = "external-rising";
515 trigger-value = <0x1>;
519 trigger-name = "external-falling";
520 trigger-value = <0x2>;
525 trigger-name = "external-any";
526 trigger-value = <0x3>;
531 trigger-name = "continuous";
532 trigger-value = <0x6>;
537 compatible = "atmel,hsmci";
538 reg = <0xfff80000 0x600>;
539 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
542 #address-cells = <1>;
548 compatible = "atmel,hsmci";
549 reg = <0xfffd0000 0x600>;
550 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
553 #address-cells = <1>;
559 compatible = "atmel,at91sam9260-wdt";
560 reg = <0xfffffd40 0x10>;
565 #address-cells = <1>;
567 compatible = "atmel,at91rm9200-spi";
568 reg = <0xfffa4000 0x200>;
569 interrupts = <14 4 3>;
570 pinctrl-names = "default";
571 pinctrl-0 = <&pinctrl_spi0>;
576 #address-cells = <1>;
578 compatible = "atmel,at91rm9200-spi";
579 reg = <0xfffa8000 0x200>;
580 interrupts = <15 4 3>;
581 pinctrl-names = "default";
582 pinctrl-0 = <&pinctrl_spi1>;
587 nand0: nand@40000000 {
588 compatible = "atmel,at91rm9200-nand";
589 #address-cells = <1>;
591 reg = <0x40000000 0x10000000
594 atmel,nand-addr-offset = <21>;
595 atmel,nand-cmd-offset = <22>;
596 pinctrl-names = "default";
597 pinctrl-0 = <&pinctrl_nand>;
598 gpios = <&pioC 8 GPIO_ACTIVE_HIGH
599 &pioC 14 GPIO_ACTIVE_HIGH
605 usb0: ohci@00700000 {
606 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
607 reg = <0x00700000 0x100000>;
608 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
612 usb1: ehci@00800000 {
613 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
614 reg = <0x00800000 0x100000>;
615 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
621 compatible = "i2c-gpio";
622 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
623 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
625 i2c-gpio,sda-open-drain;
626 i2c-gpio,scl-open-drain;
627 i2c-gpio,delay-us = <5>; /* ~100 kHz */
628 #address-cells = <1>;