2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 /include/ "skeleton.dtsi"
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
35 compatible = "arm,arm926ejs";
40 reg = <0x70000000 0x10000000>;
44 compatible = "simple-bus";
50 compatible = "simple-bus";
55 aic: interrupt-controller@fffff000 {
56 #interrupt-cells = <2>;
57 compatible = "atmel,at91rm9200-aic";
60 reg = <0xfffff000 0x200>;
64 compatible = "atmel,at91sam9260-pit";
65 reg = <0xfffffd30 0xf>;
70 tcb0: timer@fff7c000 {
71 compatible = "atmel,at91rm9200-tcb";
72 reg = <0xfff7c000 0x100>;
76 tcb1: timer@fffd4000 {
77 compatible = "atmel,at91rm9200-tcb";
78 reg = <0xfffd4000 0x100>;
82 dma: dma-controller@ffffec00 {
83 compatible = "atmel,at91sam9g45-dma";
84 reg = <0xffffec00 0x200>;
89 compatible = "atmel,at91rm9200-gpio";
90 reg = <0xfffff200 0x100>;
98 compatible = "atmel,at91rm9200-gpio";
99 reg = <0xfffff400 0x100>;
103 interrupt-controller;
106 pioC: gpio@fffff600 {
107 compatible = "atmel,at91rm9200-gpio";
108 reg = <0xfffff600 0x100>;
112 interrupt-controller;
115 pioD: gpio@fffff800 {
116 compatible = "atmel,at91rm9200-gpio";
117 reg = <0xfffff800 0x100>;
121 interrupt-controller;
124 pioE: gpio@fffffa00 {
125 compatible = "atmel,at91rm9200-gpio";
126 reg = <0xfffffa00 0x100>;
130 interrupt-controller;
133 dbgu: serial@ffffee00 {
134 compatible = "atmel,at91sam9260-usart";
135 reg = <0xffffee00 0x200>;
140 usart0: serial@fff8c000 {
141 compatible = "atmel,at91sam9260-usart";
142 reg = <0xfff8c000 0x200>;
149 usart1: serial@fff90000 {
150 compatible = "atmel,at91sam9260-usart";
151 reg = <0xfff90000 0x200>;
158 usart2: serial@fff94000 {
159 compatible = "atmel,at91sam9260-usart";
160 reg = <0xfff94000 0x200>;
167 usart3: serial@fff98000 {
168 compatible = "atmel,at91sam9260-usart";
169 reg = <0xfff98000 0x200>;
176 macb0: ethernet@fffbc000 {
177 compatible = "cdns,at32ap7000-macb", "cdns,macb";
178 reg = <0xfffbc000 0x100>;
184 nand0: nand@40000000 {
185 compatible = "atmel,at91rm9200-nand";
186 #address-cells = <1>;
188 reg = <0x40000000 0x10000000
191 atmel,nand-addr-offset = <21>;
192 atmel,nand-cmd-offset = <22>;
202 compatible = "i2c-gpio";
203 gpios = <&pioA 20 0 /* sda */
206 i2c-gpio,sda-open-drain;
207 i2c-gpio,scl-open-drain;
208 i2c-gpio,delay-us = <5>; /* ~100 kHz */
209 #address-cells = <1>;