2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 #include "skeleton.dtsi"
13 #include <dt-bindings/dma/at91.h>
14 #include <dt-bindings/pinctrl/at91.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/at91.h>
20 model = "Atmel AT91SAM9G45 family SoC";
21 compatible = "atmel,at91sam9g45";
22 interrupt-parent = <&aic>;
48 compatible = "arm,arm926ej-s";
54 reg = <0x70000000 0x10000000>;
58 slow_xtal: slow_xtal {
59 compatible = "fixed-clock";
61 clock-frequency = <0>;
64 main_xtal: main_xtal {
65 compatible = "fixed-clock";
67 clock-frequency = <0>;
70 adc_op_clk: adc_op_clk{
71 compatible = "fixed-clock";
73 clock-frequency = <300000>;
78 compatible = "simple-bus";
84 compatible = "simple-bus";
89 aic: interrupt-controller@fffff000 {
90 #interrupt-cells = <3>;
91 compatible = "atmel,at91rm9200-aic";
93 reg = <0xfffff000 0x200>;
94 atmel,external-irqs = <31>;
97 ramc0: ramc@ffffe400 {
98 compatible = "atmel,at91sam9g45-ddramc";
99 reg = <0xffffe400 0x200>;
101 clock-names = "ddrck";
104 ramc1: ramc@ffffe600 {
105 compatible = "atmel,at91sam9g45-ddramc";
106 reg = <0xffffe600 0x200>;
108 clock-names = "ddrck";
112 compatible = "atmel,at91sam9g45-pmc";
113 reg = <0xfffffc00 0x100>;
114 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
115 interrupt-controller;
116 #address-cells = <1>;
118 #interrupt-cells = <1>;
121 compatible = "atmel,at91rm9200-clk-main-osc";
123 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
124 clocks = <&main_xtal>;
128 compatible = "atmel,at91rm9200-clk-main";
130 clocks = <&main_osc>;
134 compatible = "atmel,at91rm9200-clk-pll";
136 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
139 atmel,clk-input-range = <2000000 32000000>;
140 #atmel,pll-clk-output-range-cells = <4>;
141 atmel,pll-clk-output-ranges = <745000000 800000000 0 0
142 695000000 750000000 1 0
143 645000000 700000000 2 0
144 595000000 650000000 3 0
145 545000000 600000000 0 1
146 495000000 555000000 1 1
147 445000000 500000000 2 1
148 400000000 450000000 3 1>;
152 compatible = "atmel,at91sam9x5-clk-plldiv";
158 compatible = "atmel,at91sam9x5-clk-utmi";
160 interrupts-extended = <&pmc AT91_PMC_LOCKU>;
165 compatible = "atmel,at91rm9200-clk-master";
167 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
168 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
169 atmel,clk-output-range = <0 133333333>;
170 atmel,clk-divisors = <1 2 4 3>;
174 compatible = "atmel,at91sam9x5-clk-usb";
176 clocks = <&plladiv>, <&utmi>;
180 compatible = "atmel,at91sam9g45-clk-programmable";
181 #address-cells = <1>;
183 interrupt-parent = <&pmc>;
184 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
189 interrupts = <AT91_PMC_PCKRDY(0)>;
195 interrupts = <AT91_PMC_PCKRDY(1)>;
200 compatible = "atmel,at91rm9200-clk-system";
201 #address-cells = <1>;
230 compatible = "atmel,at91rm9200-clk-peripheral";
231 #address-cells = <1>;
250 pioDE_clk: pioDE_clk {
260 usart0_clk: usart0_clk {
265 usart1_clk: usart1_clk {
270 usart2_clk: usart2_clk {
275 usart3_clk: usart3_clk {
335 uhphs_clk: uhphs_clk {
350 macb0_clk: macb0_clk {
360 udphs_clk: udphs_clk {
365 aestdessha_clk: aestdessha_clk {
383 compatible = "atmel,at91sam9g45-rstc";
384 reg = <0xfffffd00 0x10>;
387 pit: timer@fffffd30 {
388 compatible = "atmel,at91sam9260-pit";
389 reg = <0xfffffd30 0xf>;
390 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
396 compatible = "atmel,at91sam9rl-shdwc";
397 reg = <0xfffffd10 0x10>;
400 tcb0: timer@fff7c000 {
401 compatible = "atmel,at91rm9200-tcb";
402 reg = <0xfff7c000 0x100>;
403 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
404 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>;
405 clock-names = "t0_clk", "t1_clk", "t2_clk";
408 tcb1: timer@fffd4000 {
409 compatible = "atmel,at91rm9200-tcb";
410 reg = <0xfffd4000 0x100>;
411 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
412 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>;
413 clock-names = "t0_clk", "t1_clk", "t2_clk";
416 dma: dma-controller@ffffec00 {
417 compatible = "atmel,at91sam9g45-dma";
418 reg = <0xffffec00 0x200>;
419 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
421 clocks = <&dma0_clk>;
422 clock-names = "dma_clk";
426 #address-cells = <1>;
428 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
429 ranges = <0xfffff200 0xfffff200 0xa00>;
433 0xffffffff 0xffc003ff /* pioA */
434 0xffffffff 0x800f8f00 /* pioB */
435 0xffffffff 0x00000e00 /* pioC */
436 0xffffffff 0xff0c1381 /* pioD */
437 0xffffffff 0x81ffff81 /* pioE */
440 /* shared pinctrl settings */
442 pinctrl_adc0_adtrg: adc0_adtrg {
443 atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
445 pinctrl_adc0_ad0: adc0_ad0 {
446 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
448 pinctrl_adc0_ad1: adc0_ad1 {
449 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
451 pinctrl_adc0_ad2: adc0_ad2 {
452 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
454 pinctrl_adc0_ad3: adc0_ad3 {
455 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
457 pinctrl_adc0_ad4: adc0_ad4 {
458 atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
460 pinctrl_adc0_ad5: adc0_ad5 {
461 atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
463 pinctrl_adc0_ad6: adc0_ad6 {
464 atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
466 pinctrl_adc0_ad7: adc0_ad7 {
467 atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
472 pinctrl_dbgu: dbgu-0 {
474 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
475 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
480 pinctrl_i2c0: i2c0-0 {
482 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */
483 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
488 pinctrl_i2c1: i2c1-0 {
490 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */
491 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
496 pinctrl_usart0: usart0-0 {
498 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
499 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
502 pinctrl_usart0_rts: usart0_rts-0 {
504 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
507 pinctrl_usart0_cts: usart0_cts-0 {
509 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
514 pinctrl_usart1: usart1-0 {
516 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
517 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
520 pinctrl_usart1_rts: usart1_rts-0 {
522 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
525 pinctrl_usart1_cts: usart1_cts-0 {
527 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
532 pinctrl_usart2: usart2-0 {
534 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
535 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
538 pinctrl_usart2_rts: usart2_rts-0 {
540 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
543 pinctrl_usart2_cts: usart2_cts-0 {
545 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
550 pinctrl_usart3: usart3-0 {
552 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
553 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
556 pinctrl_usart3_rts: usart3_rts-0 {
558 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
561 pinctrl_usart3_cts: usart3_cts-0 {
563 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
568 pinctrl_nand: nand-0 {
570 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
571 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
576 pinctrl_macb_rmii: macb_rmii-0 {
578 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
579 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
580 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
581 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
582 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
583 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
584 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
585 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
586 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
587 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
590 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
592 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
593 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
594 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
595 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
596 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
597 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
598 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
599 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
604 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
606 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
607 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
608 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
611 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
613 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
614 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
615 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
618 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
620 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
621 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
622 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
623 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
628 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
630 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
631 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
632 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
635 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
637 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
638 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
639 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
642 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
644 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
645 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
646 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
647 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
652 pinctrl_ssc0_tx: ssc0_tx-0 {
654 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
655 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
656 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
659 pinctrl_ssc0_rx: ssc0_rx-0 {
661 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
662 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
663 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
668 pinctrl_ssc1_tx: ssc1_tx-0 {
670 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
671 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
672 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
675 pinctrl_ssc1_rx: ssc1_rx-0 {
677 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
678 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
679 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
684 pinctrl_spi0: spi0-0 {
686 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
687 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
688 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
693 pinctrl_spi1: spi1-0 {
695 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
696 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
697 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
702 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
703 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
706 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
707 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
710 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
711 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
714 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
715 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
718 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
719 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
722 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
723 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
726 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
727 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
730 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
731 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
734 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
735 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
740 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
741 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
744 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
745 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
748 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
749 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
752 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
753 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
756 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
757 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
760 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
761 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
764 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
765 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
768 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
769 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
772 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
773 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
780 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */
781 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */
782 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */
783 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */
784 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */
785 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */
786 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */
787 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */
788 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */
789 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */
790 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */
791 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */
792 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */
793 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */
794 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */
795 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */
796 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */
797 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */
798 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */
799 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */
800 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
801 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */
802 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
803 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
804 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
805 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
806 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
807 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
808 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
809 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
813 pioA: gpio@fffff200 {
814 compatible = "atmel,at91rm9200-gpio";
815 reg = <0xfffff200 0x200>;
816 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
819 interrupt-controller;
820 #interrupt-cells = <2>;
821 clocks = <&pioA_clk>;
824 pioB: gpio@fffff400 {
825 compatible = "atmel,at91rm9200-gpio";
826 reg = <0xfffff400 0x200>;
827 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
830 interrupt-controller;
831 #interrupt-cells = <2>;
832 clocks = <&pioB_clk>;
835 pioC: gpio@fffff600 {
836 compatible = "atmel,at91rm9200-gpio";
837 reg = <0xfffff600 0x200>;
838 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
841 interrupt-controller;
842 #interrupt-cells = <2>;
843 clocks = <&pioC_clk>;
846 pioD: gpio@fffff800 {
847 compatible = "atmel,at91rm9200-gpio";
848 reg = <0xfffff800 0x200>;
849 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
852 interrupt-controller;
853 #interrupt-cells = <2>;
854 clocks = <&pioDE_clk>;
857 pioE: gpio@fffffa00 {
858 compatible = "atmel,at91rm9200-gpio";
859 reg = <0xfffffa00 0x200>;
860 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
863 interrupt-controller;
864 #interrupt-cells = <2>;
865 clocks = <&pioDE_clk>;
869 dbgu: serial@ffffee00 {
870 compatible = "atmel,at91sam9260-usart";
871 reg = <0xffffee00 0x200>;
872 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
873 pinctrl-names = "default";
874 pinctrl-0 = <&pinctrl_dbgu>;
876 clock-names = "usart";
880 usart0: serial@fff8c000 {
881 compatible = "atmel,at91sam9260-usart";
882 reg = <0xfff8c000 0x200>;
883 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
886 pinctrl-names = "default";
887 pinctrl-0 = <&pinctrl_usart0>;
888 clocks = <&usart0_clk>;
889 clock-names = "usart";
893 usart1: serial@fff90000 {
894 compatible = "atmel,at91sam9260-usart";
895 reg = <0xfff90000 0x200>;
896 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
899 pinctrl-names = "default";
900 pinctrl-0 = <&pinctrl_usart1>;
901 clocks = <&usart1_clk>;
902 clock-names = "usart";
906 usart2: serial@fff94000 {
907 compatible = "atmel,at91sam9260-usart";
908 reg = <0xfff94000 0x200>;
909 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
912 pinctrl-names = "default";
913 pinctrl-0 = <&pinctrl_usart2>;
914 clocks = <&usart2_clk>;
915 clock-names = "usart";
919 usart3: serial@fff98000 {
920 compatible = "atmel,at91sam9260-usart";
921 reg = <0xfff98000 0x200>;
922 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
925 pinctrl-names = "default";
926 pinctrl-0 = <&pinctrl_usart3>;
927 clocks = <&usart3_clk>;
928 clock-names = "usart";
932 macb0: ethernet@fffbc000 {
933 compatible = "cdns,at32ap7000-macb", "cdns,macb";
934 reg = <0xfffbc000 0x100>;
935 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
936 pinctrl-names = "default";
937 pinctrl-0 = <&pinctrl_macb_rmii>;
938 clocks = <&macb0_clk>, <&macb0_clk>;
939 clock-names = "hclk", "pclk";
944 compatible = "atmel,at91sam9g45-trng";
945 reg = <0xfffcc000 0x4000>;
946 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
947 clocks = <&trng_clk>;
951 compatible = "atmel,at91sam9g10-i2c";
952 reg = <0xfff84000 0x100>;
953 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
954 pinctrl-names = "default";
955 pinctrl-0 = <&pinctrl_i2c0>;
956 #address-cells = <1>;
958 clocks = <&twi0_clk>;
963 compatible = "atmel,at91sam9g10-i2c";
964 reg = <0xfff88000 0x100>;
965 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
966 pinctrl-names = "default";
967 pinctrl-0 = <&pinctrl_i2c1>;
968 #address-cells = <1>;
970 clocks = <&twi1_clk>;
975 compatible = "atmel,at91sam9g45-ssc";
976 reg = <0xfff9c000 0x4000>;
977 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
978 pinctrl-names = "default";
979 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
980 clocks = <&ssc0_clk>;
981 clock-names = "pclk";
986 compatible = "atmel,at91sam9g45-ssc";
987 reg = <0xfffa0000 0x4000>;
988 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
989 pinctrl-names = "default";
990 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
991 clocks = <&ssc1_clk>;
992 clock-names = "pclk";
997 #address-cells = <1>;
999 compatible = "atmel,at91sam9g45-adc";
1000 reg = <0xfffb0000 0x100>;
1001 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
1002 clocks = <&adc_clk>, <&adc_op_clk>;
1003 clock-names = "adc_clk", "adc_op_clk";
1004 atmel,adc-channels-used = <0xff>;
1005 atmel,adc-vref = <3300>;
1006 atmel,adc-startup-time = <40>;
1007 atmel,adc-res = <8 10>;
1008 atmel,adc-res-names = "lowres", "highres";
1009 atmel,adc-use-res = "highres";
1013 trigger-name = "external-rising";
1014 trigger-value = <0x1>;
1019 trigger-name = "external-falling";
1020 trigger-value = <0x2>;
1026 trigger-name = "external-any";
1027 trigger-value = <0x3>;
1033 trigger-name = "continuous";
1034 trigger-value = <0x6>;
1038 pwm0: pwm@fffb8000 {
1039 compatible = "atmel,at91sam9rl-pwm";
1040 reg = <0xfffb8000 0x300>;
1041 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
1043 clocks = <&pwm_clk>;
1044 status = "disabled";
1047 mmc0: mmc@fff80000 {
1048 compatible = "atmel,hsmci";
1049 reg = <0xfff80000 0x600>;
1050 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
1051 pinctrl-names = "default";
1052 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
1054 #address-cells = <1>;
1056 clocks = <&mci0_clk>;
1057 clock-names = "mci_clk";
1058 status = "disabled";
1061 mmc1: mmc@fffd0000 {
1062 compatible = "atmel,hsmci";
1063 reg = <0xfffd0000 0x600>;
1064 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
1065 pinctrl-names = "default";
1066 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
1068 #address-cells = <1>;
1070 clocks = <&mci1_clk>;
1071 clock-names = "mci_clk";
1072 status = "disabled";
1076 compatible = "atmel,at91sam9260-wdt";
1077 reg = <0xfffffd40 0x10>;
1078 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1079 atmel,watchdog-type = "hardware";
1080 atmel,reset-type = "all";
1083 status = "disabled";
1086 spi0: spi@fffa4000 {
1087 #address-cells = <1>;
1089 compatible = "atmel,at91rm9200-spi";
1090 reg = <0xfffa4000 0x200>;
1091 interrupts = <14 4 3>;
1092 pinctrl-names = "default";
1093 pinctrl-0 = <&pinctrl_spi0>;
1094 clocks = <&spi0_clk>;
1095 clock-names = "spi_clk";
1096 status = "disabled";
1099 spi1: spi@fffa8000 {
1100 #address-cells = <1>;
1102 compatible = "atmel,at91rm9200-spi";
1103 reg = <0xfffa8000 0x200>;
1104 interrupts = <15 4 3>;
1105 pinctrl-names = "default";
1106 pinctrl-0 = <&pinctrl_spi1>;
1107 clocks = <&spi1_clk>;
1108 clock-names = "spi_clk";
1109 status = "disabled";
1112 usb2: gadget@fff78000 {
1113 #address-cells = <1>;
1115 compatible = "atmel,at91sam9rl-udc";
1116 reg = <0x00600000 0x80000
1118 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
1119 clocks = <&udphs_clk>, <&utmi>;
1120 clock-names = "pclk", "hclk";
1121 status = "disabled";
1125 atmel,fifo-size = <64>;
1126 atmel,nb-banks = <1>;
1131 atmel,fifo-size = <1024>;
1132 atmel,nb-banks = <2>;
1139 atmel,fifo-size = <1024>;
1140 atmel,nb-banks = <2>;
1147 atmel,fifo-size = <1024>;
1148 atmel,nb-banks = <3>;
1154 atmel,fifo-size = <1024>;
1155 atmel,nb-banks = <3>;
1161 atmel,fifo-size = <1024>;
1162 atmel,nb-banks = <3>;
1169 atmel,fifo-size = <1024>;
1170 atmel,nb-banks = <3>;
1177 compatible = "atmel,at91sam9x5-sckc";
1178 reg = <0xfffffd50 0x4>;
1180 slow_osc: slow_osc {
1181 compatible = "atmel,at91sam9x5-clk-slow-osc";
1183 atmel,startup-time-usec = <1200000>;
1184 clocks = <&slow_xtal>;
1187 slow_rc_osc: slow_rc_osc {
1188 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1190 atmel,startup-time-usec = <75>;
1191 clock-frequency = <32768>;
1192 clock-accuracy = <50000000>;
1196 compatible = "atmel,at91sam9x5-clk-slow";
1198 clocks = <&slow_rc_osc &slow_osc>;
1203 compatible = "atmel,at91rm9200-rtc";
1204 reg = <0xfffffdb0 0x30>;
1205 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1206 status = "disabled";
1210 fb0: fb@0x00500000 {
1211 compatible = "atmel,at91sam9g45-lcdc";
1212 reg = <0x00500000 0x1000>;
1213 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
1214 pinctrl-names = "default";
1215 pinctrl-0 = <&pinctrl_fb>;
1216 clocks = <&lcd_clk>, <&lcd_clk>;
1217 clock-names = "hclk", "lcdc_clk";
1218 status = "disabled";
1221 nand0: nand@40000000 {
1222 compatible = "atmel,at91rm9200-nand";
1223 #address-cells = <1>;
1225 reg = <0x40000000 0x10000000
1228 atmel,nand-addr-offset = <21>;
1229 atmel,nand-cmd-offset = <22>;
1231 pinctrl-names = "default";
1232 pinctrl-0 = <&pinctrl_nand>;
1233 gpios = <&pioC 8 GPIO_ACTIVE_HIGH
1234 &pioC 14 GPIO_ACTIVE_HIGH
1237 status = "disabled";
1240 usb0: ohci@00700000 {
1241 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1242 reg = <0x00700000 0x100000>;
1243 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1245 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1246 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1247 status = "disabled";
1250 usb1: ehci@00800000 {
1251 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1252 reg = <0x00800000 0x100000>;
1253 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1255 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1256 clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck";
1257 status = "disabled";
1262 compatible = "i2c-gpio";
1263 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
1264 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
1266 i2c-gpio,sda-open-drain;
1267 i2c-gpio,scl-open-drain;
1268 i2c-gpio,delay-us = <5>; /* ~100 kHz */
1269 #address-cells = <1>;
1271 status = "disabled";