2 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
4 * Copyright (C) 2012 Atmel,
5 * 2012 Hong Xu <hong.xu@atmel.com>
7 * Licensed under GPLv2 or later.
10 #include "skeleton.dtsi"
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
18 model = "Atmel AT91SAM9N12 SoC";
19 compatible = "atmel,at91sam9n12";
20 interrupt-parent = <&aic>;
44 compatible = "arm,arm926ej-s";
50 reg = <0x20000000 0x10000000>;
54 slow_xtal: slow_xtal {
55 compatible = "fixed-clock";
57 clock-frequency = <0>;
60 main_xtal: main_xtal {
61 compatible = "fixed-clock";
63 clock-frequency = <0>;
68 compatible = "simple-bus";
74 compatible = "simple-bus";
79 aic: interrupt-controller@fffff000 {
80 #interrupt-cells = <3>;
81 compatible = "atmel,at91rm9200-aic";
83 reg = <0xfffff000 0x200>;
84 atmel,external-irqs = <31>;
87 ramc0: ramc@ffffe800 {
88 compatible = "atmel,at91sam9g45-ddramc";
89 reg = <0xffffe800 0x200>;
91 clock-names = "ddrck";
95 compatible = "atmel,at91sam9n12-pmc";
96 reg = <0xfffffc00 0x200>;
97 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
101 #interrupt-cells = <1>;
103 main_rc_osc: main_rc_osc {
104 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
106 interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
107 clock-frequency = <12000000>;
108 clock-accuracy = <50000000>;
112 compatible = "atmel,at91rm9200-clk-main-osc";
114 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
115 clocks = <&main_xtal>;
119 compatible = "atmel,at91sam9x5-clk-main";
121 interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
122 clocks = <&main_rc_osc>, <&main_osc>;
126 compatible = "atmel,at91rm9200-clk-pll";
128 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
131 atmel,clk-input-range = <2000000 32000000>;
132 #atmel,pll-clk-output-range-cells = <4>;
133 atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
134 <695000000 750000000 1 0>,
135 <645000000 700000000 2 0>,
136 <595000000 650000000 3 0>,
137 <545000000 600000000 0 1>,
138 <495000000 555000000 1 1>,
139 <445000000 500000000 2 1>,
140 <400000000 450000000 3 1>;
144 compatible = "atmel,at91sam9x5-clk-plldiv";
150 compatible = "atmel,at91rm9200-clk-pll";
152 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
155 atmel,clk-input-range = <2000000 32000000>;
156 #atmel,pll-clk-output-range-cells = <3>;
157 atmel,pll-clk-output-ranges = <30000000 100000000 0>;
161 compatible = "atmel,at91sam9x5-clk-master";
163 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
164 clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>;
165 atmel,clk-output-range = <0 133333333>;
166 atmel,clk-divisors = <1 2 4 3>;
167 atmel,master-clk-have-div3-pres;
171 compatible = "atmel,at91sam9n12-clk-usb";
177 compatible = "atmel,at91sam9x5-clk-programmable";
178 #address-cells = <1>;
180 interrupt-parent = <&pmc>;
181 clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>;
186 interrupts = <AT91_PMC_PCKRDY(0)>;
192 interrupts = <AT91_PMC_PCKRDY(1)>;
197 compatible = "atmel,at91rm9200-clk-system";
198 #address-cells = <1>;
239 compatible = "atmel,at91sam9x5-clk-peripheral";
240 #address-cells = <1>;
244 pioAB_clk: pioAB_clk {
249 pioCD_clk: pioCD_clk {
259 usart0_clk: usart0_clk {
264 usart1_clk: usart1_clk {
269 usart2_clk: usart2_clk {
274 usart3_clk: usart3_clk {
304 uart0_clk: uart0_clk {
309 uart1_clk: uart1_clk {
334 uhphs_clk: uhphs_clk {
339 udphs_clk: udphs_clk {
372 compatible = "atmel,at91sam9g45-rstc";
373 reg = <0xfffffe00 0x10>;
376 pit: timer@fffffe30 {
377 compatible = "atmel,at91sam9260-pit";
378 reg = <0xfffffe30 0xf>;
379 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
384 compatible = "atmel,at91sam9x5-shdwc";
385 reg = <0xfffffe10 0x10>;
389 compatible = "atmel,at91sam9x5-sckc";
390 reg = <0xfffffe50 0x4>;
393 compatible = "atmel,at91sam9x5-clk-slow-osc";
395 clocks = <&slow_xtal>;
398 slow_rc_osc: slow_rc_osc {
399 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
401 clock-frequency = <32768>;
402 clock-accuracy = <50000000>;
406 compatible = "atmel,at91sam9x5-clk-slow";
408 clocks = <&slow_rc_osc>, <&slow_osc>;
413 compatible = "atmel,hsmci";
414 reg = <0xf0008000 0x600>;
415 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
416 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
418 clocks = <&mci0_clk>;
419 clock-names = "mci_clk";
420 #address-cells = <1>;
425 tcb0: timer@f8008000 {
426 compatible = "atmel,at91sam9x5-tcb";
427 reg = <0xf8008000 0x100>;
428 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
430 clock-names = "t0_clk";
433 tcb1: timer@f800c000 {
434 compatible = "atmel,at91sam9x5-tcb";
435 reg = <0xf800c000 0x100>;
436 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
438 clock-names = "t0_clk";
441 dma: dma-controller@ffffec00 {
442 compatible = "atmel,at91sam9g45-dma";
443 reg = <0xffffec00 0x200>;
444 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
446 clocks = <&dma0_clk>;
447 clock-names = "dma_clk";
451 #address-cells = <1>;
453 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
454 ranges = <0xfffff400 0xfffff400 0x800>;
458 0xffffffff 0xffe07983 0x00000000 /* pioA */
459 0x00040000 0x00047e0f 0x00000000 /* pioB */
460 0xfdffffff 0x07c00000 0xb83fffff /* pioC */
461 0x003fffff 0x003f8000 0x00000000 /* pioD */
464 /* shared pinctrl settings */
466 pinctrl_dbgu: dbgu-0 {
468 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
469 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph with pullup */
474 pinctrl_usart0: usart0-0 {
476 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
477 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */
480 pinctrl_usart0_rts: usart0_rts-0 {
482 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
485 pinctrl_usart0_cts: usart0_cts-0 {
487 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
492 pinctrl_usart1: usart1-0 {
494 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
495 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
500 pinctrl_usart2: usart2-0 {
502 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
503 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */
506 pinctrl_usart2_rts: usart2_rts-0 {
508 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
511 pinctrl_usart2_cts: usart2_cts-0 {
513 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
518 pinctrl_usart3: usart3-0 {
520 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */
521 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
524 pinctrl_usart3_rts: usart3_rts-0 {
526 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
529 pinctrl_usart3_cts: usart3_cts-0 {
531 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
536 pinctrl_uart0: uart0-0 {
538 <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
539 AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */
544 pinctrl_uart1: uart1-0 {
546 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC17 periph C with pullup */
547 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */
552 pinctrl_nand: nand-0 {
554 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY pin pull_up*/
555 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD4 gpio enable pin pull_up */
560 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
562 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
563 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
564 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
567 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
569 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
570 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
571 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
574 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
576 <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
577 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
578 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */
579 AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */
584 pinctrl_ssc0_tx: ssc0_tx-0 {
586 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
587 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
588 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
591 pinctrl_ssc0_rx: ssc0_rx-0 {
593 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
594 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
595 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
600 pinctrl_spi0: spi0-0 {
602 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
603 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
604 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
609 pinctrl_spi1: spi1-0 {
611 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
612 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
613 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
618 pinctrl_i2c0: i2c0-0 {
620 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
621 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
626 pinctrl_i2c1: i2c1-0 {
628 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
629 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
634 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
635 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
638 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
639 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
642 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
643 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
646 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
647 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
650 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
651 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
654 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
655 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
658 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
659 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
662 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
663 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
666 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
667 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
672 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
673 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
676 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
677 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
680 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
681 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
684 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
685 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
688 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
689 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
692 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
693 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
696 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
697 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
700 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
701 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
704 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
705 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
709 pioA: gpio@fffff400 {
710 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
711 reg = <0xfffff400 0x200>;
712 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
715 interrupt-controller;
716 #interrupt-cells = <2>;
717 clocks = <&pioAB_clk>;
720 pioB: gpio@fffff600 {
721 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
722 reg = <0xfffff600 0x200>;
723 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
726 interrupt-controller;
727 #interrupt-cells = <2>;
728 clocks = <&pioAB_clk>;
731 pioC: gpio@fffff800 {
732 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
733 reg = <0xfffff800 0x200>;
734 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
737 interrupt-controller;
738 #interrupt-cells = <2>;
739 clocks = <&pioCD_clk>;
742 pioD: gpio@fffffa00 {
743 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
744 reg = <0xfffffa00 0x200>;
745 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
748 interrupt-controller;
749 #interrupt-cells = <2>;
750 clocks = <&pioCD_clk>;
754 dbgu: serial@fffff200 {
755 compatible = "atmel,at91sam9260-usart";
756 reg = <0xfffff200 0x200>;
757 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
758 pinctrl-names = "default";
759 pinctrl-0 = <&pinctrl_dbgu>;
761 clock-names = "usart";
766 compatible = "atmel,at91sam9g45-ssc";
767 reg = <0xf0010000 0x4000>;
768 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
769 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
770 <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
771 dma-names = "tx", "rx";
772 pinctrl-names = "default";
773 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
774 clocks = <&ssc0_clk>;
775 clock-names = "pclk";
779 usart0: serial@f801c000 {
780 compatible = "atmel,at91sam9260-usart";
781 reg = <0xf801c000 0x4000>;
782 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
783 pinctrl-names = "default";
784 pinctrl-0 = <&pinctrl_usart0>;
785 clocks = <&usart0_clk>;
786 clock-names = "usart";
790 usart1: serial@f8020000 {
791 compatible = "atmel,at91sam9260-usart";
792 reg = <0xf8020000 0x4000>;
793 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
794 pinctrl-names = "default";
795 pinctrl-0 = <&pinctrl_usart1>;
796 clocks = <&usart1_clk>;
797 clock-names = "usart";
801 usart2: serial@f8024000 {
802 compatible = "atmel,at91sam9260-usart";
803 reg = <0xf8024000 0x4000>;
804 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
805 pinctrl-names = "default";
806 pinctrl-0 = <&pinctrl_usart2>;
807 clocks = <&usart2_clk>;
808 clock-names = "usart";
812 usart3: serial@f8028000 {
813 compatible = "atmel,at91sam9260-usart";
814 reg = <0xf8028000 0x4000>;
815 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
816 pinctrl-names = "default";
817 pinctrl-0 = <&pinctrl_usart3>;
818 clocks = <&usart3_clk>;
819 clock-names = "usart";
824 compatible = "atmel,at91sam9x5-i2c";
825 reg = <0xf8010000 0x100>;
826 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
827 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
828 <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
829 dma-names = "tx", "rx";
830 #address-cells = <1>;
832 pinctrl-names = "default";
833 pinctrl-0 = <&pinctrl_i2c0>;
834 clocks = <&twi0_clk>;
839 compatible = "atmel,at91sam9x5-i2c";
840 reg = <0xf8014000 0x100>;
841 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
842 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
843 <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
844 dma-names = "tx", "rx";
845 #address-cells = <1>;
847 pinctrl-names = "default";
848 pinctrl-0 = <&pinctrl_i2c1>;
849 clocks = <&twi1_clk>;
854 #address-cells = <1>;
856 compatible = "atmel,at91rm9200-spi";
857 reg = <0xf0000000 0x100>;
858 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
859 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
860 <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
861 dma-names = "tx", "rx";
862 pinctrl-names = "default";
863 pinctrl-0 = <&pinctrl_spi0>;
864 clocks = <&spi0_clk>;
865 clock-names = "spi_clk";
870 #address-cells = <1>;
872 compatible = "atmel,at91rm9200-spi";
873 reg = <0xf0004000 0x100>;
874 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
875 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
876 <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
877 dma-names = "tx", "rx";
878 pinctrl-names = "default";
879 pinctrl-0 = <&pinctrl_spi1>;
880 clocks = <&spi1_clk>;
881 clock-names = "spi_clk";
886 compatible = "atmel,at91sam9260-wdt";
887 reg = <0xfffffe40 0x10>;
888 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
889 atmel,watchdog-type = "hardware";
890 atmel,reset-type = "all";
897 compatible = "atmel,at91sam9rl-pwm";
898 reg = <0xf8034000 0x300>;
899 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
906 nand0: nand@40000000 {
907 compatible = "atmel,at91rm9200-nand";
908 #address-cells = <1>;
910 reg = < 0x40000000 0x10000000
911 0xffffe000 0x00000600
912 0xffffe600 0x00000200
913 0x00108000 0x00018000
915 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
916 atmel,nand-addr-offset = <21>;
917 atmel,nand-cmd-offset = <22>;
919 pinctrl-names = "default";
920 pinctrl-0 = <&pinctrl_nand>;
921 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
922 &pioD 4 GPIO_ACTIVE_HIGH
928 usb0: ohci@00500000 {
929 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
930 reg = <0x00500000 0x00100000>;
931 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
932 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
934 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
940 compatible = "i2c-gpio";
941 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
942 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
944 i2c-gpio,sda-open-drain;
945 i2c-gpio,scl-open-drain;
946 i2c-gpio,delay-us = <2>; /* ~100 kHz */
947 #address-cells = <1>;