arch/arm/boot/dts/at91sam9n12.dtsi

   1 /*
   2  * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
   3  *
   4  *  Copyright (C) 2012 Atmel,
   5  *                2012 Hong Xu <hong.xu@atmel.com>
   6  *
   7  * Licensed under GPLv2 or later.
   8  */
   9
  10 /include/ "skeleton.dtsi"
  11
  12 / {
  13         model = "Atmel AT91SAM9N12 SoC";
  14         compatible = "atmel,at91sam9n12";
  15         interrupt-parent = <&aic>;
  16
  17         aliases {
  18                 serial0 = &dbgu;
  19                 serial1 = &usart0;
  20                 serial2 = &usart1;
  21                 serial3 = &usart2;
  22                 serial4 = &usart3;
  23                 gpio0 = &pioA;
  24                 gpio1 = &pioB;
  25                 gpio2 = &pioC;
  26                 gpio3 = &pioD;
  27                 tcb0 = &tcb0;
  28                 tcb1 = &tcb1;
  29                 i2c0 = &i2c0;
  30                 i2c1 = &i2c1;
  31         };
  32         cpus {
  33                 cpu@0 {
  34                         compatible = "arm,arm926ejs";
  35                 };
  36         };
  37
  38         memory {
  39                 reg = <0x20000000 0x10000000>;
  40         };
  41
  42         ahb {
  43                 compatible = "simple-bus";
  44                 #address-cells = <1>;
  45                 #size-cells = <1>;
  46                 ranges;
  47
  48                 apb {
  49                         compatible = "simple-bus";
  50                         #address-cells = <1>;
  51                         #size-cells = <1>;
  52                         ranges;
  53
  54                         aic: interrupt-controller@fffff000 {
  55                                 #interrupt-cells = <3>;
  56                                 compatible = "atmel,at91rm9200-aic";
  57                                 interrupt-controller;
  58                                 reg = <0xfffff000 0x200>;
  59                         };
  60
  61                         ramc0: ramc@ffffe800 {
  62                                 compatible = "atmel,at91sam9g45-ddramc";
  63                                 reg = <0xffffe800 0x200>;
  64                         };
  65
  66                         pmc: pmc@fffffc00 {
  67                                 compatible = "atmel,at91rm9200-pmc";
  68                                 reg = <0xfffffc00 0x100>;
  69                         };
  70
  71                         rstc@fffffe00 {
  72                                 compatible = "atmel,at91sam9g45-rstc";
  73                                 reg = <0xfffffe00 0x10>;
  74                         };
  75
  76                         pit: timer@fffffe30 {
  77                                 compatible = "atmel,at91sam9260-pit";
  78                                 reg = <0xfffffe30 0xf>;
  79                                 interrupts = <1 4 7>;
  80                         };
  81
  82                         shdwc@fffffe10 {
  83                                 compatible = "atmel,at91sam9x5-shdwc";
  84                                 reg = <0xfffffe10 0x10>;
  85                         };
  86
  87                         tcb0: timer@f8008000 {
  88                                 compatible = "atmel,at91sam9x5-tcb";
  89                                 reg = <0xf8008000 0x100>;
  90                                 interrupts = <17 4 0>;
  91                         };
  92
  93                         tcb1: timer@f800c000 {
  94                                 compatible = "atmel,at91sam9x5-tcb";
  95                                 reg = <0xf800c000 0x100>;
  96                                 interrupts = <17 4 0>;
  97                         };
  98
  99                         dma: dma-controller@ffffec00 {
 100                                 compatible = "atmel,at91sam9g45-dma";
 101                                 reg = <0xffffec00 0x200>;
 102                                 interrupts = <20 4 0>;
 103                         };
 104
 105                         pinctrl@fffff400 {
 106                                 #address-cells = <1>;
 107                                 #size-cells = <1>;
 108                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 109                                 ranges = <0xfffff400 0xfffff400 0x800>;
 110
 111                                 atmel,mux-mask = <
 112                                       /*    A         B          C     */
 113                                        0xffffffff 0xffe07983 0x00000000  /* pioA */
 114                                        0x00040000 0x00047e0f 0x00000000  /* pioB */
 115                                        0xfdffffff 0x07c00000 0xb83fffff  /* pioC */
 116                                        0x003fffff 0x003f8000 0x00000000  /* pioD */
 117                                       >;
 118
 119                                 /* shared pinctrl settings */
 120                                 dbgu {
 121                                         pinctrl_dbgu: dbgu-0 {
 122                                                 atmel,pins =
 123                                                         <0 9 0x1 0x0    /* PA9 periph A */
 124                                                          0 10 0x1 0x1>; /* PA10 periph with pullup */
 125                                         };
 126                                 };
 127
 128                                 uart0 {
 129                                         pinctrl_uart0: uart0-0 {
 130                                                 atmel,pins =
 131                                                         <0 1 0x1 0x1    /* PA1 periph A with pullup */
 132                                                          0 0 0x1 0x0>;  /* PA0 periph A */
 133                                         };
 134
 135                                         pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
 136                                                 atmel,pins =
 137                                                         <0 2 0x1 0x0    /* PA2 periph A */
 138                                                          0 3 0x1 0x0>;  /* PA3 periph A */
 139                                         };
 140                                 };
 141
 142                                 uart1 {
 143                                         pinctrl_uart1: uart1-0 {
 144                                                 atmel,pins =
 145                                                         <0 6 0x1 0x1    /* PA6 periph A with pullup */
 146                                                          0 5 0x1 0x0>;  /* PA5 periph A */
 147                                         };
 148                                 };
 149
 150                                 uart2 {
 151                                         pinctrl_uart2: uart2-0 {
 152                                                 atmel,pins =
 153                                                         <0 8 0x1 0x1    /* PA8 periph A with pullup */
 154                                                          0 7 0x1 0x0>;  /* PA7 periph A */
 155                                         };
 156
 157                                         pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
 158                                                 atmel,pins =
 159                                                         <1 0 0x2 0x0    /* PB0 periph B */
 160                                                          1 1 0x2 0x0>;  /* PB1 periph B */
 161                                         };
 162                                 };
 163
 164                                 uart3 {
 165                                         pinctrl_uart3: uart3-0 {
 166                                                 atmel,pins =
 167                                                         <2 23 0x2 0x1   /* PC23 periph B with pullup */
 168                                                          2 22 0x2 0x0>; /* PC22 periph B */
 169                                         };
 170
 171                                         pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
 172                                                 atmel,pins =
 173                                                         <2 24 0x2 0x0   /* PC24 periph B */
 174                                                          2 25 0x2 0x0>; /* PC25 periph B */
 175                                         };
 176                                 };
 177
 178                                 usart0 {
 179                                         pinctrl_usart0: usart0-0 {
 180                                                 atmel,pins =
 181                                                         <2 9 0x3 0x1    /* PC9 periph C with pullup */
 182                                                          2 8 0x3 0x0>;  /* PC8 periph C */
 183                                         };
 184                                 };
 185
 186                                 usart1 {
 187                                         pinctrl_usart1: usart1-0 {
 188                                                 atmel,pins =
 189                                                         <2 16 0x3 0x1   /* PC17 periph C with pullup */
 190                                                          2 17 0x3 0x0>; /* PC16 periph C */
 191                                         };
 192                                 };
 193
 194                                 nand {
 195                                         pinctrl_nand: nand-0 {
 196                                                 atmel,pins =
 197                                                         <3 5 0x0 0x1    /* PD5 gpio RDY pin pull_up*/
 198                                                          3 4 0x0 0x1>;  /* PD4 gpio enable pin pull_up */
 199                                         };
 200                                 };
 201
 202                                 pioA: gpio@fffff400 {
 203                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 204                                         reg = <0xfffff400 0x200>;
 205                                         interrupts = <2 4 1>;
 206                                         #gpio-cells = <2>;
 207                                         gpio-controller;
 208                                         interrupt-controller;
 209                                         #interrupt-cells = <2>;
 210                                 };
 211
 212                                 pioB: gpio@fffff600 {
 213                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 214                                         reg = <0xfffff600 0x200>;
 215                                         interrupts = <2 4 1>;
 216                                         #gpio-cells = <2>;
 217                                         gpio-controller;
 218                                         interrupt-controller;
 219                                         #interrupt-cells = <2>;
 220                                 };
 221
 222                                 pioC: gpio@fffff800 {
 223                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 224                                         reg = <0xfffff800 0x200>;
 225                                         interrupts = <3 4 1>;
 226                                         #gpio-cells = <2>;
 227                                         gpio-controller;
 228                                         interrupt-controller;
 229                                         #interrupt-cells = <2>;
 230                                 };
 231
 232                                 pioD: gpio@fffffa00 {
 233                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 234                                         reg = <0xfffffa00 0x200>;
 235                                         interrupts = <3 4 1>;
 236                                         #gpio-cells = <2>;
 237                                         gpio-controller;
 238                                         interrupt-controller;
 239                                         #interrupt-cells = <2>;
 240                                 };
 241                         };
 242
 243                         dbgu: serial@fffff200 {
 244                                 compatible = "atmel,at91sam9260-usart";
 245                                 reg = <0xfffff200 0x200>;
 246                                 interrupts = <1 4 7>;
 247                                 pinctrl-names = "default";
 248                                 pinctrl-0 = <&pinctrl_dbgu>;
 249                                 status = "disabled";
 250                         };
 251
 252                         usart0: serial@f801c000 {
 253                                 compatible = "atmel,at91sam9260-usart";
 254                                 reg = <0xf801c000 0x4000>;
 255                                 interrupts = <5 4 5>;
 256                                 atmel,use-dma-rx;
 257                                 atmel,use-dma-tx;
 258                                 pinctrl-names = "default";
 259                                 pinctrl-0 = <&pinctrl_uart0>;
 260                                 status = "disabled";
 261                         };
 262
 263                         usart1: serial@f8020000 {
 264                                 compatible = "atmel,at91sam9260-usart";
 265                                 reg = <0xf8020000 0x4000>;
 266                                 interrupts = <6 4 5>;
 267                                 atmel,use-dma-rx;
 268                                 atmel,use-dma-tx;
 269                                 pinctrl-names = "default";
 270                                 pinctrl-0 = <&pinctrl_uart1>;
 271                                 status = "disabled";
 272                         };
 273
 274                         usart2: serial@f8024000 {
 275                                 compatible = "atmel,at91sam9260-usart";
 276                                 reg = <0xf8024000 0x4000>;
 277                                 interrupts = <7 4 5>;
 278                                 atmel,use-dma-rx;
 279                                 atmel,use-dma-tx;
 280                                 pinctrl-names = "default";
 281                                 pinctrl-0 = <&pinctrl_uart2>;
 282                                 status = "disabled";
 283                         };
 284
 285                         usart3: serial@f8028000 {
 286                                 compatible = "atmel,at91sam9260-usart";
 287                                 reg = <0xf8028000 0x4000>;
 288                                 interrupts = <8 4 5>;
 289                                 atmel,use-dma-rx;
 290                                 atmel,use-dma-tx;
 291                                 pinctrl-names = "default";
 292                                 pinctrl-0 = <&pinctrl_uart3>;
 293                                 status = "disabled";
 294                         };
 295
 296                         i2c0: i2c@f8010000 {
 297                                 compatible = "atmel,at91sam9x5-i2c";
 298                                 reg = <0xf8010000 0x100>;
 299                                 interrupts = <9 4 6>;
 300                                 #address-cells = <1>;
 301                                 #size-cells = <0>;
 302                                 status = "disabled";
 303                         };
 304
 305                         i2c1: i2c@f8014000 {
 306                                 compatible = "atmel,at91sam9x5-i2c";
 307                                 reg = <0xf8014000 0x100>;
 308                                 interrupts = <10 4 6>;
 309                                 #address-cells = <1>;
 310                                 #size-cells = <0>;
 311                                 status = "disabled";
 312                         };
 313                 };
 314
 315                 nand0: nand@40000000 {
 316                         compatible = "atmel,at91rm9200-nand";
 317                         #address-cells = <1>;
 318                         #size-cells = <1>;
 319                         reg = < 0x40000000 0x10000000
 320                                 0xffffe000 0x00000600
 321                                 0xffffe600 0x00000200
 322                                 0x00100000 0x00100000
 323                                >;
 324                         atmel,nand-addr-offset = <21>;
 325                         atmel,nand-cmd-offset = <22>;
 326                         pinctrl-names = "default";
 327                         pinctrl-0 = <&pinctrl_nand>;
 328                         gpios = <&pioD 5 0
 329                                  &pioD 4 0
 330                                  0
 331                                 >;
 332                         status = "disabled";
 333                 };
 334
 335                 usb0: ohci@00500000 {
 336                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 337                         reg = <0x00500000 0x00100000>;
 338                         interrupts = <22 4 2>;
 339                         status = "disabled";
 340                 };
 341         };
 342
 343         i2c@0 {
 344                 compatible = "i2c-gpio";
 345                 gpios = <&pioA 30 0 /* sda */
 346                          &pioA 31 0 /* scl */
 347                         >;
 348                 i2c-gpio,sda-open-drain;
 349                 i2c-gpio,scl-open-drain;
 350                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 351                 #address-cells = <1>;
 352                 #size-cells = <0>;
 353                 status = "disabled";
 354         };
 355 };