2 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
4 * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
6 * Licensed under GPLv2 or later.
9 #include "skeleton.dtsi"
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/pwm/pwm.h>
17 model = "Atmel AT91SAM9RL family SoC";
18 compatible = "atmel,at91sam9rl", "atmel,at91sam9";
19 interrupt-parent = <&aic>;
44 compatible = "arm,arm926ej-s";
50 reg = <0x20000000 0x04000000>;
54 slow_xtal: slow_xtal {
55 compatible = "fixed-clock";
57 clock-frequency = <0>;
60 main_xtal: main_xtal {
61 compatible = "fixed-clock";
63 clock-frequency = <0>;
66 adc_op_clk: adc_op_clk{
67 compatible = "fixed-clock";
69 clock-frequency = <1000000>;
74 compatible = "simple-bus";
80 compatible = "atmel,at91sam9rl-lcdc";
81 reg = <0x00500000 0x1000>;
82 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_fb>;
85 clocks = <&lcd_clk>, <&lcd_clk>;
86 clock-names = "hclk", "lcdc_clk";
90 nand0: nand@40000000 {
91 compatible = "atmel,at91rm9200-nand";
94 reg = <0x40000000 0x10000000>,
96 atmel,nand-addr-offset = <21>;
97 atmel,nand-cmd-offset = <22>;
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_nand>;
101 gpios = <&pioD 17 GPIO_ACTIVE_HIGH>,
102 <&pioB 6 GPIO_ACTIVE_HIGH>,
108 compatible = "simple-bus";
109 #address-cells = <1>;
113 tcb0: timer@fffa0000 {
114 compatible = "atmel,at91rm9200-tcb";
115 reg = <0xfffa0000 0x100>;
116 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
117 <17 IRQ_TYPE_LEVEL_HIGH 0>,
118 <18 IRQ_TYPE_LEVEL_HIGH 0>;
119 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
120 clock-names = "t0_clk", "t1_clk", "t2_clk";
124 compatible = "atmel,hsmci";
125 reg = <0xfffa4000 0x600>;
126 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
127 #address-cells = <1>;
129 pinctrl-names = "default";
130 clocks = <&mci0_clk>;
131 clock-names = "mci_clk";
136 compatible = "atmel,at91sam9260-i2c";
137 reg = <0xfffa8000 0x100>;
138 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
139 #address-cells = <1>;
141 clocks = <&twi0_clk>;
146 compatible = "atmel,at91sam9260-i2c";
147 reg = <0xfffac000 0x100>;
148 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
149 #address-cells = <1>;
154 usart0: serial@fffb0000 {
155 compatible = "atmel,at91sam9260-usart";
156 reg = <0xfffb0000 0x200>;
157 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_usart0>;
162 clocks = <&usart0_clk>;
163 clock-names = "usart";
167 usart1: serial@fffb4000 {
168 compatible = "atmel,at91sam9260-usart";
169 reg = <0xfffb4000 0x200>;
170 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_usart1>;
175 clocks = <&usart1_clk>;
176 clock-names = "usart";
180 usart2: serial@fffb8000 {
181 compatible = "atmel,at91sam9260-usart";
182 reg = <0xfffb8000 0x200>;
183 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
186 pinctrl-names = "default";
187 pinctrl-0 = <&pinctrl_usart2>;
188 clocks = <&usart2_clk>;
189 clock-names = "usart";
193 usart3: serial@fffbc000 {
194 compatible = "atmel,at91sam9260-usart";
195 reg = <0xfffbc000 0x200>;
196 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
199 pinctrl-names = "default";
200 pinctrl-0 = <&pinctrl_usart3>;
201 clocks = <&usart3_clk>;
202 clock-names = "usart";
207 compatible = "atmel,at91sam9rl-ssc";
208 reg = <0xfffc0000 0x4000>;
209 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
210 pinctrl-names = "default";
211 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
216 compatible = "atmel,at91sam9rl-ssc";
217 reg = <0xfffc4000 0x4000>;
218 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
219 pinctrl-names = "default";
220 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
225 compatible = "atmel,at91sam9rl-pwm";
226 reg = <0xfffc8000 0x300>;
227 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
230 clock-names = "pwm_clk";
235 #address-cells = <1>;
237 compatible = "atmel,at91rm9200-spi";
238 reg = <0xfffcc000 0x200>;
239 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&pinctrl_spi0>;
242 clocks = <&spi0_clk>;
243 clock-names = "spi_clk";
248 #address-cells = <1>;
250 compatible = "atmel,at91sam9rl-adc";
251 reg = <0xfffd0000 0x100>;
252 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
253 clocks = <&adc_clk>, <&adc_op_clk>;
254 clock-names = "adc_clk", "adc_op_clk";
255 atmel,adc-use-external-triggers;
256 atmel,adc-channels-used = <0x3f>;
257 atmel,adc-vref = <3300>;
258 atmel,adc-startup-time = <40>;
259 atmel,adc-res = <8 10>;
260 atmel,adc-res-names = "lowres", "highres";
261 atmel,adc-use-res = "highres";
265 trigger-name = "timer-counter-0";
266 trigger-value = <0x1>;
270 trigger-name = "timer-counter-1";
271 trigger-value = <0x3>;
276 trigger-name = "timer-counter-2";
277 trigger-value = <0x5>;
282 trigger-name = "external";
283 trigger-value = <0x13>;
288 usb0: gadget@fffd4000 {
289 #address-cells = <1>;
291 compatible = "atmel,at91sam9rl-udc";
292 reg = <0x00600000 0x100000>,
294 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
295 clocks = <&udphs_clk>, <&utmi>;
296 clock-names = "pclk", "hclk";
301 atmel,fifo-size = <64>;
302 atmel,nb-banks = <1>;
307 atmel,fifo-size = <1024>;
308 atmel,nb-banks = <2>;
315 atmel,fifo-size = <1024>;
316 atmel,nb-banks = <2>;
323 atmel,fifo-size = <1024>;
324 atmel,nb-banks = <3>;
330 atmel,fifo-size = <1024>;
331 atmel,nb-banks = <3>;
337 atmel,fifo-size = <1024>;
338 atmel,nb-banks = <3>;
345 atmel,fifo-size = <1024>;
346 atmel,nb-banks = <3>;
352 dma0: dma-controller@ffffe600 {
353 compatible = "atmel,at91sam9rl-dma";
354 reg = <0xffffe600 0x200>;
355 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
357 clocks = <&dma0_clk>;
358 clock-names = "dma_clk";
361 ramc0: ramc@ffffea00 {
362 compatible = "atmel,at91sam9260-sdramc";
363 reg = <0xffffea00 0x200>;
366 aic: interrupt-controller@fffff000 {
367 #interrupt-cells = <3>;
368 compatible = "atmel,at91rm9200-aic";
369 interrupt-controller;
370 reg = <0xfffff000 0x200>;
371 atmel,external-irqs = <31>;
374 dbgu: serial@fffff200 {
375 compatible = "atmel,at91sam9260-usart";
376 reg = <0xfffff200 0x200>;
377 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
378 pinctrl-names = "default";
379 pinctrl-0 = <&pinctrl_dbgu>;
381 clock-names = "usart";
386 #address-cells = <1>;
388 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
389 ranges = <0xfffff400 0xfffff400 0x800>;
393 <0xffffffff 0xe05c6738>, /* pioA */
394 <0xffffffff 0x0000c780>, /* pioB */
395 <0xffffffff 0xe3ffff0e>, /* pioC */
396 <0x003fffff 0x0001ff3c>; /* pioD */
398 /* shared pinctrl settings */
400 pinctrl_adc0_ts: adc0_ts-0 {
402 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
403 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
404 <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
405 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
408 pinctrl_adc0_ad0: adc0_ad0-0 {
409 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
412 pinctrl_adc0_ad1: adc0_ad1-0 {
413 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
416 pinctrl_adc0_ad2: adc0_ad2-0 {
417 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;
420 pinctrl_adc0_ad3: adc0_ad3-0 {
421 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
424 pinctrl_adc0_ad4: adc0_ad4-0 {
425 atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
428 pinctrl_adc0_ad5: adc0_ad5-0 {
429 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
432 pinctrl_adc0_adtrg: adc0_adtrg-0 {
433 atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
438 pinctrl_dbgu: dbgu-0 {
440 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
441 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
448 <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>,
449 <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
450 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>,
451 <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
452 <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
453 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
454 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
455 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>,
456 <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>,
457 <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
458 <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>,
459 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>,
460 <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
461 <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
462 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>,
463 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
464 <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
465 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>,
466 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
467 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
468 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
473 pinctrl_i2c_gpio0: i2c_gpio0-0 {
475 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
476 <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
481 pinctrl_i2c_gpio1: i2c_gpio1-0 {
483 <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
484 <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
489 pinctrl_mmc0_clk: mmc0_clk-0 {
491 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
494 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
496 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
497 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
500 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
502 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
503 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
504 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
509 pinctrl_nand: nand-0 {
511 <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
512 <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
515 pinctrl_nand0_ale_cle: nand_ale_cle-0 {
517 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
518 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
521 pinctrl_nand0_oe_we: nand_oe_we-0 {
523 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
524 <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
527 pinctrl_nand0_cs: nand_cs-0 {
529 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
534 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
535 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
538 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
539 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
542 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
543 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
546 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
547 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
550 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
551 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
554 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
555 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
558 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
559 atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
562 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
563 atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
566 pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
567 atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
570 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
571 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
574 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
575 atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
580 pinctrl_spi0: spi0-0 {
582 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
583 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
584 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
589 pinctrl_ssc0_tx: ssc0_tx-0 {
591 <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
592 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
593 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
596 pinctrl_ssc0_rx: ssc0_rx-0 {
598 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
599 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
600 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
605 pinctrl_ssc1_tx: ssc1_tx-0 {
607 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
608 <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
609 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
612 pinctrl_ssc1_rx: ssc1_rx-0 {
614 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
615 <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
616 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
621 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
622 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
625 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
626 atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
629 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
630 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
633 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
634 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
637 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
638 atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
641 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
642 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
645 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
646 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
649 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
650 atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
653 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
654 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
659 pinctrl_usart0: usart0-0 {
661 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
662 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
665 pinctrl_usart0_rts: usart0_rts-0 {
667 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
670 pinctrl_usart0_cts: usart0_cts-0 {
672 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
675 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
677 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
678 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
681 pinctrl_usart0_dcd: usart0_dcd-0 {
683 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
686 pinctrl_usart0_ri: usart0_ri-0 {
688 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
691 pinctrl_usart0_sck: usart0_sck-0 {
693 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
698 pinctrl_usart1: usart1-0 {
700 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
701 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
704 pinctrl_usart1_rts: usart1_rts-0 {
706 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
709 pinctrl_usart1_cts: usart1_cts-0 {
711 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
714 pinctrl_usart1_sck: usart1_sck-0 {
716 <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
721 pinctrl_usart2: usart2-0 {
723 <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
724 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
727 pinctrl_usart2_rts: usart2_rts-0 {
729 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
732 pinctrl_usart2_cts: usart2_cts-0 {
734 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
737 pinctrl_usart2_sck: usart2_sck-0 {
739 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
744 pinctrl_usart3: usart3-0 {
746 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
747 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
750 pinctrl_usart3_rts: usart3_rts-0 {
752 <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
755 pinctrl_usart3_cts: usart3_cts-0 {
757 <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
760 pinctrl_usart3_sck: usart3_sck-0 {
762 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
766 pioA: gpio@fffff400 {
767 compatible = "atmel,at91rm9200-gpio";
768 reg = <0xfffff400 0x200>;
769 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
772 interrupt-controller;
773 #interrupt-cells = <2>;
774 clocks = <&pioA_clk>;
777 pioB: gpio@fffff600 {
778 compatible = "atmel,at91rm9200-gpio";
779 reg = <0xfffff600 0x200>;
780 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
783 interrupt-controller;
784 #interrupt-cells = <2>;
785 clocks = <&pioB_clk>;
788 pioC: gpio@fffff800 {
789 compatible = "atmel,at91rm9200-gpio";
790 reg = <0xfffff800 0x200>;
791 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
794 interrupt-controller;
795 #interrupt-cells = <2>;
796 clocks = <&pioC_clk>;
799 pioD: gpio@fffffa00 {
800 compatible = "atmel,at91rm9200-gpio";
801 reg = <0xfffffa00 0x200>;
802 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
805 interrupt-controller;
806 #interrupt-cells = <2>;
807 clocks = <&pioD_clk>;
812 compatible = "atmel,at91sam9g45-pmc";
813 reg = <0xfffffc00 0x100>;
814 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
815 interrupt-controller;
816 #address-cells = <1>;
818 #interrupt-cells = <1>;
821 compatible = "atmel,at91rm9200-clk-main";
823 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
824 clocks = <&main_xtal>;
828 compatible = "atmel,at91rm9200-clk-pll";
830 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
833 atmel,clk-input-range = <1000000 32000000>;
834 #atmel,pll-clk-output-range-cells = <3>;
835 atmel,pll-clk-output-ranges = <80000000 200000000 0>,
836 <190000000 240000000 2>;
840 compatible = "atmel,at91sam9x5-clk-utmi";
842 interrupt-parent = <&pmc>;
843 interrupts = <AT91_PMC_LOCKU>;
848 compatible = "atmel,at91rm9200-clk-master";
850 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
851 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
852 atmel,clk-output-range = <0 94000000>;
853 atmel,clk-divisors = <1 2 4 0>;
857 compatible = "atmel,at91rm9200-clk-programmable";
858 #address-cells = <1>;
860 interrupt-parent = <&pmc>;
861 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
866 interrupts = <AT91_PMC_PCKRDY(0)>;
872 interrupts = <AT91_PMC_PCKRDY(1)>;
877 compatible = "atmel,at91rm9200-clk-system";
878 #address-cells = <1>;
896 compatible = "atmel,at91rm9200-clk-peripheral";
897 #address-cells = <1>;
921 usart0_clk: usart0_clk {
926 usart1_clk: usart1_clk {
931 usart2_clk: usart2_clk {
936 usart3_clk: usart3_clk {
1001 udphs_clk: udphs_clk {
1014 compatible = "atmel,at91sam9260-rstc";
1015 reg = <0xfffffd00 0x10>;
1019 compatible = "atmel,at91sam9260-shdwc";
1020 reg = <0xfffffd10 0x10>;
1023 pit: timer@fffffd30 {
1024 compatible = "atmel,at91sam9260-pit";
1025 reg = <0xfffffd30 0xf>;
1026 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1031 compatible = "atmel,at91sam9260-wdt";
1032 reg = <0xfffffd40 0x10>;
1033 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1034 status = "disabled";
1038 compatible = "atmel,at91sam9x5-sckc";
1039 reg = <0xfffffd50 0x4>;
1041 slow_osc: slow_osc {
1042 compatible = "atmel,at91sam9x5-clk-slow-osc";
1044 atmel,startup-time-usec = <1200000>;
1045 clocks = <&slow_xtal>;
1048 slow_rc_osc: slow_rc_osc {
1049 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1051 atmel,startup-time-usec = <75>;
1052 clock-frequency = <32768>;
1053 clock-accuracy = <50000000>;
1057 compatible = "atmel,at91sam9x5-clk-slow";
1059 clocks = <&slow_rc_osc &slow_osc>;
1066 compatible = "i2c-gpio";
1067 gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
1068 <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
1069 i2c-gpio,sda-open-drain;
1070 i2c-gpio,scl-open-drain;
1071 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1072 #address-cells = <1>;
1074 pinctrl-names = "default";
1075 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1076 status = "disabled";
1080 compatible = "i2c-gpio";
1081 gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
1082 <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
1083 i2c-gpio,sda-open-drain;
1084 i2c-gpio,scl-open-drain;
1085 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1086 #address-cells = <1>;
1088 pinctrl-names = "default";
1089 pinctrl-0 = <&pinctrl_i2c_gpio1>;
1090 status = "disabled";