ARM: at91: dt: at91sam9260: split rts and cts pinctrl not
[firefly-linux-kernel-4.4.55.git] / arch / arm / boot / dts / at91sam9x5.dtsi
1 /*
2  * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3  *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4  *                   AT91SAM9X25, AT91SAM9X35 SoC
5  *
6  *  Copyright (C) 2012 Atmel,
7  *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8  *
9  * Licensed under GPLv2 or later.
10  */
11
12 /include/ "skeleton.dtsi"
13
14 / {
15         model = "Atmel AT91SAM9x5 family SoC";
16         compatible = "atmel,at91sam9x5";
17         interrupt-parent = <&aic>;
18
19         aliases {
20                 serial0 = &dbgu;
21                 serial1 = &usart0;
22                 serial2 = &usart1;
23                 serial3 = &usart2;
24                 gpio0 = &pioA;
25                 gpio1 = &pioB;
26                 gpio2 = &pioC;
27                 gpio3 = &pioD;
28                 tcb0 = &tcb0;
29                 tcb1 = &tcb1;
30                 i2c0 = &i2c0;
31                 i2c1 = &i2c1;
32                 i2c2 = &i2c2;
33         };
34         cpus {
35                 cpu@0 {
36                         compatible = "arm,arm926ejs";
37                 };
38         };
39
40         memory {
41                 reg = <0x20000000 0x10000000>;
42         };
43
44         ahb {
45                 compatible = "simple-bus";
46                 #address-cells = <1>;
47                 #size-cells = <1>;
48                 ranges;
49
50                 apb {
51                         compatible = "simple-bus";
52                         #address-cells = <1>;
53                         #size-cells = <1>;
54                         ranges;
55
56                         aic: interrupt-controller@fffff000 {
57                                 #interrupt-cells = <3>;
58                                 compatible = "atmel,at91rm9200-aic";
59                                 interrupt-controller;
60                                 reg = <0xfffff000 0x200>;
61                                 atmel,external-irqs = <31>;
62                         };
63
64                         ramc0: ramc@ffffe800 {
65                                 compatible = "atmel,at91sam9g45-ddramc";
66                                 reg = <0xffffe800 0x200>;
67                         };
68
69                         pmc: pmc@fffffc00 {
70                                 compatible = "atmel,at91rm9200-pmc";
71                                 reg = <0xfffffc00 0x100>;
72                         };
73
74                         rstc@fffffe00 {
75                                 compatible = "atmel,at91sam9g45-rstc";
76                                 reg = <0xfffffe00 0x10>;
77                         };
78
79                         shdwc@fffffe10 {
80                                 compatible = "atmel,at91sam9x5-shdwc";
81                                 reg = <0xfffffe10 0x10>;
82                         };
83
84                         pit: timer@fffffe30 {
85                                 compatible = "atmel,at91sam9260-pit";
86                                 reg = <0xfffffe30 0xf>;
87                                 interrupts = <1 4 7>;
88                         };
89
90                         tcb0: timer@f8008000 {
91                                 compatible = "atmel,at91sam9x5-tcb";
92                                 reg = <0xf8008000 0x100>;
93                                 interrupts = <17 4 0>;
94                         };
95
96                         tcb1: timer@f800c000 {
97                                 compatible = "atmel,at91sam9x5-tcb";
98                                 reg = <0xf800c000 0x100>;
99                                 interrupts = <17 4 0>;
100                         };
101
102                         dma0: dma-controller@ffffec00 {
103                                 compatible = "atmel,at91sam9g45-dma";
104                                 reg = <0xffffec00 0x200>;
105                                 interrupts = <20 4 0>;
106                         };
107
108                         dma1: dma-controller@ffffee00 {
109                                 compatible = "atmel,at91sam9g45-dma";
110                                 reg = <0xffffee00 0x200>;
111                                 interrupts = <21 4 0>;
112                         };
113
114                         pinctrl@fffff400 {
115                                 #address-cells = <1>;
116                                 #size-cells = <1>;
117                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
118                                 ranges = <0xfffff400 0xfffff400 0x800>;
119
120                                 /* shared pinctrl settings */
121                                 dbgu {
122                                         pinctrl_dbgu: dbgu-0 {
123                                                 atmel,pins =
124                                                         <0 9 0x1 0x0    /* PA9 periph A */
125                                                          0 10 0x1 0x1>; /* PA10 periph A with pullup */
126                                         };
127                                 };
128
129                                 usart0 {
130                                         pinctrl_usart0: usart0-0 {
131                                                 atmel,pins =
132                                                         <0 0 0x1 0x1    /* PA0 periph A with pullup */
133                                                          0 1 0x1 0x0>;  /* PA1 periph A */
134                                         };
135
136                                         pinctrl_usart0_rts: usart0_rts-0 {
137                                                 atmel,pins =
138                                                         <0 2 0x1 0x0>;  /* PA2 periph A */
139                                         };
140
141                                         pinctrl_usart0_cts: usart0_cts-0 {
142                                                 atmel,pins =
143                                                         <0 3 0x1 0x0>;  /* PA3 periph A */
144                                         };
145                                 };
146
147                                 usart1 {
148                                         pinctrl_usart1: usart1-0 {
149                                                 atmel,pins =
150                                                         <0 5 0x1 0x1    /* PA5 periph A with pullup */
151                                                          0 6 0x1 0x0>;  /* PA6 periph A */
152                                         };
153
154                                         pinctrl_usart1_rts: usart1_rts-0 {
155                                                 atmel,pins =
156                                                         <3 27 0x3 0x0>; /* PC27 periph C */
157                                         };
158
159                                         pinctrl_usart1_cts: usart1_cts-0 {
160                                                 atmel,pins =
161                                                         <3 28 0x3 0x0>; /* PC28 periph C */
162                                         };
163                                 };
164
165                                 usart2 {
166                                         pinctrl_usart2: usart2-0 {
167                                                 atmel,pins =
168                                                         <0 7 0x1 0x1    /* PA7 periph A with pullup */
169                                                          0 8 0x1 0x0>;  /* PA8 periph A */
170                                         };
171
172                                         pinctrl_uart2_rts: uart2_rts-0 {
173                                                 atmel,pins =
174                                                         <0 0 0x2 0x0>;  /* PB0 periph B */
175                                         };
176
177                                         pinctrl_uart2_cts: uart2_cts-0 {
178                                                 atmel,pins =
179                                                         <0 1 0x2 0x0>;  /* PB1 periph B */
180                                         };
181                                 };
182
183                                 usart3 {
184                                         pinctrl_uart3: usart3-0 {
185                                                 atmel,pins =
186                                                         <3 23 0x2 0x1   /* PC22 periph B with pullup */
187                                                          3 23 0x2 0x0>; /* PC23 periph B */
188                                         };
189
190                                         pinctrl_usart3_rts: usart3_rts-0 {
191                                                 atmel,pins =
192                                                         <3 24 0x2 0x0>; /* PC24 periph B */
193                                         };
194
195                                         pinctrl_usart3_cts: usart3_cts-0 {
196                                                 atmel,pins =
197                                                         <3 25 0x2 0x0>; /* PC25 periph B */
198                                         };
199                                 };
200
201                                 uart0 {
202                                         pinctrl_uart0: uart0-0 {
203                                                 atmel,pins =
204                                                         <3 8 0x3 0x0    /* PC8 periph C */
205                                                          3 9 0x3 0x1>;  /* PC9 periph C with pullup */
206                                         };
207                                 };
208
209                                 uart1 {
210                                         pinctrl_uart1: uart1-0 {
211                                                 atmel,pins =
212                                                         <3 16 0x3 0x0   /* PC16 periph C */
213                                                          3 17 0x3 0x1>; /* PC17 periph C with pullup */
214                                         };
215                                 };
216
217                                 nand {
218                                         pinctrl_nand: nand-0 {
219                                                 atmel,pins =
220                                                         <3 4 0x0 0x1    /* PD5 gpio RDY pin pull_up */
221                                                          3 5 0x0 0x1>;  /* PD4 gpio enable pin pull_up */
222                                         };
223                                 };
224
225                                 macb0 {
226                                         pinctrl_macb0_rmii: macb0_rmii-0 {
227                                                 atmel,pins =
228                                                         <1 0 0x1 0x0    /* PB0 periph A */
229                                                          1 1 0x1 0x0    /* PB1 periph A */
230                                                          1 2 0x1 0x0    /* PB2 periph A */
231                                                          1 3 0x1 0x0    /* PB3 periph A */
232                                                          1 4 0x1 0x0    /* PB4 periph A */
233                                                          1 5 0x1 0x0    /* PB5 periph A */
234                                                          1 6 0x1 0x0    /* PB6 periph A */
235                                                          1 7 0x1 0x0    /* PB7 periph A */
236                                                          1 9 0x1 0x0    /* PB9 periph A */
237                                                          1 10 0x1 0x0>; /* PB10 periph A */
238                                         };
239
240                                         pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
241                                                 atmel,pins =
242                                                         <1 8 0x1 0x0    /* PA8 periph A */
243                                                          1 11 0x1 0x0   /* PA11 periph A */
244                                                          1 12 0x1 0x0   /* PA12 periph A */
245                                                          1 13 0x1 0x0   /* PA13 periph A */
246                                                          1 14 0x1 0x0   /* PA14 periph A */
247                                                          1 15 0x1 0x0   /* PA15 periph A */
248                                                          1 16 0x1 0x0   /* PA16 periph A */
249                                                          1 17 0x1 0x0>; /* PA17 periph A */
250                                         };
251                                 };
252
253                                 pioA: gpio@fffff400 {
254                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
255                                         reg = <0xfffff400 0x200>;
256                                         interrupts = <2 4 1>;
257                                         #gpio-cells = <2>;
258                                         gpio-controller;
259                                         interrupt-controller;
260                                         #interrupt-cells = <2>;
261                                 };
262
263                                 pioB: gpio@fffff600 {
264                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
265                                         reg = <0xfffff600 0x200>;
266                                         interrupts = <2 4 1>;
267                                         #gpio-cells = <2>;
268                                         gpio-controller;
269                                         #gpio-lines = <19>;
270                                         interrupt-controller;
271                                         #interrupt-cells = <2>;
272                                 };
273
274                                 pioC: gpio@fffff800 {
275                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
276                                         reg = <0xfffff800 0x200>;
277                                         interrupts = <3 4 1>;
278                                         #gpio-cells = <2>;
279                                         gpio-controller;
280                                         interrupt-controller;
281                                         #interrupt-cells = <2>;
282                                 };
283
284                                 pioD: gpio@fffffa00 {
285                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
286                                         reg = <0xfffffa00 0x200>;
287                                         interrupts = <3 4 1>;
288                                         #gpio-cells = <2>;
289                                         gpio-controller;
290                                         #gpio-lines = <22>;
291                                         interrupt-controller;
292                                         #interrupt-cells = <2>;
293                                 };
294                         };
295
296                         dbgu: serial@fffff200 {
297                                 compatible = "atmel,at91sam9260-usart";
298                                 reg = <0xfffff200 0x200>;
299                                 interrupts = <1 4 7>;
300                                 pinctrl-names = "default";
301                                 pinctrl-0 = <&pinctrl_dbgu>;
302                                 status = "disabled";
303                         };
304
305                         usart0: serial@f801c000 {
306                                 compatible = "atmel,at91sam9260-usart";
307                                 reg = <0xf801c000 0x200>;
308                                 interrupts = <5 4 5>;
309                                 atmel,use-dma-rx;
310                                 atmel,use-dma-tx;
311                                 pinctrl-names = "default";
312                                 pinctrl-0 = <&pinctrl_usart0>;
313                                 status = "disabled";
314                         };
315
316                         usart1: serial@f8020000 {
317                                 compatible = "atmel,at91sam9260-usart";
318                                 reg = <0xf8020000 0x200>;
319                                 interrupts = <6 4 5>;
320                                 atmel,use-dma-rx;
321                                 atmel,use-dma-tx;
322                                 pinctrl-names = "default";
323                                 pinctrl-0 = <&pinctrl_usart1>;
324                                 status = "disabled";
325                         };
326
327                         usart2: serial@f8024000 {
328                                 compatible = "atmel,at91sam9260-usart";
329                                 reg = <0xf8024000 0x200>;
330                                 interrupts = <7 4 5>;
331                                 atmel,use-dma-rx;
332                                 atmel,use-dma-tx;
333                                 pinctrl-names = "default";
334                                 pinctrl-0 = <&pinctrl_usart2>;
335                                 status = "disabled";
336                         };
337
338                         macb0: ethernet@f802c000 {
339                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
340                                 reg = <0xf802c000 0x100>;
341                                 interrupts = <24 4 3>;
342                                 pinctrl-names = "default";
343                                 pinctrl-0 = <&pinctrl_macb0_rmii>;
344                                 status = "disabled";
345                         };
346
347                         macb1: ethernet@f8030000 {
348                                 compatible = "cdns,at32ap7000-macb", "cdns,macb";
349                                 reg = <0xf8030000 0x100>;
350                                 interrupts = <27 4 3>;
351                                 status = "disabled";
352                         };
353
354                         i2c0: i2c@f8010000 {
355                                 compatible = "atmel,at91sam9x5-i2c";
356                                 reg = <0xf8010000 0x100>;
357                                 interrupts = <9 4 6>;
358                                 #address-cells = <1>;
359                                 #size-cells = <0>;
360                                 status = "disabled";
361                         };
362
363                         i2c1: i2c@f8014000 {
364                                 compatible = "atmel,at91sam9x5-i2c";
365                                 reg = <0xf8014000 0x100>;
366                                 interrupts = <10 4 6>;
367                                 #address-cells = <1>;
368                                 #size-cells = <0>;
369                                 status = "disabled";
370                         };
371
372                         i2c2: i2c@f8018000 {
373                                 compatible = "atmel,at91sam9x5-i2c";
374                                 reg = <0xf8018000 0x100>;
375                                 interrupts = <11 4 6>;
376                                 #address-cells = <1>;
377                                 #size-cells = <0>;
378                                 status = "disabled";
379                         };
380
381                         adc0: adc@f804c000 {
382                                 compatible = "atmel,at91sam9260-adc";
383                                 reg = <0xf804c000 0x100>;
384                                 interrupts = <19 4 0>;
385                                 atmel,adc-use-external;
386                                 atmel,adc-channels-used = <0xffff>;
387                                 atmel,adc-vref = <3300>;
388                                 atmel,adc-num-channels = <12>;
389                                 atmel,adc-startup-time = <40>;
390                                 atmel,adc-channel-base = <0x50>;
391                                 atmel,adc-drdy-mask = <0x1000000>;
392                                 atmel,adc-status-register = <0x30>;
393                                 atmel,adc-trigger-register = <0xc0>;
394
395                                 trigger@0 {
396                                         trigger-name = "external-rising";
397                                         trigger-value = <0x1>;
398                                         trigger-external;
399                                 };
400
401                                 trigger@1 {
402                                         trigger-name = "external-falling";
403                                         trigger-value = <0x2>;
404                                         trigger-external;
405                                 };
406
407                                 trigger@2 {
408                                         trigger-name = "external-any";
409                                         trigger-value = <0x3>;
410                                         trigger-external;
411                                 };
412
413                                 trigger@3 {
414                                         trigger-name = "continuous";
415                                         trigger-value = <0x6>;
416                                 };
417                         };
418                 };
419
420                 nand0: nand@40000000 {
421                         compatible = "atmel,at91rm9200-nand";
422                         #address-cells = <1>;
423                         #size-cells = <1>;
424                         reg = <0x40000000 0x10000000
425                               >;
426                         atmel,nand-addr-offset = <21>;
427                         atmel,nand-cmd-offset = <22>;
428                         pinctrl-names = "default";
429                         pinctrl-0 = <&pinctrl_nand>;
430                         gpios = <&pioD 5 0
431                                  &pioD 4 0
432                                  0
433                                 >;
434                         status = "disabled";
435                 };
436
437                 usb0: ohci@00600000 {
438                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
439                         reg = <0x00600000 0x100000>;
440                         interrupts = <22 4 2>;
441                         status = "disabled";
442                 };
443
444                 usb1: ehci@00700000 {
445                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
446                         reg = <0x00700000 0x100000>;
447                         interrupts = <22 4 2>;
448                         status = "disabled";
449                 };
450         };
451
452         i2c@0 {
453                 compatible = "i2c-gpio";
454                 gpios = <&pioA 30 0 /* sda */
455                          &pioA 31 0 /* scl */
456                         >;
457                 i2c-gpio,sda-open-drain;
458                 i2c-gpio,scl-open-drain;
459                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
460                 #address-cells = <1>;
461                 #size-cells = <0>;
462                 status = "disabled";
463         };
464
465         i2c@1 {
466                 compatible = "i2c-gpio";
467                 gpios = <&pioC 0 0 /* sda */
468                          &pioC 1 0 /* scl */
469                         >;
470                 i2c-gpio,sda-open-drain;
471                 i2c-gpio,scl-open-drain;
472                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
473                 #address-cells = <1>;
474                 #size-cells = <0>;
475                 status = "disabled";
476         };
477
478         i2c@2 {
479                 compatible = "i2c-gpio";
480                 gpios = <&pioB 4 0 /* sda */
481                          &pioB 5 0 /* scl */
482                         >;
483                 i2c-gpio,sda-open-drain;
484                 i2c-gpio,scl-open-drain;
485                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
486                 #address-cells = <1>;
487                 #size-cells = <0>;
488                 status = "disabled";
489         };
490 };