2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 /include/ "skeleton.dtsi"
15 model = "Atmel AT91SAM9x5 family SoC";
16 compatible = "atmel,at91sam9x5";
17 interrupt-parent = <&aic>;
36 compatible = "arm,arm926ejs";
41 reg = <0x20000000 0x10000000>;
45 compatible = "simple-bus";
51 compatible = "simple-bus";
56 aic: interrupt-controller@fffff000 {
57 #interrupt-cells = <3>;
58 compatible = "atmel,at91rm9200-aic";
60 reg = <0xfffff000 0x200>;
61 atmel,external-irqs = <31>;
64 ramc0: ramc@ffffe800 {
65 compatible = "atmel,at91sam9g45-ddramc";
66 reg = <0xffffe800 0x200>;
70 compatible = "atmel,at91rm9200-pmc";
71 reg = <0xfffffc00 0x100>;
75 compatible = "atmel,at91sam9g45-rstc";
76 reg = <0xfffffe00 0x10>;
80 compatible = "atmel,at91sam9x5-shdwc";
81 reg = <0xfffffe10 0x10>;
85 compatible = "atmel,at91sam9260-pit";
86 reg = <0xfffffe30 0xf>;
90 tcb0: timer@f8008000 {
91 compatible = "atmel,at91sam9x5-tcb";
92 reg = <0xf8008000 0x100>;
93 interrupts = <17 4 0>;
96 tcb1: timer@f800c000 {
97 compatible = "atmel,at91sam9x5-tcb";
98 reg = <0xf800c000 0x100>;
99 interrupts = <17 4 0>;
102 dma0: dma-controller@ffffec00 {
103 compatible = "atmel,at91sam9g45-dma";
104 reg = <0xffffec00 0x200>;
105 interrupts = <20 4 0>;
108 dma1: dma-controller@ffffee00 {
109 compatible = "atmel,at91sam9g45-dma";
110 reg = <0xffffee00 0x200>;
111 interrupts = <21 4 0>;
115 #address-cells = <1>;
117 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
118 ranges = <0xfffff400 0xfffff400 0x800>;
120 /* shared pinctrl settings */
122 pinctrl_dbgu: dbgu-0 {
124 <0 9 0x1 0x0 /* PA9 periph A */
125 0 10 0x1 0x1>; /* PA10 periph A with pullup */
130 pinctrl_usart0: usart0-0 {
132 <0 0 0x1 0x1 /* PA0 periph A with pullup */
133 0 1 0x1 0x0>; /* PA1 periph A */
136 pinctrl_usart0_rts: usart0_rts-0 {
138 <0 2 0x1 0x0>; /* PA2 periph A */
141 pinctrl_usart0_cts: usart0_cts-0 {
143 <0 3 0x1 0x0>; /* PA3 periph A */
148 pinctrl_usart1: usart1-0 {
150 <0 5 0x1 0x1 /* PA5 periph A with pullup */
151 0 6 0x1 0x0>; /* PA6 periph A */
154 pinctrl_usart1_rts: usart1_rts-0 {
156 <3 27 0x3 0x0>; /* PC27 periph C */
159 pinctrl_usart1_cts: usart1_cts-0 {
161 <3 28 0x3 0x0>; /* PC28 periph C */
166 pinctrl_usart2: usart2-0 {
168 <0 7 0x1 0x1 /* PA7 periph A with pullup */
169 0 8 0x1 0x0>; /* PA8 periph A */
172 pinctrl_uart2_rts: uart2_rts-0 {
174 <0 0 0x2 0x0>; /* PB0 periph B */
177 pinctrl_uart2_cts: uart2_cts-0 {
179 <0 1 0x2 0x0>; /* PB1 periph B */
184 pinctrl_uart3: usart3-0 {
186 <3 23 0x2 0x1 /* PC22 periph B with pullup */
187 3 23 0x2 0x0>; /* PC23 periph B */
190 pinctrl_usart3_rts: usart3_rts-0 {
192 <3 24 0x2 0x0>; /* PC24 periph B */
195 pinctrl_usart3_cts: usart3_cts-0 {
197 <3 25 0x2 0x0>; /* PC25 periph B */
202 pinctrl_uart0: uart0-0 {
204 <3 8 0x3 0x0 /* PC8 periph C */
205 3 9 0x3 0x1>; /* PC9 periph C with pullup */
210 pinctrl_uart1: uart1-0 {
212 <3 16 0x3 0x0 /* PC16 periph C */
213 3 17 0x3 0x1>; /* PC17 periph C with pullup */
218 pinctrl_nand: nand-0 {
220 <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
221 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
226 pinctrl_macb0_rmii: macb0_rmii-0 {
228 <1 0 0x1 0x0 /* PB0 periph A */
229 1 1 0x1 0x0 /* PB1 periph A */
230 1 2 0x1 0x0 /* PB2 periph A */
231 1 3 0x1 0x0 /* PB3 periph A */
232 1 4 0x1 0x0 /* PB4 periph A */
233 1 5 0x1 0x0 /* PB5 periph A */
234 1 6 0x1 0x0 /* PB6 periph A */
235 1 7 0x1 0x0 /* PB7 periph A */
236 1 9 0x1 0x0 /* PB9 periph A */
237 1 10 0x1 0x0>; /* PB10 periph A */
240 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
242 <1 8 0x1 0x0 /* PA8 periph A */
243 1 11 0x1 0x0 /* PA11 periph A */
244 1 12 0x1 0x0 /* PA12 periph A */
245 1 13 0x1 0x0 /* PA13 periph A */
246 1 14 0x1 0x0 /* PA14 periph A */
247 1 15 0x1 0x0 /* PA15 periph A */
248 1 16 0x1 0x0 /* PA16 periph A */
249 1 17 0x1 0x0>; /* PA17 periph A */
253 pioA: gpio@fffff400 {
254 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
255 reg = <0xfffff400 0x200>;
256 interrupts = <2 4 1>;
259 interrupt-controller;
260 #interrupt-cells = <2>;
263 pioB: gpio@fffff600 {
264 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
265 reg = <0xfffff600 0x200>;
266 interrupts = <2 4 1>;
270 interrupt-controller;
271 #interrupt-cells = <2>;
274 pioC: gpio@fffff800 {
275 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
276 reg = <0xfffff800 0x200>;
277 interrupts = <3 4 1>;
280 interrupt-controller;
281 #interrupt-cells = <2>;
284 pioD: gpio@fffffa00 {
285 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
286 reg = <0xfffffa00 0x200>;
287 interrupts = <3 4 1>;
291 interrupt-controller;
292 #interrupt-cells = <2>;
296 dbgu: serial@fffff200 {
297 compatible = "atmel,at91sam9260-usart";
298 reg = <0xfffff200 0x200>;
299 interrupts = <1 4 7>;
300 pinctrl-names = "default";
301 pinctrl-0 = <&pinctrl_dbgu>;
305 usart0: serial@f801c000 {
306 compatible = "atmel,at91sam9260-usart";
307 reg = <0xf801c000 0x200>;
308 interrupts = <5 4 5>;
311 pinctrl-names = "default";
312 pinctrl-0 = <&pinctrl_usart0>;
316 usart1: serial@f8020000 {
317 compatible = "atmel,at91sam9260-usart";
318 reg = <0xf8020000 0x200>;
319 interrupts = <6 4 5>;
322 pinctrl-names = "default";
323 pinctrl-0 = <&pinctrl_usart1>;
327 usart2: serial@f8024000 {
328 compatible = "atmel,at91sam9260-usart";
329 reg = <0xf8024000 0x200>;
330 interrupts = <7 4 5>;
333 pinctrl-names = "default";
334 pinctrl-0 = <&pinctrl_usart2>;
338 macb0: ethernet@f802c000 {
339 compatible = "cdns,at32ap7000-macb", "cdns,macb";
340 reg = <0xf802c000 0x100>;
341 interrupts = <24 4 3>;
342 pinctrl-names = "default";
343 pinctrl-0 = <&pinctrl_macb0_rmii>;
347 macb1: ethernet@f8030000 {
348 compatible = "cdns,at32ap7000-macb", "cdns,macb";
349 reg = <0xf8030000 0x100>;
350 interrupts = <27 4 3>;
355 compatible = "atmel,at91sam9x5-i2c";
356 reg = <0xf8010000 0x100>;
357 interrupts = <9 4 6>;
358 #address-cells = <1>;
364 compatible = "atmel,at91sam9x5-i2c";
365 reg = <0xf8014000 0x100>;
366 interrupts = <10 4 6>;
367 #address-cells = <1>;
373 compatible = "atmel,at91sam9x5-i2c";
374 reg = <0xf8018000 0x100>;
375 interrupts = <11 4 6>;
376 #address-cells = <1>;
382 compatible = "atmel,at91sam9260-adc";
383 reg = <0xf804c000 0x100>;
384 interrupts = <19 4 0>;
385 atmel,adc-use-external;
386 atmel,adc-channels-used = <0xffff>;
387 atmel,adc-vref = <3300>;
388 atmel,adc-num-channels = <12>;
389 atmel,adc-startup-time = <40>;
390 atmel,adc-channel-base = <0x50>;
391 atmel,adc-drdy-mask = <0x1000000>;
392 atmel,adc-status-register = <0x30>;
393 atmel,adc-trigger-register = <0xc0>;
396 trigger-name = "external-rising";
397 trigger-value = <0x1>;
402 trigger-name = "external-falling";
403 trigger-value = <0x2>;
408 trigger-name = "external-any";
409 trigger-value = <0x3>;
414 trigger-name = "continuous";
415 trigger-value = <0x6>;
420 nand0: nand@40000000 {
421 compatible = "atmel,at91rm9200-nand";
422 #address-cells = <1>;
424 reg = <0x40000000 0x10000000
426 atmel,nand-addr-offset = <21>;
427 atmel,nand-cmd-offset = <22>;
428 pinctrl-names = "default";
429 pinctrl-0 = <&pinctrl_nand>;
437 usb0: ohci@00600000 {
438 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
439 reg = <0x00600000 0x100000>;
440 interrupts = <22 4 2>;
444 usb1: ehci@00700000 {
445 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
446 reg = <0x00700000 0x100000>;
447 interrupts = <22 4 2>;
453 compatible = "i2c-gpio";
454 gpios = <&pioA 30 0 /* sda */
457 i2c-gpio,sda-open-drain;
458 i2c-gpio,scl-open-drain;
459 i2c-gpio,delay-us = <2>; /* ~100 kHz */
460 #address-cells = <1>;
466 compatible = "i2c-gpio";
467 gpios = <&pioC 0 0 /* sda */
470 i2c-gpio,sda-open-drain;
471 i2c-gpio,scl-open-drain;
472 i2c-gpio,delay-us = <2>; /* ~100 kHz */
473 #address-cells = <1>;
479 compatible = "i2c-gpio";
480 gpios = <&pioB 4 0 /* sda */
483 i2c-gpio,sda-open-drain;
484 i2c-gpio,scl-open-drain;
485 i2c-gpio,delay-us = <2>; /* ~100 kHz */
486 #address-cells = <1>;