2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 /include/ "skeleton.dtsi"
15 model = "Atmel AT91SAM9x5 family SoC";
16 compatible = "atmel,at91sam9x5";
17 interrupt-parent = <&aic>;
37 compatible = "arm,arm926ejs";
42 reg = <0x20000000 0x10000000>;
46 compatible = "simple-bus";
52 compatible = "simple-bus";
57 aic: interrupt-controller@fffff000 {
58 #interrupt-cells = <3>;
59 compatible = "atmel,at91rm9200-aic";
61 reg = <0xfffff000 0x200>;
62 atmel,external-irqs = <31>;
65 ramc0: ramc@ffffe800 {
66 compatible = "atmel,at91sam9g45-ddramc";
67 reg = <0xffffe800 0x200>;
71 compatible = "atmel,at91rm9200-pmc";
72 reg = <0xfffffc00 0x100>;
76 compatible = "atmel,at91sam9g45-rstc";
77 reg = <0xfffffe00 0x10>;
81 compatible = "atmel,at91sam9x5-shdwc";
82 reg = <0xfffffe10 0x10>;
86 compatible = "atmel,at91sam9260-pit";
87 reg = <0xfffffe30 0xf>;
92 compatible = "atmel,at91sam9g45-ssc";
93 reg = <0xf0010000 0x4000>;
94 interrupts = <28 4 5>;
98 tcb0: timer@f8008000 {
99 compatible = "atmel,at91sam9x5-tcb";
100 reg = <0xf8008000 0x100>;
101 interrupts = <17 4 0>;
104 tcb1: timer@f800c000 {
105 compatible = "atmel,at91sam9x5-tcb";
106 reg = <0xf800c000 0x100>;
107 interrupts = <17 4 0>;
110 dma0: dma-controller@ffffec00 {
111 compatible = "atmel,at91sam9g45-dma";
112 reg = <0xffffec00 0x200>;
113 interrupts = <20 4 0>;
116 dma1: dma-controller@ffffee00 {
117 compatible = "atmel,at91sam9g45-dma";
118 reg = <0xffffee00 0x200>;
119 interrupts = <21 4 0>;
123 #address-cells = <1>;
125 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
126 ranges = <0xfffff400 0xfffff400 0x800>;
128 /* shared pinctrl settings */
130 pinctrl_dbgu: dbgu-0 {
132 <0 9 0x1 0x0 /* PA9 periph A */
133 0 10 0x1 0x1>; /* PA10 periph A with pullup */
138 pinctrl_usart0: usart0-0 {
140 <0 0 0x1 0x1 /* PA0 periph A with pullup */
141 0 1 0x1 0x0>; /* PA1 periph A */
144 pinctrl_usart0_rts: usart0_rts-0 {
146 <0 2 0x1 0x0>; /* PA2 periph A */
149 pinctrl_usart0_cts: usart0_cts-0 {
151 <0 3 0x1 0x0>; /* PA3 periph A */
156 pinctrl_usart1: usart1-0 {
158 <0 5 0x1 0x1 /* PA5 periph A with pullup */
159 0 6 0x1 0x0>; /* PA6 periph A */
162 pinctrl_usart1_rts: usart1_rts-0 {
164 <3 27 0x3 0x0>; /* PC27 periph C */
167 pinctrl_usart1_cts: usart1_cts-0 {
169 <3 28 0x3 0x0>; /* PC28 periph C */
174 pinctrl_usart2: usart2-0 {
176 <0 7 0x1 0x1 /* PA7 periph A with pullup */
177 0 8 0x1 0x0>; /* PA8 periph A */
180 pinctrl_uart2_rts: uart2_rts-0 {
182 <0 0 0x2 0x0>; /* PB0 periph B */
185 pinctrl_uart2_cts: uart2_cts-0 {
187 <0 1 0x2 0x0>; /* PB1 periph B */
192 pinctrl_uart3: usart3-0 {
194 <3 23 0x2 0x1 /* PC22 periph B with pullup */
195 3 23 0x2 0x0>; /* PC23 periph B */
198 pinctrl_usart3_rts: usart3_rts-0 {
200 <3 24 0x2 0x0>; /* PC24 periph B */
203 pinctrl_usart3_cts: usart3_cts-0 {
205 <3 25 0x2 0x0>; /* PC25 periph B */
210 pinctrl_uart0: uart0-0 {
212 <3 8 0x3 0x0 /* PC8 periph C */
213 3 9 0x3 0x1>; /* PC9 periph C with pullup */
218 pinctrl_uart1: uart1-0 {
220 <3 16 0x3 0x0 /* PC16 periph C */
221 3 17 0x3 0x1>; /* PC17 periph C with pullup */
226 pinctrl_nand: nand-0 {
228 <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
229 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
234 pinctrl_macb0_rmii: macb0_rmii-0 {
236 <1 0 0x1 0x0 /* PB0 periph A */
237 1 1 0x1 0x0 /* PB1 periph A */
238 1 2 0x1 0x0 /* PB2 periph A */
239 1 3 0x1 0x0 /* PB3 periph A */
240 1 4 0x1 0x0 /* PB4 periph A */
241 1 5 0x1 0x0 /* PB5 periph A */
242 1 6 0x1 0x0 /* PB6 periph A */
243 1 7 0x1 0x0 /* PB7 periph A */
244 1 9 0x1 0x0 /* PB9 periph A */
245 1 10 0x1 0x0>; /* PB10 periph A */
248 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
250 <1 8 0x1 0x0 /* PA8 periph A */
251 1 11 0x1 0x0 /* PA11 periph A */
252 1 12 0x1 0x0 /* PA12 periph A */
253 1 13 0x1 0x0 /* PA13 periph A */
254 1 14 0x1 0x0 /* PA14 periph A */
255 1 15 0x1 0x0 /* PA15 periph A */
256 1 16 0x1 0x0 /* PA16 periph A */
257 1 17 0x1 0x0>; /* PA17 periph A */
262 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
264 <0 17 0x1 0x0 /* PA17 periph A */
265 0 16 0x1 0x1 /* PA16 periph A with pullup */
266 0 15 0x1 0x1>; /* PA15 periph A with pullup */
269 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
271 <0 18 0x1 0x1 /* PA18 periph A with pullup */
272 0 19 0x1 0x1 /* PA19 periph A with pullup */
273 0 20 0x1 0x1>; /* PA20 periph A with pullup */
278 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
280 <0 13 0x2 0x0 /* PA13 periph B */
281 0 12 0x2 0x1 /* PA12 periph B with pullup */
282 0 11 0x2 0x1>; /* PA11 periph B with pullup */
285 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
287 <0 2 0x2 0x1 /* PA2 periph B with pullup */
288 0 3 0x2 0x1 /* PA3 periph B with pullup */
289 0 4 0x2 0x1>; /* PA4 periph B with pullup */
293 pioA: gpio@fffff400 {
294 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
295 reg = <0xfffff400 0x200>;
296 interrupts = <2 4 1>;
299 interrupt-controller;
300 #interrupt-cells = <2>;
303 pioB: gpio@fffff600 {
304 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
305 reg = <0xfffff600 0x200>;
306 interrupts = <2 4 1>;
310 interrupt-controller;
311 #interrupt-cells = <2>;
314 pioC: gpio@fffff800 {
315 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
316 reg = <0xfffff800 0x200>;
317 interrupts = <3 4 1>;
320 interrupt-controller;
321 #interrupt-cells = <2>;
324 pioD: gpio@fffffa00 {
325 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
326 reg = <0xfffffa00 0x200>;
327 interrupts = <3 4 1>;
331 interrupt-controller;
332 #interrupt-cells = <2>;
337 compatible = "atmel,hsmci";
338 reg = <0xf0008000 0x600>;
339 interrupts = <12 4 0>;
340 #address-cells = <1>;
346 compatible = "atmel,hsmci";
347 reg = <0xf000c000 0x600>;
348 interrupts = <26 4 0>;
349 #address-cells = <1>;
354 dbgu: serial@fffff200 {
355 compatible = "atmel,at91sam9260-usart";
356 reg = <0xfffff200 0x200>;
357 interrupts = <1 4 7>;
358 pinctrl-names = "default";
359 pinctrl-0 = <&pinctrl_dbgu>;
363 usart0: serial@f801c000 {
364 compatible = "atmel,at91sam9260-usart";
365 reg = <0xf801c000 0x200>;
366 interrupts = <5 4 5>;
369 pinctrl-names = "default";
370 pinctrl-0 = <&pinctrl_usart0>;
374 usart1: serial@f8020000 {
375 compatible = "atmel,at91sam9260-usart";
376 reg = <0xf8020000 0x200>;
377 interrupts = <6 4 5>;
380 pinctrl-names = "default";
381 pinctrl-0 = <&pinctrl_usart1>;
385 usart2: serial@f8024000 {
386 compatible = "atmel,at91sam9260-usart";
387 reg = <0xf8024000 0x200>;
388 interrupts = <7 4 5>;
391 pinctrl-names = "default";
392 pinctrl-0 = <&pinctrl_usart2>;
396 macb0: ethernet@f802c000 {
397 compatible = "cdns,at32ap7000-macb", "cdns,macb";
398 reg = <0xf802c000 0x100>;
399 interrupts = <24 4 3>;
400 pinctrl-names = "default";
401 pinctrl-0 = <&pinctrl_macb0_rmii>;
405 macb1: ethernet@f8030000 {
406 compatible = "cdns,at32ap7000-macb", "cdns,macb";
407 reg = <0xf8030000 0x100>;
408 interrupts = <27 4 3>;
413 compatible = "atmel,at91sam9x5-i2c";
414 reg = <0xf8010000 0x100>;
415 interrupts = <9 4 6>;
416 #address-cells = <1>;
422 compatible = "atmel,at91sam9x5-i2c";
423 reg = <0xf8014000 0x100>;
424 interrupts = <10 4 6>;
425 #address-cells = <1>;
431 compatible = "atmel,at91sam9x5-i2c";
432 reg = <0xf8018000 0x100>;
433 interrupts = <11 4 6>;
434 #address-cells = <1>;
440 compatible = "atmel,at91sam9260-adc";
441 reg = <0xf804c000 0x100>;
442 interrupts = <19 4 0>;
443 atmel,adc-use-external;
444 atmel,adc-channels-used = <0xffff>;
445 atmel,adc-vref = <3300>;
446 atmel,adc-num-channels = <12>;
447 atmel,adc-startup-time = <40>;
448 atmel,adc-channel-base = <0x50>;
449 atmel,adc-drdy-mask = <0x1000000>;
450 atmel,adc-status-register = <0x30>;
451 atmel,adc-trigger-register = <0xc0>;
454 trigger-name = "external-rising";
455 trigger-value = <0x1>;
460 trigger-name = "external-falling";
461 trigger-value = <0x2>;
466 trigger-name = "external-any";
467 trigger-value = <0x3>;
472 trigger-name = "continuous";
473 trigger-value = <0x6>;
478 nand0: nand@40000000 {
479 compatible = "atmel,at91rm9200-nand";
480 #address-cells = <1>;
482 reg = <0x40000000 0x10000000
484 atmel,nand-addr-offset = <21>;
485 atmel,nand-cmd-offset = <22>;
486 pinctrl-names = "default";
487 pinctrl-0 = <&pinctrl_nand>;
495 usb0: ohci@00600000 {
496 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
497 reg = <0x00600000 0x100000>;
498 interrupts = <22 4 2>;
502 usb1: ehci@00700000 {
503 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
504 reg = <0x00700000 0x100000>;
505 interrupts = <22 4 2>;
511 compatible = "i2c-gpio";
512 gpios = <&pioA 30 0 /* sda */
515 i2c-gpio,sda-open-drain;
516 i2c-gpio,scl-open-drain;
517 i2c-gpio,delay-us = <2>; /* ~100 kHz */
518 #address-cells = <1>;
524 compatible = "i2c-gpio";
525 gpios = <&pioC 0 0 /* sda */
528 i2c-gpio,sda-open-drain;
529 i2c-gpio,scl-open-drain;
530 i2c-gpio,delay-us = <2>; /* ~100 kHz */
531 #address-cells = <1>;
537 compatible = "i2c-gpio";
538 gpios = <&pioB 4 0 /* sda */
541 i2c-gpio,sda-open-drain;
542 i2c-gpio,scl-open-drain;
543 i2c-gpio,delay-us = <2>; /* ~100 kHz */
544 #address-cells = <1>;