2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 #include "skeleton.dtsi"
13 #include <dt-bindings/dma/at91.h>
14 #include <dt-bindings/pinctrl/at91.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/at91.h>
20 model = "Atmel AT91SAM9x5 family SoC";
21 compatible = "atmel,at91sam9x5";
22 interrupt-parent = <&aic>;
46 compatible = "arm,arm926ej-s";
52 reg = <0x20000000 0x10000000>;
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
59 clock-frequency = <0>;
62 main_xtal: main_xtal {
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
68 adc_op_clk: adc_op_clk{
69 compatible = "fixed-clock";
71 clock-frequency = <5000000>;
76 compatible = "simple-bus";
82 compatible = "simple-bus";
87 aic: interrupt-controller@fffff000 {
88 #interrupt-cells = <3>;
89 compatible = "atmel,at91rm9200-aic";
91 reg = <0xfffff000 0x200>;
92 atmel,external-irqs = <31>;
95 ramc0: ramc@ffffe800 {
96 compatible = "atmel,at91sam9g45-ddramc";
97 reg = <0xffffe800 0x200>;
99 clock-names = "ddrck";
103 compatible = "atmel,at91sam9x5-pmc";
104 reg = <0xfffffc00 0x100>;
105 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
106 interrupt-controller;
107 #address-cells = <1>;
109 #interrupt-cells = <1>;
111 main_rc_osc: main_rc_osc {
112 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
114 interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
115 clock-frequency = <12000000>;
116 clock-accuracy = <50000000>;
120 compatible = "atmel,at91rm9200-clk-main-osc";
122 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
123 clocks = <&main_xtal>;
127 compatible = "atmel,at91sam9x5-clk-main";
129 interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
130 clocks = <&main_rc_osc>, <&main_osc>;
134 compatible = "atmel,at91rm9200-clk-pll";
136 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
139 atmel,clk-input-range = <2000000 32000000>;
140 #atmel,pll-clk-output-range-cells = <4>;
141 atmel,pll-clk-output-ranges = <745000000 800000000 0 0
142 695000000 750000000 1 0
143 645000000 700000000 2 0
144 595000000 650000000 3 0
145 545000000 600000000 0 1
146 495000000 555000000 1 1
147 445000000 500000000 2 1
148 400000000 450000000 3 1>;
152 compatible = "atmel,at91sam9x5-clk-plldiv";
158 compatible = "atmel,at91sam9x5-clk-utmi";
160 interrupts-extended = <&pmc AT91_PMC_LOCKU>;
165 compatible = "atmel,at91sam9x5-clk-master";
167 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
168 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
169 atmel,clk-output-range = <0 133333333>;
170 atmel,clk-divisors = <1 2 4 3>;
171 atmel,master-clk-have-div3-pres;
175 compatible = "atmel,at91sam9x5-clk-usb";
177 clocks = <&plladiv>, <&utmi>;
181 compatible = "atmel,at91sam9x5-clk-programmable";
182 #address-cells = <1>;
184 interrupt-parent = <&pmc>;
185 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
190 interrupts = <AT91_PMC_PCKRDY(0)>;
196 interrupts = <AT91_PMC_PCKRDY(1)>;
201 compatible = "atmel,at91sam9x5-clk-smd";
203 clocks = <&plladiv>, <&utmi>;
207 compatible = "atmel,at91rm9200-clk-system";
208 #address-cells = <1>;
249 compatible = "atmel,at91sam9x5-clk-peripheral";
250 #address-cells = <1>;
254 pioAB_clk: pioAB_clk {
259 pioCD_clk: pioCD_clk {
269 usart0_clk: usart0_clk {
274 usart1_clk: usart1_clk {
279 usart2_clk: usart2_clk {
314 uart0_clk: uart0_clk {
319 uart1_clk: uart1_clk {
349 uhphs_clk: uhphs_clk {
354 udphs_clk: udphs_clk {
372 compatible = "atmel,at91sam9g45-rstc";
373 reg = <0xfffffe00 0x10>;
377 compatible = "atmel,at91sam9x5-shdwc";
378 reg = <0xfffffe10 0x10>;
381 pit: timer@fffffe30 {
382 compatible = "atmel,at91sam9260-pit";
383 reg = <0xfffffe30 0xf>;
384 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
389 compatible = "atmel,at91sam9x5-sckc";
390 reg = <0xfffffe50 0x4>;
393 compatible = "atmel,at91sam9x5-clk-slow-osc";
395 clocks = <&slow_xtal>;
398 slow_rc_osc: slow_rc_osc {
399 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
401 clock-frequency = <32768>;
402 clock-accuracy = <50000000>;
406 compatible = "atmel,at91sam9x5-clk-slow";
408 clocks = <&slow_rc_osc>, <&slow_osc>;
412 tcb0: timer@f8008000 {
413 compatible = "atmel,at91sam9x5-tcb";
414 reg = <0xf8008000 0x100>;
415 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
416 clocks = <&tcb0_clk>;
417 clock-names = "t0_clk";
420 tcb1: timer@f800c000 {
421 compatible = "atmel,at91sam9x5-tcb";
422 reg = <0xf800c000 0x100>;
423 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
424 clocks = <&tcb0_clk>;
425 clock-names = "t0_clk";
428 dma0: dma-controller@ffffec00 {
429 compatible = "atmel,at91sam9g45-dma";
430 reg = <0xffffec00 0x200>;
431 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
433 clocks = <&dma0_clk>;
434 clock-names = "dma_clk";
437 dma1: dma-controller@ffffee00 {
438 compatible = "atmel,at91sam9g45-dma";
439 reg = <0xffffee00 0x200>;
440 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
442 clocks = <&dma1_clk>;
443 clock-names = "dma_clk";
447 #address-cells = <1>;
449 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
450 ranges = <0xfffff400 0xfffff400 0x800>;
452 /* shared pinctrl settings */
454 pinctrl_dbgu: dbgu-0 {
456 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
457 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */
462 pinctrl_usart0: usart0-0 {
464 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
465 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */
468 pinctrl_usart0_rts: usart0_rts-0 {
470 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
473 pinctrl_usart0_cts: usart0_cts-0 {
475 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
478 pinctrl_usart0_sck: usart0_sck-0 {
480 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
485 pinctrl_usart1: usart1-0 {
487 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
488 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
491 pinctrl_usart1_rts: usart1_rts-0 {
493 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
496 pinctrl_usart1_cts: usart1_cts-0 {
498 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
501 pinctrl_usart1_sck: usart1_sck-0 {
503 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
508 pinctrl_usart2: usart2-0 {
510 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
511 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
514 pinctrl_usart2_rts: usart2_rts-0 {
516 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
519 pinctrl_usart2_cts: usart2_cts-0 {
521 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
524 pinctrl_usart2_sck: usart2_sck-0 {
526 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
531 pinctrl_uart0: uart0-0 {
533 <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
534 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
539 pinctrl_uart1: uart1-0 {
541 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
542 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
547 pinctrl_nand: nand-0 {
549 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */
550 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */
551 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */
552 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */
553 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
554 AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */
555 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */
556 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */
557 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */
558 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */
559 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */
560 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */
561 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */
562 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
565 pinctrl_nand_16bits: nand_16bits-0 {
567 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */
568 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */
569 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */
570 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */
571 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */
572 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */
573 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */
574 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
579 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
581 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
582 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
583 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
586 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
588 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
589 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
590 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
595 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
597 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
598 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
599 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
602 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
604 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
605 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
606 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
611 pinctrl_ssc0_tx: ssc0_tx-0 {
613 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
614 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
615 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
618 pinctrl_ssc0_rx: ssc0_rx-0 {
620 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
621 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
622 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
627 pinctrl_spi0: spi0-0 {
629 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
630 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
631 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
636 pinctrl_spi1: spi1-0 {
638 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
639 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
640 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
645 pinctrl_i2c0: i2c0-0 {
647 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
648 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
653 pinctrl_i2c1: i2c1-0 {
655 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
656 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
661 pinctrl_i2c2: i2c2-0 {
663 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
664 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
669 pinctrl_i2c_gpio0: i2c_gpio0-0 {
671 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
672 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
677 pinctrl_i2c_gpio1: i2c_gpio1-0 {
679 <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
680 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
685 pinctrl_i2c_gpio2: i2c_gpio2-0 {
687 <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
688 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
693 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
694 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
697 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
698 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
701 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
702 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
705 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
706 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
709 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
710 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
713 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
714 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
717 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
718 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
721 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
722 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
725 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
726 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
731 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
732 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
735 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
736 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
739 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
740 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
743 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
744 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
747 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
748 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
751 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
752 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
755 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
756 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
759 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
760 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
763 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
764 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
768 pioA: gpio@fffff400 {
769 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
770 reg = <0xfffff400 0x200>;
771 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
774 interrupt-controller;
775 #interrupt-cells = <2>;
776 clocks = <&pioAB_clk>;
779 pioB: gpio@fffff600 {
780 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
781 reg = <0xfffff600 0x200>;
782 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
786 interrupt-controller;
787 #interrupt-cells = <2>;
788 clocks = <&pioAB_clk>;
791 pioC: gpio@fffff800 {
792 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
793 reg = <0xfffff800 0x200>;
794 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
797 interrupt-controller;
798 #interrupt-cells = <2>;
799 clocks = <&pioCD_clk>;
802 pioD: gpio@fffffa00 {
803 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
804 reg = <0xfffffa00 0x200>;
805 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
809 interrupt-controller;
810 #interrupt-cells = <2>;
811 clocks = <&pioCD_clk>;
816 compatible = "atmel,at91sam9g45-ssc";
817 reg = <0xf0010000 0x4000>;
818 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
819 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
820 <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
821 dma-names = "tx", "rx";
822 pinctrl-names = "default";
823 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
824 clocks = <&ssc0_clk>;
825 clock-names = "pclk";
830 compatible = "atmel,hsmci";
831 reg = <0xf0008000 0x600>;
832 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
833 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
835 pinctrl-names = "default";
836 clocks = <&mci0_clk>;
837 clock-names = "mci_clk";
838 #address-cells = <1>;
844 compatible = "atmel,hsmci";
845 reg = <0xf000c000 0x600>;
846 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
847 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
849 pinctrl-names = "default";
850 clocks = <&mci1_clk>;
851 clock-names = "mci_clk";
852 #address-cells = <1>;
857 dbgu: serial@fffff200 {
858 compatible = "atmel,at91sam9260-usart";
859 reg = <0xfffff200 0x200>;
860 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
861 pinctrl-names = "default";
862 pinctrl-0 = <&pinctrl_dbgu>;
863 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
864 <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
865 dma-names = "tx", "rx";
867 clock-names = "usart";
871 usart0: serial@f801c000 {
872 compatible = "atmel,at91sam9260-usart";
873 reg = <0xf801c000 0x200>;
874 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
875 pinctrl-names = "default";
876 pinctrl-0 = <&pinctrl_usart0>;
877 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
878 <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
879 dma-names = "tx", "rx";
880 clocks = <&usart0_clk>;
881 clock-names = "usart";
885 usart1: serial@f8020000 {
886 compatible = "atmel,at91sam9260-usart";
887 reg = <0xf8020000 0x200>;
888 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
889 pinctrl-names = "default";
890 pinctrl-0 = <&pinctrl_usart1>;
891 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
892 <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
893 dma-names = "tx", "rx";
894 clocks = <&usart1_clk>;
895 clock-names = "usart";
899 usart2: serial@f8024000 {
900 compatible = "atmel,at91sam9260-usart";
901 reg = <0xf8024000 0x200>;
902 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
903 pinctrl-names = "default";
904 pinctrl-0 = <&pinctrl_usart2>;
905 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
906 <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
907 dma-names = "tx", "rx";
908 clocks = <&usart2_clk>;
909 clock-names = "usart";
914 compatible = "atmel,at91sam9x5-i2c";
915 reg = <0xf8010000 0x100>;
916 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
917 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
918 <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
919 dma-names = "tx", "rx";
920 #address-cells = <1>;
922 pinctrl-names = "default";
923 pinctrl-0 = <&pinctrl_i2c0>;
924 clocks = <&twi0_clk>;
929 compatible = "atmel,at91sam9x5-i2c";
930 reg = <0xf8014000 0x100>;
931 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
932 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
933 <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
934 dma-names = "tx", "rx";
935 #address-cells = <1>;
937 pinctrl-names = "default";
938 pinctrl-0 = <&pinctrl_i2c1>;
939 clocks = <&twi1_clk>;
944 compatible = "atmel,at91sam9x5-i2c";
945 reg = <0xf8018000 0x100>;
946 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
947 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
948 <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
949 dma-names = "tx", "rx";
950 #address-cells = <1>;
952 pinctrl-names = "default";
953 pinctrl-0 = <&pinctrl_i2c2>;
954 clocks = <&twi2_clk>;
958 uart0: serial@f8040000 {
959 compatible = "atmel,at91sam9260-usart";
960 reg = <0xf8040000 0x200>;
961 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
962 pinctrl-names = "default";
963 pinctrl-0 = <&pinctrl_uart0>;
964 clocks = <&uart0_clk>;
965 clock-names = "usart";
969 uart1: serial@f8044000 {
970 compatible = "atmel,at91sam9260-usart";
971 reg = <0xf8044000 0x200>;
972 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
973 pinctrl-names = "default";
974 pinctrl-0 = <&pinctrl_uart1>;
975 clocks = <&uart1_clk>;
976 clock-names = "usart";
981 #address-cells = <1>;
983 compatible = "atmel,at91sam9x5-adc";
984 reg = <0xf804c000 0x100>;
985 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
988 clock-names = "adc_clk", "adc_op_clk";
989 atmel,adc-use-external-triggers;
990 atmel,adc-channels-used = <0xffff>;
991 atmel,adc-vref = <3300>;
992 atmel,adc-startup-time = <40>;
993 atmel,adc-res = <8 10>;
994 atmel,adc-res-names = "lowres", "highres";
995 atmel,adc-use-res = "highres";
999 trigger-name = "external-rising";
1000 trigger-value = <0x1>;
1006 trigger-name = "external-falling";
1007 trigger-value = <0x2>;
1013 trigger-name = "external-any";
1014 trigger-value = <0x3>;
1020 trigger-name = "continuous";
1021 trigger-value = <0x6>;
1025 spi0: spi@f0000000 {
1026 #address-cells = <1>;
1028 compatible = "atmel,at91rm9200-spi";
1029 reg = <0xf0000000 0x100>;
1030 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
1031 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
1032 <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
1033 dma-names = "tx", "rx";
1034 pinctrl-names = "default";
1035 pinctrl-0 = <&pinctrl_spi0>;
1036 clocks = <&spi0_clk>;
1037 clock-names = "spi_clk";
1038 status = "disabled";
1041 spi1: spi@f0004000 {
1042 #address-cells = <1>;
1044 compatible = "atmel,at91rm9200-spi";
1045 reg = <0xf0004000 0x100>;
1046 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
1047 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
1048 <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
1049 dma-names = "tx", "rx";
1050 pinctrl-names = "default";
1051 pinctrl-0 = <&pinctrl_spi1>;
1052 clocks = <&spi1_clk>;
1053 clock-names = "spi_clk";
1054 status = "disabled";
1057 usb2: gadget@f803c000 {
1058 #address-cells = <1>;
1060 compatible = "atmel,at91sam9rl-udc";
1061 reg = <0x00500000 0x80000
1063 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
1064 clocks = <&usb>, <&udphs_clk>;
1065 clock-names = "hclk", "pclk";
1066 status = "disabled";
1070 atmel,fifo-size = <64>;
1071 atmel,nb-banks = <1>;
1076 atmel,fifo-size = <1024>;
1077 atmel,nb-banks = <2>;
1084 atmel,fifo-size = <1024>;
1085 atmel,nb-banks = <2>;
1092 atmel,fifo-size = <1024>;
1093 atmel,nb-banks = <3>;
1099 atmel,fifo-size = <1024>;
1100 atmel,nb-banks = <3>;
1106 atmel,fifo-size = <1024>;
1107 atmel,nb-banks = <3>;
1114 atmel,fifo-size = <1024>;
1115 atmel,nb-banks = <3>;
1122 compatible = "atmel,at91sam9260-wdt";
1123 reg = <0xfffffe40 0x10>;
1124 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1125 atmel,watchdog-type = "hardware";
1126 atmel,reset-type = "all";
1129 status = "disabled";
1133 compatible = "atmel,at91sam9x5-rtc";
1134 reg = <0xfffffeb0 0x40>;
1135 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1136 status = "disabled";
1139 pwm0: pwm@f8034000 {
1140 compatible = "atmel,at91sam9rl-pwm";
1141 reg = <0xf8034000 0x300>;
1142 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
1143 clocks = <&pwm_clk>;
1145 status = "disabled";
1149 nand0: nand@40000000 {
1150 compatible = "atmel,at91rm9200-nand";
1151 #address-cells = <1>;
1153 reg = <0x40000000 0x10000000
1154 0xffffe000 0x600 /* PMECC Registers */
1155 0xffffe600 0x200 /* PMECC Error Location Registers */
1156 0x00108000 0x18000 /* PMECC looup table in ROM code */
1158 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1159 atmel,nand-addr-offset = <21>;
1160 atmel,nand-cmd-offset = <22>;
1162 pinctrl-names = "default";
1163 pinctrl-0 = <&pinctrl_nand>;
1164 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
1165 &pioD 4 GPIO_ACTIVE_HIGH
1168 status = "disabled";
1171 usb0: ohci@00600000 {
1172 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1173 reg = <0x00600000 0x100000>;
1174 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1175 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1176 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1177 status = "disabled";
1180 usb1: ehci@00700000 {
1181 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1182 reg = <0x00700000 0x100000>;
1183 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1184 clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1185 clock-names = "usb_clk", "ehci_clk", "uhpck";
1186 status = "disabled";
1191 compatible = "i2c-gpio";
1192 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1193 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1195 i2c-gpio,sda-open-drain;
1196 i2c-gpio,scl-open-drain;
1197 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1198 #address-cells = <1>;
1200 pinctrl-names = "default";
1201 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1202 status = "disabled";
1206 compatible = "i2c-gpio";
1207 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
1208 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
1210 i2c-gpio,sda-open-drain;
1211 i2c-gpio,scl-open-drain;
1212 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1213 #address-cells = <1>;
1215 pinctrl-names = "default";
1216 pinctrl-0 = <&pinctrl_i2c_gpio1>;
1217 status = "disabled";
1221 compatible = "i2c-gpio";
1222 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1223 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1225 i2c-gpio,sda-open-drain;
1226 i2c-gpio,scl-open-drain;
1227 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1228 #address-cells = <1>;
1230 pinctrl-names = "default";
1231 pinctrl-0 = <&pinctrl_i2c_gpio2>;
1232 status = "disabled";