2 * DTS file for CSR SiRFatlas6 SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 /include/ "skeleton.dtsi"
11 compatible = "sirf,atlas6";
14 interrupt-parent = <&intc>;
22 d-cache-line-size = <32>;
23 i-cache-line-size = <32>;
24 d-cache-size = <32768>;
25 i-cache-size = <32768>;
27 timebase-frequency = <0>;
29 clock-frequency = <0>;
38 clock-latency = <150000>;
43 compatible = "simple-bus";
46 ranges = <0x40000000 0x40000000 0x80000000>;
48 intc: interrupt-controller@80020000 {
49 #interrupt-cells = <1>;
51 compatible = "sirf,prima2-intc";
52 reg = <0x80020000 0x1000>;
56 compatible = "simple-bus";
59 ranges = <0x88000000 0x88000000 0x40000>;
61 clks: clock-controller@88000000 {
62 compatible = "sirf,atlas6-clkc";
63 reg = <0x88000000 0x1000>;
68 rstc: reset-controller@88010000 {
69 compatible = "sirf,prima2-rstc";
70 reg = <0x88010000 0x1000>;
74 rsc-controller@88020000 {
75 compatible = "sirf,prima2-rsc";
76 reg = <0x88020000 0x1000>;
80 compatible = "sirf,prima2-cphifbg";
81 reg = <0x88030000 0x1000>;
87 compatible = "simple-bus";
90 ranges = <0x90000000 0x90000000 0x10000>;
92 memory-controller@90000000 {
93 compatible = "sirf,prima2-memc";
94 reg = <0x90000000 0x2000>;
100 compatible = "sirf,prima2-memcmon";
101 reg = <0x90002000 0x200>;
108 compatible = "simple-bus";
109 #address-cells = <1>;
111 ranges = <0x90010000 0x90010000 0x30000>;
114 compatible = "sirf,prima2-lcd";
115 reg = <0x90010000 0x20000>;
119 /* later transfer to pwm */
120 bl-gpio = <&gpio 7 0>;
121 default-panel = <&panel0>;
125 compatible = "sirf,prima2-vpp";
126 reg = <0x90020000 0x10000>;
133 compatible = "simple-bus";
134 #address-cells = <1>;
136 ranges = <0x98000000 0x98000000 0x8000000>;
139 compatible = "powervr,sgx510";
140 reg = <0x98000000 0x8000000>;
147 compatible = "simple-bus";
148 #address-cells = <1>;
150 ranges = <0xa0000000 0xa0000000 0x8000000>;
153 compatible = "sirf,atlas6-ble";
154 reg = <0xa0000000 0x2000>;
161 compatible = "simple-bus";
162 #address-cells = <1>;
164 ranges = <0xa8000000 0xa8000000 0x2000000>;
167 compatible = "sirf,prima2-dspif";
168 reg = <0xa8000000 0x10000>;
173 compatible = "sirf,prima2-gps";
174 reg = <0xa8010000 0x10000>;
180 compatible = "sirf,prima2-dsp";
181 reg = <0xa9000000 0x1000000>;
188 compatible = "simple-bus";
189 #address-cells = <1>;
191 ranges = <0xb0000000 0xb0000000 0x180000>,
192 <0x56000000 0x56000000 0x1b00000>;
195 compatible = "sirf,prima2-tick";
196 reg = <0xb0020000 0x1000>;
201 compatible = "sirf,prima2-nand";
202 reg = <0xb0030000 0x10000>;
208 compatible = "sirf,prima2-audio";
209 reg = <0xb0040000 0x10000>;
214 uart0: uart@b0050000 {
216 compatible = "sirf,prima2-uart";
217 reg = <0xb0050000 0x1000>;
221 dmas = <&dmac1 5>, <&dmac0 2>;
222 dma-names = "rx", "tx";
225 uart1: uart@b0060000 {
227 compatible = "sirf,prima2-uart";
228 reg = <0xb0060000 0x1000>;
232 dma-names = "no-rx", "no-tx";
235 uart2: uart@b0070000 {
237 compatible = "sirf,prima2-uart";
238 reg = <0xb0070000 0x1000>;
242 dmas = <&dmac0 6>, <&dmac0 7>;
243 dma-names = "rx", "tx";
248 compatible = "sirf,prima2-usp";
249 reg = <0xb0080000 0x10000>;
253 dmas = <&dmac1 1>, <&dmac1 2>;
254 dma-names = "rx", "tx";
259 compatible = "sirf,prima2-usp";
260 reg = <0xb0090000 0x10000>;
264 dmas = <&dmac0 14>, <&dmac0 15>;
265 dma-names = "rx", "tx";
268 dmac0: dma-controller@b00b0000 {
270 compatible = "sirf,prima2-dmac";
271 reg = <0xb00b0000 0x10000>;
277 dmac1: dma-controller@b0160000 {
279 compatible = "sirf,prima2-dmac";
280 reg = <0xb0160000 0x10000>;
287 compatible = "sirf,prima2-vip";
288 reg = <0xb00C0000 0x10000>;
291 sirf,vip-dma-rx-channel = <16>;
296 compatible = "sirf,prima2-spi";
297 reg = <0xb00d0000 0x10000>;
299 sirf,spi-num-chipselects = <1>;
300 cs-gpios = <&gpio 0 0>;
301 sirf,spi-dma-rx-channel = <25>;
302 sirf,spi-dma-tx-channel = <20>;
303 #address-cells = <1>;
311 compatible = "sirf,prima2-spi";
312 reg = <0xb0170000 0x10000>;
314 sirf,spi-num-chipselects = <1>;
315 sirf,spi-dma-rx-channel = <12>;
316 sirf,spi-dma-tx-channel = <13>;
317 #address-cells = <1>;
325 compatible = "sirf,prima2-i2c";
326 reg = <0xb00e0000 0x10000>;
328 #address-cells = <1>;
335 compatible = "sirf,prima2-i2c";
336 reg = <0xb00f0000 0x10000>;
338 #address-cells = <1>;
344 compatible = "sirf,prima2-tsc";
345 reg = <0xb0110000 0x10000>;
350 gpio: pinctrl@b0120000 {
352 #interrupt-cells = <2>;
353 compatible = "sirf,atlas6-pinctrl";
354 reg = <0xb0120000 0x10000>;
355 interrupts = <43 44 45 46 47>;
357 interrupt-controller;
359 lcd_16pins_a: lcd0@0 {
361 sirf,pins = "lcd_16bitsgrp";
362 sirf,function = "lcd_16bits";
365 lcd_18pins_a: lcd0@1 {
367 sirf,pins = "lcd_18bitsgrp";
368 sirf,function = "lcd_18bits";
371 lcd_24pins_a: lcd0@2 {
373 sirf,pins = "lcd_24bitsgrp";
374 sirf,function = "lcd_24bits";
377 lcdrom_pins_a: lcdrom0@0 {
379 sirf,pins = "lcdromgrp";
380 sirf,function = "lcdrom";
383 uart0_pins_a: uart0@0 {
385 sirf,pins = "uart0grp";
386 sirf,function = "uart0";
389 uart0_noflow_pins_a: uart0@1 {
391 sirf,pins = "uart0_nostreamctrlgrp";
392 sirf,function = "uart0_nostreamctrl";
395 uart1_pins_a: uart1@0 {
397 sirf,pins = "uart1grp";
398 sirf,function = "uart1";
401 uart2_pins_a: uart2@0 {
403 sirf,pins = "uart2grp";
404 sirf,function = "uart2";
407 uart2_noflow_pins_a: uart2@1 {
409 sirf,pins = "uart2_nostreamctrlgrp";
410 sirf,function = "uart2_nostreamctrl";
413 spi0_pins_a: spi0@0 {
415 sirf,pins = "spi0grp";
416 sirf,function = "spi0";
419 spi1_pins_a: spi1@0 {
421 sirf,pins = "spi1grp";
422 sirf,function = "spi1";
425 i2c0_pins_a: i2c0@0 {
427 sirf,pins = "i2c0grp";
428 sirf,function = "i2c0";
431 i2c1_pins_a: i2c1@0 {
433 sirf,pins = "i2c1grp";
434 sirf,function = "i2c1";
437 pwm0_pins_a: pwm0@0 {
439 sirf,pins = "pwm0grp";
440 sirf,function = "pwm0";
443 pwm1_pins_a: pwm1@0 {
445 sirf,pins = "pwm1grp";
446 sirf,function = "pwm1";
449 pwm2_pins_a: pwm2@0 {
451 sirf,pins = "pwm2grp";
452 sirf,function = "pwm2";
455 pwm3_pins_a: pwm3@0 {
457 sirf,pins = "pwm3grp";
458 sirf,function = "pwm3";
461 pwm4_pins_a: pwm4@0 {
463 sirf,pins = "pwm4grp";
464 sirf,function = "pwm4";
469 sirf,pins = "gpsgrp";
470 sirf,function = "gps";
475 sirf,pins = "vipgrp";
476 sirf,function = "vip";
479 sdmmc0_pins_a: sdmmc0@0 {
481 sirf,pins = "sdmmc0grp";
482 sirf,function = "sdmmc0";
485 sdmmc1_pins_a: sdmmc1@0 {
487 sirf,pins = "sdmmc1grp";
488 sirf,function = "sdmmc1";
491 sdmmc2_pins_a: sdmmc2@0 {
493 sirf,pins = "sdmmc2grp";
494 sirf,function = "sdmmc2";
497 sdmmc2_nowp_pins_a: sdmmc2_nowp@0 {
499 sirf,pins = "sdmmc2_nowpgrp";
500 sirf,function = "sdmmc2_nowp";
503 sdmmc3_pins_a: sdmmc3@0 {
505 sirf,pins = "sdmmc3grp";
506 sirf,function = "sdmmc3";
509 sdmmc5_pins_a: sdmmc5@0 {
511 sirf,pins = "sdmmc5grp";
512 sirf,function = "sdmmc5";
517 sirf,pins = "i2sgrp";
518 sirf,function = "i2s";
521 i2s_no_din_pins_a: i2s_no_din@0 {
523 sirf,pins = "i2s_no_dingrp";
524 sirf,function = "i2s_no_din";
527 i2s_6chn_pins_a: i2s_6chn@0 {
529 sirf,pins = "i2s_6chngrp";
530 sirf,function = "i2s_6chn";
533 ac97_pins_a: ac97@0 {
535 sirf,pins = "ac97grp";
536 sirf,function = "ac97";
539 nand_pins_a: nand@0 {
541 sirf,pins = "nandgrp";
542 sirf,function = "nand";
545 usp0_pins_a: usp0@0 {
547 sirf,pins = "usp0grp";
548 sirf,function = "usp0";
551 usp0_uart_nostreamctrl_pins_a: usp0@1 {
553 sirf,pins = "usp0_uart_nostreamctrl_grp";
554 sirf,function = "usp0_uart_nostreamctrl";
557 usp1_pins_a: usp1@0 {
559 sirf,pins = "usp1grp";
560 sirf,function = "usp1";
563 usp1_uart_nostreamctrl_pins_a: usp1@1 {
565 sirf,pins = "usp1_uart_nostreamctrl_grp";
566 sirf,function = "usp1_uart_nostreamctrl";
569 usb0_upli_drvbus_pins_a: usb0_upli_drvbus@0 {
571 sirf,pins = "usb0_upli_drvbusgrp";
572 sirf,function = "usb0_upli_drvbus";
575 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
577 sirf,pins = "usb1_utmi_drvbusgrp";
578 sirf,function = "usb1_utmi_drvbus";
581 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
583 sirf,pins = "usb1_dp_dngrp";
584 sirf,function = "usb1_dp_dn";
587 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
588 uart1_route_io_usb1 {
589 sirf,pins = "uart1_route_io_usb1grp";
590 sirf,function = "uart1_route_io_usb1";
593 warm_rst_pins_a: warm_rst@0 {
595 sirf,pins = "warm_rstgrp";
596 sirf,function = "warm_rst";
599 pulse_count_pins_a: pulse_count@0 {
601 sirf,pins = "pulse_countgrp";
602 sirf,function = "pulse_count";
605 cko0_pins_a: cko0@0 {
607 sirf,pins = "cko0grp";
608 sirf,function = "cko0";
611 cko1_pins_a: cko1@0 {
613 sirf,pins = "cko1grp";
614 sirf,function = "cko1";
620 compatible = "sirf,prima2-pwm";
621 reg = <0xb0130000 0x10000>;
626 compatible = "sirf,prima2-efuse";
627 reg = <0xb0140000 0x10000>;
632 compatible = "sirf,prima2-pulsec";
633 reg = <0xb0150000 0x10000>;
639 compatible = "sirf,prima2-pciiobg", "simple-bus";
640 #address-cells = <1>;
642 ranges = <0x56000000 0x56000000 0x1b00000>;
644 sd0: sdhci@56000000 {
646 compatible = "sirf,prima2-sdhc";
647 reg = <0x56000000 0x100000>;
653 sd1: sdhci@56100000 {
655 compatible = "sirf,prima2-sdhc";
656 reg = <0x56100000 0x100000>;
663 sd2: sdhci@56200000 {
665 compatible = "sirf,prima2-sdhc";
666 reg = <0x56200000 0x100000>;
673 sd3: sdhci@56300000 {
675 compatible = "sirf,prima2-sdhc";
676 reg = <0x56300000 0x100000>;
683 sd5: sdhci@56500000 {
685 compatible = "sirf,prima2-sdhc";
686 reg = <0x56500000 0x100000>;
694 compatible = "sirf,prima2-pcicp";
695 reg = <0x57900000 0x100000>;
699 rom-interface@57a00000 {
700 compatible = "sirf,prima2-romif";
701 reg = <0x57a00000 0x100000>;
707 compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
708 #address-cells = <1>;
710 reg = <0x80030000 0x10000>;
713 compatible = "sirf,prima2-gpsrtc";
714 reg = <0x1000 0x1000>;
715 interrupts = <55 56 57>;
719 compatible = "sirf,prima2-sysrtc";
720 reg = <0x2000 0x1000>;
721 interrupts = <52 53 54>;
725 compatible = "sirf,prima2-minigpsrtc";
726 reg = <0x2000 0x1000>;
731 compatible = "sirf,prima2-pwrc";
732 reg = <0x3000 0x1000>;
738 compatible = "simple-bus";
739 #address-cells = <1>;
741 ranges = <0xb8000000 0xb8000000 0x40000>;
744 compatible = "chipidea,ci13611a-prima2";
745 reg = <0xb8000000 0x10000>;
751 compatible = "chipidea,ci13611a-prima2";
752 reg = <0xb8010000 0x10000>;
758 compatible = "sirf,prima2-security";
759 reg = <0xb8030000 0x10000>;