2 * DTS file for CSR SiRFatlas6 SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 /include/ "skeleton.dtsi"
11 compatible = "sirf,atlas6";
14 interrupt-parent = <&intc>;
22 d-cache-line-size = <32>;
23 i-cache-line-size = <32>;
24 d-cache-size = <32768>;
25 i-cache-size = <32768>;
27 timebase-frequency = <0>;
29 clock-frequency = <0>;
38 clock-latency = <150000>;
43 compatible = "arm,cortex-a9-pmu";
48 compatible = "simple-bus";
51 ranges = <0x40000000 0x40000000 0x80000000>;
53 intc: interrupt-controller@80020000 {
54 #interrupt-cells = <1>;
56 compatible = "sirf,prima2-intc";
57 reg = <0x80020000 0x1000>;
61 compatible = "simple-bus";
64 ranges = <0x88000000 0x88000000 0x40000>;
66 clks: clock-controller@88000000 {
67 compatible = "sirf,atlas6-clkc";
68 reg = <0x88000000 0x1000>;
73 rstc: reset-controller@88010000 {
74 compatible = "sirf,prima2-rstc";
75 reg = <0x88010000 0x1000>;
79 rsc-controller@88020000 {
80 compatible = "sirf,prima2-rsc";
81 reg = <0x88020000 0x1000>;
85 compatible = "sirf,prima2-cphifbg";
86 reg = <0x88030000 0x1000>;
92 compatible = "simple-bus";
95 ranges = <0x90000000 0x90000000 0x10000>;
97 memory-controller@90000000 {
98 compatible = "sirf,prima2-memc";
99 reg = <0x90000000 0x2000>;
105 compatible = "sirf,prima2-memcmon";
106 reg = <0x90002000 0x200>;
113 compatible = "simple-bus";
114 #address-cells = <1>;
116 ranges = <0x90010000 0x90010000 0x30000>;
119 compatible = "sirf,prima2-lcd";
120 reg = <0x90010000 0x20000>;
124 /* later transfer to pwm */
125 bl-gpio = <&gpio 7 0>;
126 default-panel = <&panel0>;
130 compatible = "sirf,prima2-vpp";
131 reg = <0x90020000 0x10000>;
138 compatible = "simple-bus";
139 #address-cells = <1>;
141 ranges = <0x98000000 0x98000000 0x8000000>;
144 compatible = "powervr,sgx510";
145 reg = <0x98000000 0x8000000>;
152 compatible = "simple-bus";
153 #address-cells = <1>;
155 ranges = <0xa0000000 0xa0000000 0x8000000>;
158 compatible = "sirf,atlas6-ble";
159 reg = <0xa0000000 0x2000>;
166 compatible = "simple-bus";
167 #address-cells = <1>;
169 ranges = <0xa8000000 0xa8000000 0x2000000>;
172 compatible = "sirf,prima2-dspif";
173 reg = <0xa8000000 0x10000>;
179 compatible = "sirf,prima2-gps";
180 reg = <0xa8010000 0x10000>;
187 compatible = "sirf,prima2-dsp";
188 reg = <0xa9000000 0x1000000>;
196 compatible = "simple-bus";
197 #address-cells = <1>;
199 ranges = <0xb0000000 0xb0000000 0x180000>,
200 <0x56000000 0x56000000 0x1b00000>;
203 compatible = "sirf,prima2-tick";
204 reg = <0xb0020000 0x1000>;
210 compatible = "sirf,prima2-nand";
211 reg = <0xb0030000 0x10000>;
217 compatible = "sirf,prima2-audio";
218 reg = <0xb0040000 0x10000>;
223 uart0: uart@b0050000 {
225 compatible = "sirf,prima2-uart";
226 reg = <0xb0050000 0x1000>;
230 dmas = <&dmac1 5>, <&dmac0 2>;
231 dma-names = "rx", "tx";
234 uart1: uart@b0060000 {
236 compatible = "sirf,prima2-uart";
237 reg = <0xb0060000 0x1000>;
241 dma-names = "no-rx", "no-tx";
244 uart2: uart@b0070000 {
246 compatible = "sirf,prima2-uart";
247 reg = <0xb0070000 0x1000>;
251 dmas = <&dmac0 6>, <&dmac0 7>;
252 dma-names = "rx", "tx";
257 compatible = "sirf,prima2-usp";
258 reg = <0xb0080000 0x10000>;
262 dmas = <&dmac1 1>, <&dmac1 2>;
263 dma-names = "rx", "tx";
268 compatible = "sirf,prima2-usp";
269 reg = <0xb0090000 0x10000>;
273 dmas = <&dmac0 14>, <&dmac0 15>;
274 dma-names = "rx", "tx";
277 dmac0: dma-controller@b00b0000 {
279 compatible = "sirf,prima2-dmac";
280 reg = <0xb00b0000 0x10000>;
286 dmac1: dma-controller@b0160000 {
288 compatible = "sirf,prima2-dmac";
289 reg = <0xb0160000 0x10000>;
296 compatible = "sirf,prima2-vip";
297 reg = <0xb00C0000 0x10000>;
300 sirf,vip-dma-rx-channel = <16>;
305 compatible = "sirf,prima2-spi";
306 reg = <0xb00d0000 0x10000>;
308 sirf,spi-num-chipselects = <1>;
311 dma-names = "rx", "tx";
312 #address-cells = <1>;
320 compatible = "sirf,prima2-spi";
321 reg = <0xb0170000 0x10000>;
323 sirf,spi-num-chipselects = <1>;
326 dma-names = "rx", "tx";
327 #address-cells = <1>;
335 compatible = "sirf,prima2-i2c";
336 reg = <0xb00e0000 0x10000>;
338 #address-cells = <1>;
345 compatible = "sirf,prima2-i2c";
346 reg = <0xb00f0000 0x10000>;
348 #address-cells = <1>;
354 compatible = "sirf,prima2-tsc";
355 reg = <0xb0110000 0x10000>;
360 gpio: pinctrl@b0120000 {
362 #interrupt-cells = <2>;
363 compatible = "sirf,atlas6-pinctrl";
364 reg = <0xb0120000 0x10000>;
365 interrupts = <43 44 45 46 47>;
367 interrupt-controller;
369 lcd_16pins_a: lcd0@0 {
371 sirf,pins = "lcd_16bitsgrp";
372 sirf,function = "lcd_16bits";
375 lcd_18pins_a: lcd0@1 {
377 sirf,pins = "lcd_18bitsgrp";
378 sirf,function = "lcd_18bits";
381 lcd_24pins_a: lcd0@2 {
383 sirf,pins = "lcd_24bitsgrp";
384 sirf,function = "lcd_24bits";
387 lcdrom_pins_a: lcdrom0@0 {
389 sirf,pins = "lcdromgrp";
390 sirf,function = "lcdrom";
393 uart0_pins_a: uart0@0 {
395 sirf,pins = "uart0grp";
396 sirf,function = "uart0";
399 uart0_noflow_pins_a: uart0@1 {
401 sirf,pins = "uart0_nostreamctrlgrp";
402 sirf,function = "uart0_nostreamctrl";
405 uart1_pins_a: uart1@0 {
407 sirf,pins = "uart1grp";
408 sirf,function = "uart1";
411 uart2_pins_a: uart2@0 {
413 sirf,pins = "uart2grp";
414 sirf,function = "uart2";
417 uart2_noflow_pins_a: uart2@1 {
419 sirf,pins = "uart2_nostreamctrlgrp";
420 sirf,function = "uart2_nostreamctrl";
423 spi0_pins_a: spi0@0 {
425 sirf,pins = "spi0grp";
426 sirf,function = "spi0";
429 spi1_pins_a: spi1@0 {
431 sirf,pins = "spi1grp";
432 sirf,function = "spi1";
435 i2c0_pins_a: i2c0@0 {
437 sirf,pins = "i2c0grp";
438 sirf,function = "i2c0";
441 i2c1_pins_a: i2c1@0 {
443 sirf,pins = "i2c1grp";
444 sirf,function = "i2c1";
447 pwm0_pins_a: pwm0@0 {
449 sirf,pins = "pwm0grp";
450 sirf,function = "pwm0";
453 pwm1_pins_a: pwm1@0 {
455 sirf,pins = "pwm1grp";
456 sirf,function = "pwm1";
459 pwm2_pins_a: pwm2@0 {
461 sirf,pins = "pwm2grp";
462 sirf,function = "pwm2";
465 pwm3_pins_a: pwm3@0 {
467 sirf,pins = "pwm3grp";
468 sirf,function = "pwm3";
471 pwm4_pins_a: pwm4@0 {
473 sirf,pins = "pwm4grp";
474 sirf,function = "pwm4";
479 sirf,pins = "gpsgrp";
480 sirf,function = "gps";
485 sirf,pins = "vipgrp";
486 sirf,function = "vip";
489 sdmmc0_pins_a: sdmmc0@0 {
491 sirf,pins = "sdmmc0grp";
492 sirf,function = "sdmmc0";
495 sdmmc1_pins_a: sdmmc1@0 {
497 sirf,pins = "sdmmc1grp";
498 sirf,function = "sdmmc1";
501 sdmmc2_pins_a: sdmmc2@0 {
503 sirf,pins = "sdmmc2grp";
504 sirf,function = "sdmmc2";
507 sdmmc2_nowp_pins_a: sdmmc2_nowp@0 {
509 sirf,pins = "sdmmc2_nowpgrp";
510 sirf,function = "sdmmc2_nowp";
513 sdmmc3_pins_a: sdmmc3@0 {
515 sirf,pins = "sdmmc3grp";
516 sirf,function = "sdmmc3";
519 sdmmc5_pins_a: sdmmc5@0 {
521 sirf,pins = "sdmmc5grp";
522 sirf,function = "sdmmc5";
527 sirf,pins = "i2sgrp";
528 sirf,function = "i2s";
531 i2s_no_din_pins_a: i2s_no_din@0 {
533 sirf,pins = "i2s_no_dingrp";
534 sirf,function = "i2s_no_din";
537 i2s_6chn_pins_a: i2s_6chn@0 {
539 sirf,pins = "i2s_6chngrp";
540 sirf,function = "i2s_6chn";
543 ac97_pins_a: ac97@0 {
545 sirf,pins = "ac97grp";
546 sirf,function = "ac97";
549 nand_pins_a: nand@0 {
551 sirf,pins = "nandgrp";
552 sirf,function = "nand";
555 usp0_pins_a: usp0@0 {
557 sirf,pins = "usp0grp";
558 sirf,function = "usp0";
561 usp0_uart_nostreamctrl_pins_a: usp0@1 {
563 sirf,pins = "usp0_uart_nostreamctrl_grp";
564 sirf,function = "usp0_uart_nostreamctrl";
567 usp0_only_utfs_pins_a: usp0@2 {
569 sirf,pins = "usp0_only_utfs_grp";
570 sirf,function = "usp0_only_utfs";
573 usp0_only_urfs_pins_a: usp0@3 {
575 sirf,pins = "usp0_only_urfs_grp";
576 sirf,function = "usp0_only_urfs";
579 usp1_pins_a: usp1@0 {
581 sirf,pins = "usp1grp";
582 sirf,function = "usp1";
585 usp1_uart_nostreamctrl_pins_a: usp1@1 {
587 sirf,pins = "usp1_uart_nostreamctrl_grp";
588 sirf,function = "usp1_uart_nostreamctrl";
591 usb0_upli_drvbus_pins_a: usb0_upli_drvbus@0 {
593 sirf,pins = "usb0_upli_drvbusgrp";
594 sirf,function = "usb0_upli_drvbus";
597 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
599 sirf,pins = "usb1_utmi_drvbusgrp";
600 sirf,function = "usb1_utmi_drvbus";
603 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
605 sirf,pins = "usb1_dp_dngrp";
606 sirf,function = "usb1_dp_dn";
609 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
610 uart1_route_io_usb1 {
611 sirf,pins = "uart1_route_io_usb1grp";
612 sirf,function = "uart1_route_io_usb1";
615 warm_rst_pins_a: warm_rst@0 {
617 sirf,pins = "warm_rstgrp";
618 sirf,function = "warm_rst";
621 pulse_count_pins_a: pulse_count@0 {
623 sirf,pins = "pulse_countgrp";
624 sirf,function = "pulse_count";
627 cko0_pins_a: cko0@0 {
629 sirf,pins = "cko0grp";
630 sirf,function = "cko0";
633 cko1_pins_a: cko1@0 {
635 sirf,pins = "cko1grp";
636 sirf,function = "cko1";
642 compatible = "sirf,prima2-pwm";
643 reg = <0xb0130000 0x10000>;
648 compatible = "sirf,prima2-efuse";
649 reg = <0xb0140000 0x10000>;
654 compatible = "sirf,prima2-pulsec";
655 reg = <0xb0150000 0x10000>;
661 compatible = "sirf,prima2-pciiobg", "simple-bus";
662 #address-cells = <1>;
664 ranges = <0x56000000 0x56000000 0x1b00000>;
666 sd0: sdhci@56000000 {
668 compatible = "sirf,prima2-sdhc";
669 reg = <0x56000000 0x100000>;
675 sd1: sdhci@56100000 {
677 compatible = "sirf,prima2-sdhc";
678 reg = <0x56100000 0x100000>;
685 sd2: sdhci@56200000 {
687 compatible = "sirf,prima2-sdhc";
688 reg = <0x56200000 0x100000>;
695 sd3: sdhci@56300000 {
697 compatible = "sirf,prima2-sdhc";
698 reg = <0x56300000 0x100000>;
705 sd5: sdhci@56500000 {
707 compatible = "sirf,prima2-sdhc";
708 reg = <0x56500000 0x100000>;
716 compatible = "sirf,prima2-pcicp";
717 reg = <0x57900000 0x100000>;
721 rom-interface@57a00000 {
722 compatible = "sirf,prima2-romif";
723 reg = <0x57a00000 0x100000>;
729 compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
730 #address-cells = <1>;
732 reg = <0x80030000 0x10000>;
735 compatible = "sirf,prima2-gpsrtc";
736 reg = <0x1000 0x1000>;
737 interrupts = <55 56 57>;
741 compatible = "sirf,prima2-sysrtc";
742 reg = <0x2000 0x1000>;
743 interrupts = <52 53 54>;
747 compatible = "sirf,prima2-minigpsrtc";
748 reg = <0x2000 0x1000>;
753 compatible = "sirf,prima2-pwrc";
754 reg = <0x3000 0x1000>;
760 compatible = "simple-bus";
761 #address-cells = <1>;
763 ranges = <0xb8000000 0xb8000000 0x40000>;
766 compatible = "chipidea,ci13611a-prima2";
767 reg = <0xb8000000 0x10000>;
773 compatible = "chipidea,ci13611a-prima2";
774 reg = <0xb8010000 0x10000>;
780 compatible = "sirf,prima2-security";
781 reg = <0xb8030000 0x10000>;