1 /include/ "skeleton.dtsi"
4 compatible = "marvell,dove";
5 model = "Marvell Armada 88AP510 SoC";
14 compatible = "simple-bus";
17 interrupt-parent = <&intc>;
19 ranges = <0xc8000000 0xc8000000 0x0100000 /* CESA SRAM 1M */
20 0xe0000000 0xe0000000 0x8000000 /* PCIe0 Mem 128M */
21 0xe8000000 0xe8000000 0x8000000 /* PCIe1 Mem 128M */
22 0xf0000000 0xf0000000 0x0100000 /* ScratchPad 1M */
23 0x00000000 0xf1000000 0x1000000 /* SB/NB regs 16M */
24 0xf2000000 0xf2000000 0x0100000 /* PCIe0 I/O 1M */
25 0xf2100000 0xf2100000 0x0100000 /* PCIe0 I/O 1M */
26 0xf8000000 0xf8000000 0x8000000>; /* BootROM 128M */
29 compatible = "marvell,tauros2-cache";
30 marvell,tauros2-cache-features = <0>;
33 intc: interrupt-controller {
34 compatible = "marvell,orion-intc";
36 #interrupt-cells = <1>;
37 reg = <0x20204 0x04>, <0x20214 0x04>;
40 core_clk: core-clocks@d0214 {
41 compatible = "marvell,dove-core-clock";
46 gate_clk: clock-gating-control@d0038 {
47 compatible = "marvell,dove-gating-clock";
49 clocks = <&core_clk 0>;
54 compatible = "ns16550a";
55 reg = <0x12000 0x100>;
58 clock-frequency = <166666667>;
63 compatible = "ns16550a";
64 reg = <0x12100 0x100>;
67 clock-frequency = <166666667>;
72 compatible = "ns16550a";
73 reg = <0x12000 0x100>;
76 clock-frequency = <166666667>;
81 compatible = "ns16550a";
82 reg = <0x12100 0x100>;
85 clock-frequency = <166666667>;
90 compatible = "marvell,orion-gpio";
96 interrupts = <12>, <13>, <14>, <60>;
100 compatible = "marvell,orion-gpio";
103 reg = <0xd0420 0x20>;
105 interrupt-controller;
110 compatible = "marvell,orion-gpio";
113 reg = <0xe8400 0x0c>;
117 pinctrl: pinctrl@d0200 {
118 compatible = "marvell,dove-pinctrl";
119 reg = <0xd0200 0x10>;
123 compatible = "marvell,orion-spi";
124 #address-cells = <1>;
128 reg = <0x10600 0x28>;
129 clocks = <&core_clk 0>;
134 compatible = "marvell,orion-spi";
135 #address-cells = <1>;
139 reg = <0x14600 0x28>;
140 clocks = <&core_clk 0>;
145 compatible = "marvell,mv64xxx-i2c";
146 reg = <0x11000 0x20>;
147 #address-cells = <1>;
150 clock-frequency = <400000>;
152 clocks = <&core_clk 0>;
157 compatible = "marvell,dove-sdhci";
158 reg = <0x92000 0x100>;
159 interrupts = <35>, <37>;
160 clocks = <&gate_clk 8>;
165 compatible = "marvell,dove-sdhci";
166 reg = <0x90000 0x100>;
167 interrupts = <36>, <38>;
168 clocks = <&gate_clk 9>;
173 compatible = "marvell,orion-sata";
174 reg = <0xa0000 0x2400>;
176 clocks = <&gate_clk 3>;
181 crypto: crypto@30000 {
182 compatible = "marvell,orion-crypto";
183 reg = <0x30000 0x10000>,
185 reg-names = "regs", "sram";
187 clocks = <&gate_clk 15>;
191 xor0: dma-engine@60800 {
192 compatible = "marvell,orion-xor";
195 clocks = <&gate_clk 23>;
212 xor1: dma-engine@60900 {
213 compatible = "marvell,orion-xor";
216 clocks = <&gate_clk 24>;