1 /include/ "skeleton.dtsi"
4 compatible = "marvell,dove";
5 model = "Marvell Armada 88AP510 SoC";
14 compatible = "simple-bus";
17 interrupt-parent = <&intc>;
19 ranges = <0xc8000000 0xc8000000 0x0100000 /* CESA SRAM 1M */
20 0xe0000000 0xe0000000 0x8000000 /* PCIe0 Mem 128M */
21 0xe8000000 0xe8000000 0x8000000 /* PCIe1 Mem 128M */
22 0xf0000000 0xf0000000 0x0100000 /* ScratchPad 1M */
23 0x00000000 0xf1000000 0x1000000 /* SB/NB regs 16M */
24 0xf2000000 0xf2000000 0x0100000 /* PCIe0 I/O 1M */
25 0xf2100000 0xf2100000 0x0100000 /* PCIe0 I/O 1M */
26 0xf8000000 0xf8000000 0x8000000>; /* BootROM 128M */
29 compatible = "marvell,tauros2-cache";
30 marvell,tauros2-cache-features = <0>;
34 compatible = "marvell,orion-timer";
36 interrupt-parent = <&bridge_intc>;
37 interrupts = <1>, <2>;
38 clocks = <&core_clk 0>;
41 intc: main-interrupt-ctrl@20200 {
42 compatible = "marvell,orion-intc";
44 #interrupt-cells = <1>;
45 reg = <0x20200 0x10>, <0x20210 0x10>;
48 bridge_intc: bridge-interrupt-ctrl@20110 {
49 compatible = "marvell,orion-bridge-intc";
51 #interrupt-cells = <1>;
54 marvell,#interrupts = <5>;
57 core_clk: core-clocks@d0214 {
58 compatible = "marvell,dove-core-clock";
63 gate_clk: clock-gating-control@d0038 {
64 compatible = "marvell,dove-gating-clock";
66 clocks = <&core_clk 0>;
70 thermal: thermal@d001c {
71 compatible = "marvell,dove-thermal";
72 reg = <0xd001c 0x0c>, <0xd005c 0x08>;
76 compatible = "ns16550a";
77 reg = <0x12000 0x100>;
80 clocks = <&core_clk 0>;
85 compatible = "ns16550a";
86 reg = <0x12100 0x100>;
89 clocks = <&core_clk 0>;
94 compatible = "ns16550a";
95 reg = <0x12000 0x100>;
98 clocks = <&core_clk 0>;
102 uart3: serial@12300 {
103 compatible = "ns16550a";
104 reg = <0x12100 0x100>;
107 clocks = <&core_clk 0>;
112 compatible = "marvell,orion-gpio";
115 reg = <0xd0400 0x20>;
117 interrupt-controller;
118 #interrupt-cells = <2>;
119 interrupts = <12>, <13>, <14>, <60>;
123 compatible = "marvell,orion-gpio";
126 reg = <0xd0420 0x20>;
128 interrupt-controller;
129 #interrupt-cells = <2>;
134 compatible = "marvell,orion-gpio";
137 reg = <0xe8400 0x0c>;
141 pinctrl: pinctrl@d0200 {
142 compatible = "marvell,dove-pinctrl";
143 reg = <0xd0200 0x10>;
144 clocks = <&gate_clk 22>;
148 compatible = "marvell,orion-spi";
149 #address-cells = <1>;
153 reg = <0x10600 0x28>;
154 clocks = <&core_clk 0>;
159 compatible = "marvell,orion-spi";
160 #address-cells = <1>;
164 reg = <0x14600 0x28>;
165 clocks = <&core_clk 0>;
170 compatible = "marvell,mv64xxx-i2c";
171 reg = <0x11000 0x20>;
172 #address-cells = <1>;
175 clock-frequency = <400000>;
177 clocks = <&core_clk 0>;
181 ehci0: usb-host@50000 {
182 compatible = "marvell,orion-ehci";
183 reg = <0x50000 0x1000>;
185 clocks = <&gate_clk 0>;
189 ehci1: usb-host@51000 {
190 compatible = "marvell,orion-ehci";
191 reg = <0x51000 0x1000>;
193 clocks = <&gate_clk 1>;
198 compatible = "marvell,dove-sdhci";
199 reg = <0x92000 0x100>;
200 interrupts = <35>, <37>;
201 clocks = <&gate_clk 8>;
206 compatible = "marvell,dove-sdhci";
207 reg = <0x90000 0x100>;
208 interrupts = <36>, <38>;
209 clocks = <&gate_clk 9>;
214 compatible = "marvell,orion-sata";
215 reg = <0xa0000 0x2400>;
217 clocks = <&gate_clk 3>;
223 compatible = "marvell,orion-rtc";
224 reg = <0xd8500 0x20>;
227 crypto: crypto@30000 {
228 compatible = "marvell,orion-crypto";
229 reg = <0x30000 0x10000>,
231 reg-names = "regs", "sram";
233 clocks = <&gate_clk 15>;
237 xor0: dma-engine@60800 {
238 compatible = "marvell,orion-xor";
241 clocks = <&gate_clk 23>;
258 xor1: dma-engine@60900 {
259 compatible = "marvell,orion-xor";
262 clocks = <&gate_clk 24>;
279 mdio: mdio-bus@72004 {
280 compatible = "marvell,orion-mdio";
281 #address-cells = <1>;
283 reg = <0x72004 0x84>;
285 clocks = <&gate_clk 2>;
288 ethphy: ethernet-phy {
289 device-type = "ethernet-phy";
290 /* set phy address in board file */
294 eth: ethernet-controller@72000 {
295 compatible = "marvell,orion-eth";
296 #address-cells = <1>;
298 reg = <0x72000 0x4000>;
299 clocks = <&gate_clk 2>;
300 marvell,tx-checksum-limit = <1600>;
304 device_type = "network";
305 compatible = "marvell,orion-eth-port";
308 /* overwrite MAC address in bootloader */
309 local-mac-address = [00 00 00 00 00 00];
310 phy-handle = <ðphy>;