2 * SAMSUNG EXYNOS5250 SoC device tree source
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
7 * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
8 * EXYNOS5250 based board files can include this file and provide
9 * values for board specfic bindings.
11 * Note: This file does not include device nodes for all the controllers in
12 * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
13 * additional nodes can be added to this file.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
20 #include "exynos5.dtsi"
21 #include "exynos5250-pinctrl.dtsi"
23 #include <dt-bindings/clk/exynos-audss-clk.h>
26 compatible = "samsung,exynos5250";
49 pinctrl0 = &pinctrl_0;
50 pinctrl1 = &pinctrl_1;
51 pinctrl2 = &pinctrl_2;
52 pinctrl3 = &pinctrl_3;
61 compatible = "arm,cortex-a15";
66 compatible = "arm,cortex-a15";
71 pd_gsc: gsc-power-domain@10044000 {
72 compatible = "samsung,exynos4210-pd";
73 reg = <0x10044000 0x20>;
76 pd_mfc: mfc-power-domain@10044040 {
77 compatible = "samsung,exynos4210-pd";
78 reg = <0x10044040 0x20>;
81 clock: clock-controller@10010000 {
82 compatible = "samsung,exynos5250-clock";
83 reg = <0x10010000 0x30000>;
87 clock_audss: audss-clock-controller@3810000 {
88 compatible = "samsung,exynos5250-audss-clock";
89 reg = <0x03810000 0x0C>;
94 compatible = "arm,armv7-timer";
95 interrupts = <1 13 0xf08>,
102 compatible = "samsung,exynos4210-mct";
103 reg = <0x101C0000 0x800>;
104 interrupt-controller;
105 #interrups-cells = <2>;
106 interrupt-parent = <&mct_map>;
107 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
109 clocks = <&clock 1>, <&clock 335>;
110 clock-names = "fin_pll", "mct";
113 #interrupt-cells = <2>;
114 #address-cells = <0>;
116 interrupt-map = <0x0 0 &combiner 23 3>,
117 <0x1 0 &combiner 23 4>,
118 <0x2 0 &combiner 25 2>,
119 <0x3 0 &combiner 25 3>,
120 <0x4 0 &gic 0 120 0>,
121 <0x5 0 &gic 0 121 0>;
126 compatible = "arm,cortex-a15-pmu";
127 interrupt-parent = <&combiner>;
128 interrupts = <1 2>, <22 4>;
131 pinctrl_0: pinctrl@11400000 {
132 compatible = "samsung,exynos5250-pinctrl";
133 reg = <0x11400000 0x1000>;
134 interrupts = <0 46 0>;
136 wakup_eint: wakeup-interrupt-controller {
137 compatible = "samsung,exynos4210-wakeup-eint";
138 interrupt-parent = <&gic>;
139 interrupts = <0 32 0>;
143 pinctrl_1: pinctrl@13400000 {
144 compatible = "samsung,exynos5250-pinctrl";
145 reg = <0x13400000 0x1000>;
146 interrupts = <0 45 0>;
149 pinctrl_2: pinctrl@10d10000 {
150 compatible = "samsung,exynos5250-pinctrl";
151 reg = <0x10d10000 0x1000>;
152 interrupts = <0 50 0>;
155 pinctrl_3: pinctrl@03860000 {
156 compatible = "samsung,exynos5250-pinctrl";
157 reg = <0x03860000 0x1000>;
158 interrupts = <0 47 0>;
162 clocks = <&clock 336>;
163 clock-names = "watchdog";
167 compatible = "samsung,exynos5250-g2d";
168 reg = <0x10850000 0x1000>;
169 interrupts = <0 91 0>;
170 clocks = <&clock 345>;
171 clock-names = "fimg2d";
175 compatible = "samsung,mfc-v6";
176 reg = <0x11000000 0x10000>;
177 interrupts = <0 96 0>;
178 samsung,power-domain = <&pd_mfc>;
179 clocks = <&clock 266>;
184 clocks = <&clock 337>;
190 compatible = "samsung,exynos5250-tmu";
191 reg = <0x10060000 0x100>;
192 interrupts = <0 65 0>;
193 clocks = <&clock 338>;
194 clock-names = "tmu_apbif";
198 clocks = <&clock 289>, <&clock 146>;
199 clock-names = "uart", "clk_uart_baud0";
203 clocks = <&clock 290>, <&clock 147>;
204 clock-names = "uart", "clk_uart_baud0";
208 clocks = <&clock 291>, <&clock 148>;
209 clock-names = "uart", "clk_uart_baud0";
213 clocks = <&clock 292>, <&clock 149>;
214 clock-names = "uart", "clk_uart_baud0";
218 compatible = "samsung,exynos5-sata-ahci";
219 reg = <0x122F0000 0x1ff>;
220 interrupts = <0 115 0>;
221 clocks = <&clock 277>, <&clock 143>;
222 clock-names = "sata", "sclk_sata";
226 compatible = "samsung,exynos5-sata-phy";
227 reg = <0x12170000 0x1ff>;
230 i2c_0: i2c@12C60000 {
231 compatible = "samsung,s3c2440-i2c";
232 reg = <0x12C60000 0x100>;
233 interrupts = <0 56 0>;
234 #address-cells = <1>;
236 clocks = <&clock 294>;
238 pinctrl-names = "default";
239 pinctrl-0 = <&i2c0_bus>;
242 i2c_1: i2c@12C70000 {
243 compatible = "samsung,s3c2440-i2c";
244 reg = <0x12C70000 0x100>;
245 interrupts = <0 57 0>;
246 #address-cells = <1>;
248 clocks = <&clock 295>;
250 pinctrl-names = "default";
251 pinctrl-0 = <&i2c1_bus>;
254 i2c_2: i2c@12C80000 {
255 compatible = "samsung,s3c2440-i2c";
256 reg = <0x12C80000 0x100>;
257 interrupts = <0 58 0>;
258 #address-cells = <1>;
260 clocks = <&clock 296>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&i2c2_bus>;
266 i2c_3: i2c@12C90000 {
267 compatible = "samsung,s3c2440-i2c";
268 reg = <0x12C90000 0x100>;
269 interrupts = <0 59 0>;
270 #address-cells = <1>;
272 clocks = <&clock 297>;
274 pinctrl-names = "default";
275 pinctrl-0 = <&i2c3_bus>;
278 i2c_4: i2c@12CA0000 {
279 compatible = "samsung,s3c2440-i2c";
280 reg = <0x12CA0000 0x100>;
281 interrupts = <0 60 0>;
282 #address-cells = <1>;
284 clocks = <&clock 298>;
286 pinctrl-names = "default";
287 pinctrl-0 = <&i2c4_bus>;
290 i2c_5: i2c@12CB0000 {
291 compatible = "samsung,s3c2440-i2c";
292 reg = <0x12CB0000 0x100>;
293 interrupts = <0 61 0>;
294 #address-cells = <1>;
296 clocks = <&clock 299>;
298 pinctrl-names = "default";
299 pinctrl-0 = <&i2c5_bus>;
302 i2c_6: i2c@12CC0000 {
303 compatible = "samsung,s3c2440-i2c";
304 reg = <0x12CC0000 0x100>;
305 interrupts = <0 62 0>;
306 #address-cells = <1>;
308 clocks = <&clock 300>;
310 pinctrl-names = "default";
311 pinctrl-0 = <&i2c6_bus>;
314 i2c_7: i2c@12CD0000 {
315 compatible = "samsung,s3c2440-i2c";
316 reg = <0x12CD0000 0x100>;
317 interrupts = <0 63 0>;
318 #address-cells = <1>;
320 clocks = <&clock 301>;
322 pinctrl-names = "default";
323 pinctrl-0 = <&i2c7_bus>;
326 i2c_8: i2c@12CE0000 {
327 compatible = "samsung,s3c2440-hdmiphy-i2c";
328 reg = <0x12CE0000 0x1000>;
329 interrupts = <0 64 0>;
330 #address-cells = <1>;
332 clocks = <&clock 302>;
337 compatible = "samsung,exynos5-sata-phy-i2c";
338 reg = <0x121D0000 0x100>;
339 #address-cells = <1>;
341 clocks = <&clock 288>;
345 spi_0: spi@12d20000 {
346 compatible = "samsung,exynos4210-spi";
347 reg = <0x12d20000 0x100>;
348 interrupts = <0 66 0>;
351 dma-names = "tx", "rx";
352 #address-cells = <1>;
354 clocks = <&clock 304>, <&clock 154>;
355 clock-names = "spi", "spi_busclk0";
356 pinctrl-names = "default";
357 pinctrl-0 = <&spi0_bus>;
360 spi_1: spi@12d30000 {
361 compatible = "samsung,exynos4210-spi";
362 reg = <0x12d30000 0x100>;
363 interrupts = <0 67 0>;
366 dma-names = "tx", "rx";
367 #address-cells = <1>;
369 clocks = <&clock 305>, <&clock 155>;
370 clock-names = "spi", "spi_busclk0";
371 pinctrl-names = "default";
372 pinctrl-0 = <&spi1_bus>;
375 spi_2: spi@12d40000 {
376 compatible = "samsung,exynos4210-spi";
377 reg = <0x12d40000 0x100>;
378 interrupts = <0 68 0>;
381 dma-names = "tx", "rx";
382 #address-cells = <1>;
384 clocks = <&clock 306>, <&clock 156>;
385 clock-names = "spi", "spi_busclk0";
386 pinctrl-names = "default";
387 pinctrl-0 = <&spi2_bus>;
390 dwmmc_0: dwmmc0@12200000 {
391 reg = <0x12200000 0x1000>;
392 clocks = <&clock 280>, <&clock 139>;
393 clock-names = "biu", "ciu";
396 dwmmc_1: dwmmc1@12210000 {
397 reg = <0x12210000 0x1000>;
398 clocks = <&clock 281>, <&clock 140>;
399 clock-names = "biu", "ciu";
402 dwmmc_2: dwmmc2@12220000 {
403 reg = <0x12220000 0x1000>;
404 clocks = <&clock 282>, <&clock 141>;
405 clock-names = "biu", "ciu";
408 dwmmc_3: dwmmc3@12230000 {
409 compatible = "samsung,exynos5250-dw-mshc";
410 reg = <0x12230000 0x1000>;
411 interrupts = <0 78 0>;
412 #address-cells = <1>;
414 clocks = <&clock 283>, <&clock 142>;
415 clock-names = "biu", "ciu";
419 compatible = "samsung,s5pv210-i2s";
420 reg = <0x03830000 0x100>;
424 dma-names = "tx", "rx", "tx-sec";
425 clocks = <&clock_audss EXYNOS_I2S_BUS>,
426 <&clock_audss EXYNOS_I2S_BUS>,
427 <&clock_audss EXYNOS_SCLK_I2S>;
428 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
429 samsung,idma-addr = <0x03000000>;
430 pinctrl-names = "default";
431 pinctrl-0 = <&i2s0_bus>;
435 compatible = "samsung,s3c6410-i2s";
436 reg = <0x12D60000 0x100>;
439 dma-names = "tx", "rx";
440 clocks = <&clock 307>, <&clock 157>;
441 clock-names = "iis", "i2s_opclk0";
442 pinctrl-names = "default";
443 pinctrl-0 = <&i2s1_bus>;
447 compatible = "samsung,s3c6410-i2s";
448 reg = <0x12D70000 0x100>;
451 dma-names = "tx", "rx";
452 clocks = <&clock 308>, <&clock 158>;
453 clock-names = "iis", "i2s_opclk0";
454 pinctrl-names = "default";
455 pinctrl-0 = <&i2s2_bus>;
459 compatible = "samsung,exynos5250-dwusb3";
460 clocks = <&clock 286>;
461 clock-names = "usbdrd30";
462 #address-cells = <1>;
467 compatible = "synopsys,dwc3";
468 reg = <0x12000000 0x10000>;
469 interrupts = <0 72 0>;
470 usb-phy = <&usb2_phy &usb3_phy>;
474 usb3_phy: usbphy@12100000 {
475 compatible = "samsung,exynos5250-usb3phy";
476 reg = <0x12100000 0x100>;
477 clocks = <&clock 1>, <&clock 286>;
478 clock-names = "ext_xtal", "usbdrd30";
479 #address-cells = <1>;
484 reg = <0x10040704 0x8>;
489 compatible = "samsung,exynos4210-ehci";
490 reg = <0x12110000 0x100>;
491 interrupts = <0 71 0>;
493 clocks = <&clock 285>;
494 clock-names = "usbhost";
498 compatible = "samsung,exynos4210-ohci";
499 reg = <0x12120000 0x100>;
500 interrupts = <0 71 0>;
502 clocks = <&clock 285>;
503 clock-names = "usbhost";
506 usb2_phy: usbphy@12130000 {
507 compatible = "samsung,exynos5250-usb2phy";
508 reg = <0x12130000 0x100>;
509 clocks = <&clock 1>, <&clock 285>;
510 clock-names = "ext_xtal", "usbhost";
511 #address-cells = <1>;
516 reg = <0x10040704 0x8>,
522 #address-cells = <1>;
524 compatible = "arm,amba-bus";
525 interrupt-parent = <&gic>;
528 pdma0: pdma@121A0000 {
529 compatible = "arm,pl330", "arm,primecell";
530 reg = <0x121A0000 0x1000>;
531 interrupts = <0 34 0>;
532 clocks = <&clock 275>;
533 clock-names = "apb_pclk";
536 #dma-requests = <32>;
539 pdma1: pdma@121B0000 {
540 compatible = "arm,pl330", "arm,primecell";
541 reg = <0x121B0000 0x1000>;
542 interrupts = <0 35 0>;
543 clocks = <&clock 276>;
544 clock-names = "apb_pclk";
547 #dma-requests = <32>;
550 mdma0: mdma@10800000 {
551 compatible = "arm,pl330", "arm,primecell";
552 reg = <0x10800000 0x1000>;
553 interrupts = <0 33 0>;
554 clocks = <&clock 271>;
555 clock-names = "apb_pclk";
561 mdma1: mdma@11C10000 {
562 compatible = "arm,pl330", "arm,primecell";
563 reg = <0x11C10000 0x1000>;
564 interrupts = <0 124 0>;
565 clocks = <&clock 271>;
566 clock-names = "apb_pclk";
573 gsc_0: gsc@13e00000 {
574 compatible = "samsung,exynos5-gsc";
575 reg = <0x13e00000 0x1000>;
576 interrupts = <0 85 0>;
577 samsung,power-domain = <&pd_gsc>;
578 clocks = <&clock 256>;
579 clock-names = "gscl";
582 gsc_1: gsc@13e10000 {
583 compatible = "samsung,exynos5-gsc";
584 reg = <0x13e10000 0x1000>;
585 interrupts = <0 86 0>;
586 samsung,power-domain = <&pd_gsc>;
587 clocks = <&clock 257>;
588 clock-names = "gscl";
591 gsc_2: gsc@13e20000 {
592 compatible = "samsung,exynos5-gsc";
593 reg = <0x13e20000 0x1000>;
594 interrupts = <0 87 0>;
595 samsung,power-domain = <&pd_gsc>;
596 clocks = <&clock 258>;
597 clock-names = "gscl";
600 gsc_3: gsc@13e30000 {
601 compatible = "samsung,exynos5-gsc";
602 reg = <0x13e30000 0x1000>;
603 interrupts = <0 88 0>;
604 samsung,power-domain = <&pd_gsc>;
605 clocks = <&clock 259>;
606 clock-names = "gscl";
610 compatible = "samsung,exynos4212-hdmi";
611 reg = <0x14530000 0x70000>;
612 interrupts = <0 95 0>;
613 clocks = <&clock 333>, <&clock 136>, <&clock 137>,
614 <&clock 333>, <&clock 333>;
615 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
616 "sclk_hdmiphy", "hdmiphy";
620 compatible = "samsung,exynos5250-mixer";
621 reg = <0x14450000 0x10000>;
622 interrupts = <0 94 0>;
625 dp_phy: video-phy@10040720 {
626 compatible = "samsung,exynos5250-dp-video-phy";
627 reg = <0x10040720 4>;
631 dp-controller@145B0000 {
632 clocks = <&clock 342>;
639 clocks = <&clock 133>, <&clock 339>;
640 clock-names = "sclk_fimd", "fimd";
644 compatible = "samsung,exynos-adc-v1";
645 reg = <0x12D10000 0x100>, <0x10040718 0x4>;
646 interrupts = <0 106 0>;
647 clocks = <&clock 303>;
649 #io-channel-cells = <1>;