arch/arm/boot/dts/exynos5250.dtsi

   1 /*
   2  * SAMSUNG EXYNOS5250 SoC device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
   8  * EXYNOS5250 based board files can include this file and provide
   9  * values for board specfic bindings.
  10  *
  11  * Note: This file does not include device nodes for all the controllers in
  12  * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
  13  * additional nodes can be added to this file.
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17  * published by the Free Software Foundation.
  18 */
  19
  20 #include "exynos5.dtsi"
  21 #include "exynos5250-pinctrl.dtsi"
  22
  23 #include <dt-bindings/clk/exynos-audss-clk.h>
  24
  25 / {
  26         compatible = "samsung,exynos5250";
  27
  28         aliases {
  29                 spi0 = &spi_0;
  30                 spi1 = &spi_1;
  31                 spi2 = &spi_2;
  32                 gsc0 = &gsc_0;
  33                 gsc1 = &gsc_1;
  34                 gsc2 = &gsc_2;
  35                 gsc3 = &gsc_3;
  36                 mshc0 = &dwmmc_0;
  37                 mshc1 = &dwmmc_1;
  38                 mshc2 = &dwmmc_2;
  39                 mshc3 = &dwmmc_3;
  40                 i2c0 = &i2c_0;
  41                 i2c1 = &i2c_1;
  42                 i2c2 = &i2c_2;
  43                 i2c3 = &i2c_3;
  44                 i2c4 = &i2c_4;
  45                 i2c5 = &i2c_5;
  46                 i2c6 = &i2c_6;
  47                 i2c7 = &i2c_7;
  48                 i2c8 = &i2c_8;
  49                 pinctrl0 = &pinctrl_0;
  50                 pinctrl1 = &pinctrl_1;
  51                 pinctrl2 = &pinctrl_2;
  52                 pinctrl3 = &pinctrl_3;
  53         };
  54
  55         cpus {
  56                 #address-cells = <1>;
  57                 #size-cells = <0>;
  58
  59                 cpu@0 {
  60                         device_type = "cpu";
  61                         compatible = "arm,cortex-a15";
  62                         reg = <0>;
  63                 };
  64                 cpu@1 {
  65                         device_type = "cpu";
  66                         compatible = "arm,cortex-a15";
  67                         reg = <1>;
  68                 };
  69         };
  70
  71         pd_gsc: gsc-power-domain@10044000 {
  72                 compatible = "samsung,exynos4210-pd";
  73                 reg = <0x10044000 0x20>;
  74         };
  75
  76         pd_mfc: mfc-power-domain@10044040 {
  77                 compatible = "samsung,exynos4210-pd";
  78                 reg = <0x10044040 0x20>;
  79         };
  80
  81         clock: clock-controller@10010000 {
  82                 compatible = "samsung,exynos5250-clock";
  83                 reg = <0x10010000 0x30000>;
  84                 #clock-cells = <1>;
  85         };
  86
  87         clock_audss: audss-clock-controller@3810000 {
  88                 compatible = "samsung,exynos5250-audss-clock";
  89                 reg = <0x03810000 0x0C>;
  90                 #clock-cells = <1>;
  91         };
  92
  93         timer {
  94                 compatible = "arm,armv7-timer";
  95                 interrupts = <1 13 0xf08>,
  96                              <1 14 0xf08>,
  97                              <1 11 0xf08>,
  98                              <1 10 0xf08>;
  99         };
 100
 101         mct@101C0000 {
 102                 compatible = "samsung,exynos4210-mct";
 103                 reg = <0x101C0000 0x800>;
 104                 interrupt-controller;
 105                 #interrups-cells = <2>;
 106                 interrupt-parent = <&mct_map>;
 107                 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
 108                              <4 0>, <5 0>;
 109                 clocks = <&clock 1>, <&clock 335>;
 110                 clock-names = "fin_pll", "mct";
 111
 112                 mct_map: mct-map {
 113                         #interrupt-cells = <2>;
 114                         #address-cells = <0>;
 115                         #size-cells = <0>;
 116                         interrupt-map = <0x0 0 &combiner 23 3>,
 117                                         <0x1 0 &combiner 23 4>,
 118                                         <0x2 0 &combiner 25 2>,
 119                                         <0x3 0 &combiner 25 3>,
 120                                         <0x4 0 &gic 0 120 0>,
 121                                         <0x5 0 &gic 0 121 0>;
 122                 };
 123         };
 124
 125         pmu {
 126                 compatible = "arm,cortex-a15-pmu";
 127                 interrupt-parent = <&combiner>;
 128                 interrupts = <1 2>, <22 4>;
 129         };
 130
 131         pinctrl_0: pinctrl@11400000 {
 132                 compatible = "samsung,exynos5250-pinctrl";
 133                 reg = <0x11400000 0x1000>;
 134                 interrupts = <0 46 0>;
 135
 136                 wakup_eint: wakeup-interrupt-controller {
 137                         compatible = "samsung,exynos4210-wakeup-eint";
 138                         interrupt-parent = <&gic>;
 139                         interrupts = <0 32 0>;
 140                 };
 141         };
 142
 143         pinctrl_1: pinctrl@13400000 {
 144                 compatible = "samsung,exynos5250-pinctrl";
 145                 reg = <0x13400000 0x1000>;
 146                 interrupts = <0 45 0>;
 147         };
 148
 149         pinctrl_2: pinctrl@10d10000 {
 150                 compatible = "samsung,exynos5250-pinctrl";
 151                 reg = <0x10d10000 0x1000>;
 152                 interrupts = <0 50 0>;
 153         };
 154
 155         pinctrl_3: pinctrl@03860000 {
 156                 compatible = "samsung,exynos5250-pinctrl";
 157                 reg = <0x03860000 0x1000>;
 158                 interrupts = <0 47 0>;
 159         };
 160
 161         watchdog {
 162                 clocks = <&clock 336>;
 163                 clock-names = "watchdog";
 164         };
 165
 166         g2d@10850000 {
 167                 compatible = "samsung,exynos5250-g2d";
 168                 reg = <0x10850000 0x1000>;
 169                 interrupts = <0 91 0>;
 170                 clocks = <&clock 345>;
 171                 clock-names = "fimg2d";
 172         };
 173
 174         codec@11000000 {
 175                 compatible = "samsung,mfc-v6";
 176                 reg = <0x11000000 0x10000>;
 177                 interrupts = <0 96 0>;
 178                 samsung,power-domain = <&pd_mfc>;
 179                 clocks = <&clock 266>;
 180                 clock-names = "mfc";
 181         };
 182
 183         rtc {
 184                 clocks = <&clock 337>;
 185                 clock-names = "rtc";
 186         };
 187
 188         tmu@10060000 {
 189                 compatible = "samsung,exynos5250-tmu";
 190                 reg = <0x10060000 0x100>;
 191                 interrupts = <0 65 0>;
 192                 clocks = <&clock 338>;
 193                 clock-names = "tmu_apbif";
 194         };
 195
 196         serial@12C00000 {
 197                 clocks = <&clock 289>, <&clock 146>;
 198                 clock-names = "uart", "clk_uart_baud0";
 199         };
 200
 201         serial@12C10000 {
 202                 clocks = <&clock 290>, <&clock 147>;
 203                 clock-names = "uart", "clk_uart_baud0";
 204         };
 205
 206         serial@12C20000 {
 207                 clocks = <&clock 291>, <&clock 148>;
 208                 clock-names = "uart", "clk_uart_baud0";
 209         };
 210
 211         serial@12C30000 {
 212                 clocks = <&clock 292>, <&clock 149>;
 213                 clock-names = "uart", "clk_uart_baud0";
 214         };
 215
 216         sata@122F0000 {
 217                 compatible = "samsung,exynos5-sata-ahci";
 218                 reg = <0x122F0000 0x1ff>;
 219                 interrupts = <0 115 0>;
 220                 clocks = <&clock 277>, <&clock 143>;
 221                 clock-names = "sata", "sclk_sata";
 222         };
 223
 224         sata-phy@12170000 {
 225                 compatible = "samsung,exynos5-sata-phy";
 226                 reg = <0x12170000 0x1ff>;
 227         };
 228
 229         i2c_0: i2c@12C60000 {
 230                 compatible = "samsung,s3c2440-i2c";
 231                 reg = <0x12C60000 0x100>;
 232                 interrupts = <0 56 0>;
 233                 #address-cells = <1>;
 234                 #size-cells = <0>;
 235                 clocks = <&clock 294>;
 236                 clock-names = "i2c";
 237                 pinctrl-names = "default";
 238                 pinctrl-0 = <&i2c0_bus>;
 239         };
 240
 241         i2c_1: i2c@12C70000 {
 242                 compatible = "samsung,s3c2440-i2c";
 243                 reg = <0x12C70000 0x100>;
 244                 interrupts = <0 57 0>;
 245                 #address-cells = <1>;
 246                 #size-cells = <0>;
 247                 clocks = <&clock 295>;
 248                 clock-names = "i2c";
 249                 pinctrl-names = "default";
 250                 pinctrl-0 = <&i2c1_bus>;
 251         };
 252
 253         i2c_2: i2c@12C80000 {
 254                 compatible = "samsung,s3c2440-i2c";
 255                 reg = <0x12C80000 0x100>;
 256                 interrupts = <0 58 0>;
 257                 #address-cells = <1>;
 258                 #size-cells = <0>;
 259                 clocks = <&clock 296>;
 260                 clock-names = "i2c";
 261                 pinctrl-names = "default";
 262                 pinctrl-0 = <&i2c2_bus>;
 263         };
 264
 265         i2c_3: i2c@12C90000 {
 266                 compatible = "samsung,s3c2440-i2c";
 267                 reg = <0x12C90000 0x100>;
 268                 interrupts = <0 59 0>;
 269                 #address-cells = <1>;
 270                 #size-cells = <0>;
 271                 clocks = <&clock 297>;
 272                 clock-names = "i2c";
 273                 pinctrl-names = "default";
 274                 pinctrl-0 = <&i2c3_bus>;
 275         };
 276
 277         i2c_4: i2c@12CA0000 {
 278                 compatible = "samsung,s3c2440-i2c";
 279                 reg = <0x12CA0000 0x100>;
 280                 interrupts = <0 60 0>;
 281                 #address-cells = <1>;
 282                 #size-cells = <0>;
 283                 clocks = <&clock 298>;
 284                 clock-names = "i2c";
 285                 pinctrl-names = "default";
 286                 pinctrl-0 = <&i2c4_bus>;
 287         };
 288
 289         i2c_5: i2c@12CB0000 {
 290                 compatible = "samsung,s3c2440-i2c";
 291                 reg = <0x12CB0000 0x100>;
 292                 interrupts = <0 61 0>;
 293                 #address-cells = <1>;
 294                 #size-cells = <0>;
 295                 clocks = <&clock 299>;
 296                 clock-names = "i2c";
 297                 pinctrl-names = "default";
 298                 pinctrl-0 = <&i2c5_bus>;
 299         };
 300
 301         i2c_6: i2c@12CC0000 {
 302                 compatible = "samsung,s3c2440-i2c";
 303                 reg = <0x12CC0000 0x100>;
 304                 interrupts = <0 62 0>;
 305                 #address-cells = <1>;
 306                 #size-cells = <0>;
 307                 clocks = <&clock 300>;
 308                 clock-names = "i2c";
 309                 pinctrl-names = "default";
 310                 pinctrl-0 = <&i2c6_bus>;
 311         };
 312
 313         i2c_7: i2c@12CD0000 {
 314                 compatible = "samsung,s3c2440-i2c";
 315                 reg = <0x12CD0000 0x100>;
 316                 interrupts = <0 63 0>;
 317                 #address-cells = <1>;
 318                 #size-cells = <0>;
 319                 clocks = <&clock 301>;
 320                 clock-names = "i2c";
 321                 pinctrl-names = "default";
 322                 pinctrl-0 = <&i2c7_bus>;
 323         };
 324
 325         i2c_8: i2c@12CE0000 {
 326                 compatible = "samsung,s3c2440-hdmiphy-i2c";
 327                 reg = <0x12CE0000 0x1000>;
 328                 interrupts = <0 64 0>;
 329                 #address-cells = <1>;
 330                 #size-cells = <0>;
 331                 clocks = <&clock 302>;
 332                 clock-names = "i2c";
 333         };
 334
 335         i2c@121D0000 {
 336                 compatible = "samsung,exynos5-sata-phy-i2c";
 337                 reg = <0x121D0000 0x100>;
 338                 #address-cells = <1>;
 339                 #size-cells = <0>;
 340                 clocks = <&clock 288>;
 341                 clock-names = "i2c";
 342         };
 343
 344         spi_0: spi@12d20000 {
 345                 compatible = "samsung,exynos4210-spi";
 346                 reg = <0x12d20000 0x100>;
 347                 interrupts = <0 66 0>;
 348                 dmas = <&pdma0 5
 349                         &pdma0 4>;
 350                 dma-names = "tx", "rx";
 351                 #address-cells = <1>;
 352                 #size-cells = <0>;
 353                 clocks = <&clock 304>, <&clock 154>;
 354                 clock-names = "spi", "spi_busclk0";
 355                 pinctrl-names = "default";
 356                 pinctrl-0 = <&spi0_bus>;
 357         };
 358
 359         spi_1: spi@12d30000 {
 360                 compatible = "samsung,exynos4210-spi";
 361                 reg = <0x12d30000 0x100>;
 362                 interrupts = <0 67 0>;
 363                 dmas = <&pdma1 5
 364                         &pdma1 4>;
 365                 dma-names = "tx", "rx";
 366                 #address-cells = <1>;
 367                 #size-cells = <0>;
 368                 clocks = <&clock 305>, <&clock 155>;
 369                 clock-names = "spi", "spi_busclk0";
 370                 pinctrl-names = "default";
 371                 pinctrl-0 = <&spi1_bus>;
 372         };
 373
 374         spi_2: spi@12d40000 {
 375                 compatible = "samsung,exynos4210-spi";
 376                 reg = <0x12d40000 0x100>;
 377                 interrupts = <0 68 0>;
 378                 dmas = <&pdma0 7
 379                         &pdma0 6>;
 380                 dma-names = "tx", "rx";
 381                 #address-cells = <1>;
 382                 #size-cells = <0>;
 383                 clocks = <&clock 306>, <&clock 156>;
 384                 clock-names = "spi", "spi_busclk0";
 385                 pinctrl-names = "default";
 386                 pinctrl-0 = <&spi2_bus>;
 387         };
 388
 389         dwmmc_0: dwmmc0@12200000 {
 390                 reg = <0x12200000 0x1000>;
 391                 clocks = <&clock 280>, <&clock 139>;
 392                 clock-names = "biu", "ciu";
 393         };
 394
 395         dwmmc_1: dwmmc1@12210000 {
 396                 reg = <0x12210000 0x1000>;
 397                 clocks = <&clock 281>, <&clock 140>;
 398                 clock-names = "biu", "ciu";
 399         };
 400
 401         dwmmc_2: dwmmc2@12220000 {
 402                 reg = <0x12220000 0x1000>;
 403                 clocks = <&clock 282>, <&clock 141>;
 404                 clock-names = "biu", "ciu";
 405         };
 406
 407         dwmmc_3: dwmmc3@12230000 {
 408                 compatible = "samsung,exynos5250-dw-mshc";
 409                 reg = <0x12230000 0x1000>;
 410                 interrupts = <0 78 0>;
 411                 #address-cells = <1>;
 412                 #size-cells = <0>;
 413                 clocks = <&clock 283>, <&clock 142>;
 414                 clock-names = "biu", "ciu";
 415         };
 416
 417         i2s0: i2s@03830000 {
 418                 compatible = "samsung,s5pv210-i2s";
 419                 reg = <0x03830000 0x100>;
 420                 dmas = <&pdma0 10
 421                         &pdma0 9
 422                         &pdma0 8>;
 423                 dma-names = "tx", "rx", "tx-sec";
 424                 clocks = <&clock_audss EXYNOS_I2S_BUS>,
 425                         <&clock_audss EXYNOS_I2S_BUS>,
 426                         <&clock_audss EXYNOS_SCLK_I2S>;
 427                 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
 428                 samsung,idma-addr = <0x03000000>;
 429                 pinctrl-names = "default";
 430                 pinctrl-0 = <&i2s0_bus>;
 431         };
 432
 433         i2s1: i2s@12D60000 {
 434                 compatible = "samsung,s3c6410-i2s";
 435                 reg = <0x12D60000 0x100>;
 436                 dmas = <&pdma1 12
 437                         &pdma1 11>;
 438                 dma-names = "tx", "rx";
 439                 clocks = <&clock 307>, <&clock 157>;
 440                 clock-names = "iis", "i2s_opclk0";
 441                 pinctrl-names = "default";
 442                 pinctrl-0 = <&i2s1_bus>;
 443         };
 444
 445         i2s2: i2s@12D70000 {
 446                 compatible = "samsung,s3c6410-i2s";
 447                 reg = <0x12D70000 0x100>;
 448                 dmas = <&pdma0 12
 449                         &pdma0 11>;
 450                 dma-names = "tx", "rx";
 451                 clocks = <&clock 308>, <&clock 158>;
 452                 clock-names = "iis", "i2s_opclk0";
 453                 pinctrl-names = "default";
 454                 pinctrl-0 = <&i2s2_bus>;
 455         };
 456
 457         usb@12000000 {
 458                 compatible = "samsung,exynos5250-dwusb3";
 459                 clocks = <&clock 286>;
 460                 clock-names = "usbdrd30";
 461                 #address-cells = <1>;
 462                 #size-cells = <1>;
 463                 ranges;
 464
 465                 dwc3 {
 466                         compatible = "synopsys,dwc3";
 467                         reg = <0x12000000 0x10000>;
 468                         interrupts = <0 72 0>;
 469                         usb-phy = <&usb2_phy &usb3_phy>;
 470                 };
 471         };
 472
 473         usb3_phy: usbphy@12100000 {
 474                 compatible = "samsung,exynos5250-usb3phy";
 475                 reg = <0x12100000 0x100>;
 476                 clocks = <&clock 1>, <&clock 286>;
 477                 clock-names = "ext_xtal", "usbdrd30";
 478                 #address-cells = <1>;
 479                 #size-cells = <1>;
 480                 ranges;
 481
 482                 usbphy-sys {
 483                         reg = <0x10040704 0x8>;
 484                 };
 485         };
 486
 487         usb@12110000 {
 488                 compatible = "samsung,exynos4210-ehci";
 489                 reg = <0x12110000 0x100>;
 490                 interrupts = <0 71 0>;
 491
 492                 clocks = <&clock 285>;
 493                 clock-names = "usbhost";
 494         };
 495
 496         usb@12120000 {
 497                 compatible = "samsung,exynos4210-ohci";
 498                 reg = <0x12120000 0x100>;
 499                 interrupts = <0 71 0>;
 500
 501                 clocks = <&clock 285>;
 502                 clock-names = "usbhost";
 503         };
 504
 505         usb2_phy: usbphy@12130000 {
 506                 compatible = "samsung,exynos5250-usb2phy";
 507                 reg = <0x12130000 0x100>;
 508                 clocks = <&clock 1>, <&clock 285>;
 509                 clock-names = "ext_xtal", "usbhost";
 510                 #address-cells = <1>;
 511                 #size-cells = <1>;
 512                 ranges;
 513
 514                 usbphy-sys {
 515                         reg = <0x10040704 0x8>,
 516                               <0x10050230 0x4>;
 517                 };
 518         };
 519
 520         amba {
 521                 #address-cells = <1>;
 522                 #size-cells = <1>;
 523                 compatible = "arm,amba-bus";
 524                 interrupt-parent = <&gic>;
 525                 ranges;
 526
 527                 pdma0: pdma@121A0000 {
 528                         compatible = "arm,pl330", "arm,primecell";
 529                         reg = <0x121A0000 0x1000>;
 530                         interrupts = <0 34 0>;
 531                         clocks = <&clock 275>;
 532                         clock-names = "apb_pclk";
 533                         #dma-cells = <1>;
 534                         #dma-channels = <8>;
 535                         #dma-requests = <32>;
 536                 };
 537
 538                 pdma1: pdma@121B0000 {
 539                         compatible = "arm,pl330", "arm,primecell";
 540                         reg = <0x121B0000 0x1000>;
 541                         interrupts = <0 35 0>;
 542                         clocks = <&clock 276>;
 543                         clock-names = "apb_pclk";
 544                         #dma-cells = <1>;
 545                         #dma-channels = <8>;
 546                         #dma-requests = <32>;
 547                 };
 548
 549                 mdma0: mdma@10800000 {
 550                         compatible = "arm,pl330", "arm,primecell";
 551                         reg = <0x10800000 0x1000>;
 552                         interrupts = <0 33 0>;
 553                         clocks = <&clock 271>;
 554                         clock-names = "apb_pclk";
 555                         #dma-cells = <1>;
 556                         #dma-channels = <8>;
 557                         #dma-requests = <1>;
 558                 };
 559
 560                 mdma1: mdma@11C10000 {
 561                         compatible = "arm,pl330", "arm,primecell";
 562                         reg = <0x11C10000 0x1000>;
 563                         interrupts = <0 124 0>;
 564                         clocks = <&clock 271>;
 565                         clock-names = "apb_pclk";
 566                         #dma-cells = <1>;
 567                         #dma-channels = <8>;
 568                         #dma-requests = <1>;
 569                 };
 570         };
 571
 572         gsc_0:  gsc@13e00000 {
 573                 compatible = "samsung,exynos5-gsc";
 574                 reg = <0x13e00000 0x1000>;
 575                 interrupts = <0 85 0>;
 576                 samsung,power-domain = <&pd_gsc>;
 577                 clocks = <&clock 256>;
 578                 clock-names = "gscl";
 579         };
 580
 581         gsc_1:  gsc@13e10000 {
 582                 compatible = "samsung,exynos5-gsc";
 583                 reg = <0x13e10000 0x1000>;
 584                 interrupts = <0 86 0>;
 585                 samsung,power-domain = <&pd_gsc>;
 586                 clocks = <&clock 257>;
 587                 clock-names = "gscl";
 588         };
 589
 590         gsc_2:  gsc@13e20000 {
 591                 compatible = "samsung,exynos5-gsc";
 592                 reg = <0x13e20000 0x1000>;
 593                 interrupts = <0 87 0>;
 594                 samsung,power-domain = <&pd_gsc>;
 595                 clocks = <&clock 258>;
 596                 clock-names = "gscl";
 597         };
 598
 599         gsc_3:  gsc@13e30000 {
 600                 compatible = "samsung,exynos5-gsc";
 601                 reg = <0x13e30000 0x1000>;
 602                 interrupts = <0 88 0>;
 603                 samsung,power-domain = <&pd_gsc>;
 604                 clocks = <&clock 259>;
 605                 clock-names = "gscl";
 606         };
 607
 608         hdmi {
 609                 compatible = "samsung,exynos4212-hdmi";
 610                 reg = <0x14530000 0x70000>;
 611                 interrupts = <0 95 0>;
 612                 clocks = <&clock 333>, <&clock 136>, <&clock 137>,
 613                                 <&clock 333>, <&clock 333>;
 614                 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
 615                                 "sclk_hdmiphy", "hdmiphy";
 616         };
 617
 618         mixer {
 619                 compatible = "samsung,exynos5250-mixer";
 620                 reg = <0x14450000 0x10000>;
 621                 interrupts = <0 94 0>;
 622         };
 623
 624         dp_phy: video-phy@10040720 {
 625                 compatible = "samsung,exynos5250-dp-video-phy";
 626                 reg = <0x10040720 4>;
 627                 #phy-cells = <0>;
 628         };
 629
 630         dp-controller@145B0000 {
 631                 clocks = <&clock 342>;
 632                 clock-names = "dp";
 633                 phys = <&dp_phy>;
 634                 phy-names = "dp";
 635         };
 636
 637         fimd@14400000 {
 638                 clocks = <&clock 133>, <&clock 339>;
 639                 clock-names = "sclk_fimd", "fimd";
 640         };
 641 };