2 * SAMSUNG EXYNOS5250 SoC device tree source
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
7 * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
8 * EXYNOS5250 based board files can include this file and provide
9 * values for board specfic bindings.
11 * Note: This file does not include device nodes for all the controllers in
12 * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
13 * additional nodes can be added to this file.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
20 #include "exynos5.dtsi"
21 #include "exynos5250-pinctrl.dtsi"
23 #include <dt-bindings/clk/exynos-audss-clk.h>
26 compatible = "samsung,exynos5250";
49 pinctrl0 = &pinctrl_0;
50 pinctrl1 = &pinctrl_1;
51 pinctrl2 = &pinctrl_2;
52 pinctrl3 = &pinctrl_3;
61 compatible = "arm,cortex-a15";
66 compatible = "arm,cortex-a15";
71 pd_gsc: gsc-power-domain@0x10044000 {
72 compatible = "samsung,exynos4210-pd";
73 reg = <0x10044000 0x20>;
76 pd_mfc: mfc-power-domain@0x10044040 {
77 compatible = "samsung,exynos4210-pd";
78 reg = <0x10044040 0x20>;
81 clock: clock-controller@0x10010000 {
82 compatible = "samsung,exynos5250-clock";
83 reg = <0x10010000 0x30000>;
87 clock_audss: audss-clock-controller@3810000 {
88 compatible = "samsung,exynos5250-audss-clock";
89 reg = <0x03810000 0x0C>;
94 compatible = "arm,armv7-timer";
95 interrupts = <1 13 0xf08>,
102 compatible = "samsung,exynos4210-mct";
103 reg = <0x101C0000 0x800>;
104 interrupt-controller;
105 #interrups-cells = <2>;
106 interrupt-parent = <&mct_map>;
107 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
109 clocks = <&clock 1>, <&clock 335>;
110 clock-names = "fin_pll", "mct";
113 #interrupt-cells = <2>;
114 #address-cells = <0>;
116 interrupt-map = <0x0 0 &combiner 23 3>,
117 <0x1 0 &combiner 23 4>,
118 <0x2 0 &combiner 25 2>,
119 <0x3 0 &combiner 25 3>,
120 <0x4 0 &gic 0 120 0>,
121 <0x5 0 &gic 0 121 0>;
126 compatible = "arm,cortex-a15-pmu";
127 interrupt-parent = <&combiner>;
128 interrupts = <1 2>, <22 4>;
131 pinctrl_0: pinctrl@11400000 {
132 compatible = "samsung,exynos5250-pinctrl";
133 reg = <0x11400000 0x1000>;
134 interrupts = <0 46 0>;
136 wakup_eint: wakeup-interrupt-controller {
137 compatible = "samsung,exynos4210-wakeup-eint";
138 interrupt-parent = <&gic>;
139 interrupts = <0 32 0>;
143 pinctrl_1: pinctrl@13400000 {
144 compatible = "samsung,exynos5250-pinctrl";
145 reg = <0x13400000 0x1000>;
146 interrupts = <0 45 0>;
149 pinctrl_2: pinctrl@10d10000 {
150 compatible = "samsung,exynos5250-pinctrl";
151 reg = <0x10d10000 0x1000>;
152 interrupts = <0 50 0>;
155 pinctrl_3: pinctrl@03860000 {
156 compatible = "samsung,exynos5250-pinctrl";
157 reg = <0x03860000 0x1000>;
158 interrupts = <0 47 0>;
162 clocks = <&clock 336>;
163 clock-names = "watchdog";
167 compatible = "samsung,mfc-v6";
168 reg = <0x11000000 0x10000>;
169 interrupts = <0 96 0>;
170 samsung,power-domain = <&pd_mfc>;
174 clocks = <&clock 337>;
179 compatible = "samsung,exynos5250-tmu";
180 reg = <0x10060000 0x100>;
181 interrupts = <0 65 0>;
182 clocks = <&clock 338>;
183 clock-names = "tmu_apbif";
187 clocks = <&clock 289>, <&clock 146>;
188 clock-names = "uart", "clk_uart_baud0";
192 clocks = <&clock 290>, <&clock 147>;
193 clock-names = "uart", "clk_uart_baud0";
197 clocks = <&clock 291>, <&clock 148>;
198 clock-names = "uart", "clk_uart_baud0";
202 clocks = <&clock 292>, <&clock 149>;
203 clock-names = "uart", "clk_uart_baud0";
207 compatible = "samsung,exynos5-sata-ahci";
208 reg = <0x122F0000 0x1ff>;
209 interrupts = <0 115 0>;
210 clocks = <&clock 277>, <&clock 143>;
211 clock-names = "sata", "sclk_sata";
215 compatible = "samsung,exynos5-sata-phy";
216 reg = <0x12170000 0x1ff>;
219 i2c_0: i2c@12C60000 {
220 compatible = "samsung,s3c2440-i2c";
221 reg = <0x12C60000 0x100>;
222 interrupts = <0 56 0>;
223 #address-cells = <1>;
225 clocks = <&clock 294>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&i2c0_bus>;
231 i2c_1: i2c@12C70000 {
232 compatible = "samsung,s3c2440-i2c";
233 reg = <0x12C70000 0x100>;
234 interrupts = <0 57 0>;
235 #address-cells = <1>;
237 clocks = <&clock 295>;
239 pinctrl-names = "default";
240 pinctrl-0 = <&i2c1_bus>;
243 i2c_2: i2c@12C80000 {
244 compatible = "samsung,s3c2440-i2c";
245 reg = <0x12C80000 0x100>;
246 interrupts = <0 58 0>;
247 #address-cells = <1>;
249 clocks = <&clock 296>;
251 pinctrl-names = "default";
252 pinctrl-0 = <&i2c2_bus>;
255 i2c_3: i2c@12C90000 {
256 compatible = "samsung,s3c2440-i2c";
257 reg = <0x12C90000 0x100>;
258 interrupts = <0 59 0>;
259 #address-cells = <1>;
261 clocks = <&clock 297>;
263 pinctrl-names = "default";
264 pinctrl-0 = <&i2c3_bus>;
267 i2c_4: i2c@12CA0000 {
268 compatible = "samsung,s3c2440-i2c";
269 reg = <0x12CA0000 0x100>;
270 interrupts = <0 60 0>;
271 #address-cells = <1>;
273 clocks = <&clock 298>;
275 pinctrl-names = "default";
276 pinctrl-0 = <&i2c4_bus>;
279 i2c_5: i2c@12CB0000 {
280 compatible = "samsung,s3c2440-i2c";
281 reg = <0x12CB0000 0x100>;
282 interrupts = <0 61 0>;
283 #address-cells = <1>;
285 clocks = <&clock 299>;
287 pinctrl-names = "default";
288 pinctrl-0 = <&i2c5_bus>;
291 i2c_6: i2c@12CC0000 {
292 compatible = "samsung,s3c2440-i2c";
293 reg = <0x12CC0000 0x100>;
294 interrupts = <0 62 0>;
295 #address-cells = <1>;
297 clocks = <&clock 300>;
299 pinctrl-names = "default";
300 pinctrl-0 = <&i2c6_bus>;
303 i2c_7: i2c@12CD0000 {
304 compatible = "samsung,s3c2440-i2c";
305 reg = <0x12CD0000 0x100>;
306 interrupts = <0 63 0>;
307 #address-cells = <1>;
309 clocks = <&clock 301>;
311 pinctrl-names = "default";
312 pinctrl-0 = <&i2c7_bus>;
315 i2c_8: i2c@12CE0000 {
316 compatible = "samsung,s3c2440-hdmiphy-i2c";
317 reg = <0x12CE0000 0x1000>;
318 interrupts = <0 64 0>;
319 #address-cells = <1>;
321 clocks = <&clock 302>;
326 compatible = "samsung,exynos5-sata-phy-i2c";
327 reg = <0x121D0000 0x100>;
328 #address-cells = <1>;
330 clocks = <&clock 288>;
334 spi_0: spi@12d20000 {
335 compatible = "samsung,exynos4210-spi";
336 reg = <0x12d20000 0x100>;
337 interrupts = <0 66 0>;
340 dma-names = "tx", "rx";
341 #address-cells = <1>;
343 clocks = <&clock 304>, <&clock 154>;
344 clock-names = "spi", "spi_busclk0";
345 pinctrl-names = "default";
346 pinctrl-0 = <&spi0_bus>;
349 spi_1: spi@12d30000 {
350 compatible = "samsung,exynos4210-spi";
351 reg = <0x12d30000 0x100>;
352 interrupts = <0 67 0>;
355 dma-names = "tx", "rx";
356 #address-cells = <1>;
358 clocks = <&clock 305>, <&clock 155>;
359 clock-names = "spi", "spi_busclk0";
360 pinctrl-names = "default";
361 pinctrl-0 = <&spi1_bus>;
364 spi_2: spi@12d40000 {
365 compatible = "samsung,exynos4210-spi";
366 reg = <0x12d40000 0x100>;
367 interrupts = <0 68 0>;
370 dma-names = "tx", "rx";
371 #address-cells = <1>;
373 clocks = <&clock 306>, <&clock 156>;
374 clock-names = "spi", "spi_busclk0";
375 pinctrl-names = "default";
376 pinctrl-0 = <&spi2_bus>;
379 dwmmc_0: dwmmc0@12200000 {
380 reg = <0x12200000 0x1000>;
381 clocks = <&clock 280>, <&clock 139>;
382 clock-names = "biu", "ciu";
385 dwmmc_1: dwmmc1@12210000 {
386 reg = <0x12210000 0x1000>;
387 clocks = <&clock 281>, <&clock 140>;
388 clock-names = "biu", "ciu";
391 dwmmc_2: dwmmc2@12220000 {
392 reg = <0x12220000 0x1000>;
393 clocks = <&clock 282>, <&clock 141>;
394 clock-names = "biu", "ciu";
397 dwmmc_3: dwmmc3@12230000 {
398 compatible = "samsung,exynos5250-dw-mshc";
399 reg = <0x12230000 0x1000>;
400 interrupts = <0 78 0>;
401 #address-cells = <1>;
403 clocks = <&clock 283>, <&clock 142>;
404 clock-names = "biu", "ciu";
408 compatible = "samsung,i2s-v5";
409 reg = <0x03830000 0x100>;
413 dma-names = "tx", "rx", "tx-sec";
414 clocks = <&clock_audss EXYNOS_I2S_BUS>,
415 <&clock_audss EXYNOS_I2S_BUS>,
416 <&clock_audss EXYNOS_SCLK_I2S>;
417 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
418 samsung,supports-6ch;
419 samsung,supports-rstclr;
420 samsung,supports-secdai;
421 samsung,idma-addr = <0x03000000>;
422 pinctrl-names = "default";
423 pinctrl-0 = <&i2s0_bus>;
427 compatible = "samsung,i2s-v5";
428 reg = <0x12D60000 0x100>;
431 dma-names = "tx", "rx";
432 clocks = <&clock 307>, <&clock 157>;
433 clock-names = "iis", "i2s_opclk0";
434 pinctrl-names = "default";
435 pinctrl-0 = <&i2s1_bus>;
439 compatible = "samsung,i2s-v5";
440 reg = <0x12D70000 0x100>;
443 dma-names = "tx", "rx";
444 clocks = <&clock 308>, <&clock 158>;
445 clock-names = "iis", "i2s_opclk0";
446 pinctrl-names = "default";
447 pinctrl-0 = <&i2s2_bus>;
451 compatible = "samsung,exynos5250-dwusb3";
452 clocks = <&clock 286>;
453 clock-names = "usbdrd30";
454 #address-cells = <1>;
459 compatible = "synopsys,dwc3";
460 reg = <0x12000000 0x10000>;
461 interrupts = <0 72 0>;
462 usb-phy = <&usb2_phy &usb3_phy>;
466 usb3_phy: usbphy@12100000 {
467 compatible = "samsung,exynos5250-usb3phy";
468 reg = <0x12100000 0x100>;
469 clocks = <&clock 1>, <&clock 286>;
470 clock-names = "ext_xtal", "usbdrd30";
471 #address-cells = <1>;
476 reg = <0x10040704 0x8>;
481 compatible = "samsung,exynos4210-ehci";
482 reg = <0x12110000 0x100>;
483 interrupts = <0 71 0>;
485 clocks = <&clock 285>;
486 clock-names = "usbhost";
490 compatible = "samsung,exynos4210-ohci";
491 reg = <0x12120000 0x100>;
492 interrupts = <0 71 0>;
494 clocks = <&clock 285>;
495 clock-names = "usbhost";
498 usb2_phy: usbphy@12130000 {
499 compatible = "samsung,exynos5250-usb2phy";
500 reg = <0x12130000 0x100>;
501 clocks = <&clock 1>, <&clock 285>;
502 clock-names = "ext_xtal", "usbhost";
503 #address-cells = <1>;
508 reg = <0x10040704 0x8>,
514 #address-cells = <1>;
516 compatible = "arm,amba-bus";
517 interrupt-parent = <&gic>;
520 pdma0: pdma@121A0000 {
521 compatible = "arm,pl330", "arm,primecell";
522 reg = <0x121A0000 0x1000>;
523 interrupts = <0 34 0>;
524 clocks = <&clock 275>;
525 clock-names = "apb_pclk";
528 #dma-requests = <32>;
531 pdma1: pdma@121B0000 {
532 compatible = "arm,pl330", "arm,primecell";
533 reg = <0x121B0000 0x1000>;
534 interrupts = <0 35 0>;
535 clocks = <&clock 276>;
536 clock-names = "apb_pclk";
539 #dma-requests = <32>;
542 mdma0: mdma@10800000 {
543 compatible = "arm,pl330", "arm,primecell";
544 reg = <0x10800000 0x1000>;
545 interrupts = <0 33 0>;
546 clocks = <&clock 271>;
547 clock-names = "apb_pclk";
553 mdma1: mdma@11C10000 {
554 compatible = "arm,pl330", "arm,primecell";
555 reg = <0x11C10000 0x1000>;
556 interrupts = <0 124 0>;
557 clocks = <&clock 271>;
558 clock-names = "apb_pclk";
565 gsc_0: gsc@0x13e00000 {
566 compatible = "samsung,exynos5-gsc";
567 reg = <0x13e00000 0x1000>;
568 interrupts = <0 85 0>;
569 samsung,power-domain = <&pd_gsc>;
570 clocks = <&clock 256>;
571 clock-names = "gscl";
574 gsc_1: gsc@0x13e10000 {
575 compatible = "samsung,exynos5-gsc";
576 reg = <0x13e10000 0x1000>;
577 interrupts = <0 86 0>;
578 samsung,power-domain = <&pd_gsc>;
579 clocks = <&clock 257>;
580 clock-names = "gscl";
583 gsc_2: gsc@0x13e20000 {
584 compatible = "samsung,exynos5-gsc";
585 reg = <0x13e20000 0x1000>;
586 interrupts = <0 87 0>;
587 samsung,power-domain = <&pd_gsc>;
588 clocks = <&clock 258>;
589 clock-names = "gscl";
592 gsc_3: gsc@0x13e30000 {
593 compatible = "samsung,exynos5-gsc";
594 reg = <0x13e30000 0x1000>;
595 interrupts = <0 88 0>;
596 samsung,power-domain = <&pd_gsc>;
597 clocks = <&clock 259>;
598 clock-names = "gscl";
602 compatible = "samsung,exynos5-hdmi";
603 reg = <0x14530000 0x70000>;
604 interrupts = <0 95 0>;
605 clocks = <&clock 333>, <&clock 136>, <&clock 137>,
606 <&clock 333>, <&clock 333>;
607 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
608 "sclk_hdmiphy", "hdmiphy";
612 compatible = "samsung,exynos5-mixer";
613 reg = <0x14450000 0x10000>;
614 interrupts = <0 94 0>;
618 compatible = "samsung,exynos5-dp";
619 reg = <0x145b0000 0x1000>;
621 interrupt-parent = <&combiner>;
622 clocks = <&clock 342>;
624 #address-cells = <1>;
629 samsung,enable-mask = <1>;
634 compatible = "samsung,exynos5250-fimd";
635 interrupt-parent = <&combiner>;
636 reg = <0x14400000 0x40000>;
637 interrupt-names = "fifo", "vsync", "lcd_sys";
638 interrupts = <18 4>, <18 5>, <18 6>;
639 clocks = <&clock 133>, <&clock 339>;
640 clock-names = "sclk_fimd", "fimd";