2 * Copyright 2012 Freescale Semiconductor, Inc.
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 /include/ "skeleton.dtsi"
15 interrupt-parent = <&icoll>;
30 compatible = "arm,arm926ej-s";
36 compatible = "simple-bus";
39 reg = <0x80000000 0x80000>;
43 compatible = "simple-bus";
46 reg = <0x80000000 0x40000>;
49 icoll: interrupt-controller@80000000 {
50 compatible = "fsl,imx23-icoll", "fsl,icoll";
52 #interrupt-cells = <1>;
53 reg = <0x80000000 0x2000>;
56 dma_apbh: dma-apbh@80004000 {
57 compatible = "fsl,imx23-dma-apbh";
58 reg = <0x80004000 0x2000>;
59 interrupts = <0 14 20 0
61 interrupt-names = "empty", "ssp0", "ssp1", "empty",
62 "gpmi0", "gpmi1", "gpmi2", "gpmi3";
69 reg = <0x80008000 0x2000>;
74 compatible = "fsl,imx23-gpmi-nand";
77 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
78 reg-names = "gpmi-nand", "bch";
79 interrupts = <13>, <56>;
80 interrupt-names = "gpmi-dma", "bch";
82 clock-names = "gpmi_io";
85 fsl,gpmi-dma-channel = <4>;
90 reg = <0x80010000 0x2000>;
95 fsl,ssp-dma-channel = <1>;
100 reg = <0x80014000 0x2000>;
105 #address-cells = <1>;
107 compatible = "fsl,imx23-pinctrl", "simple-bus";
108 reg = <0x80018000 0x2000>;
111 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
115 interrupt-controller;
116 #interrupt-cells = <2>;
120 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
124 interrupt-controller;
125 #interrupt-cells = <2>;
129 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
133 interrupt-controller;
134 #interrupt-cells = <2>;
137 duart_pins_a: duart@0 {
140 0x11a2 /* MX23_PAD_PWM0__DUART_RX */
141 0x11b2 /* MX23_PAD_PWM1__DUART_TX */
143 fsl,drive-strength = <0>;
148 auart0_pins_a: auart0@0 {
151 0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
152 0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
153 0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
154 0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
156 fsl,drive-strength = <0>;
161 auart0_2pins_a: auart0-2pins@0 {
164 0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */
165 0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */
167 fsl,drive-strength = <0>;
172 gpmi_pins_a: gpmi-nand@0 {
175 0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */
176 0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */
177 0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */
178 0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */
179 0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */
180 0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */
181 0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */
182 0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */
183 0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */
184 0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */
185 0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */
186 0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */
187 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
188 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
189 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
190 0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */
191 0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */
193 fsl,drive-strength = <0>;
198 gpmi_pins_fixup: gpmi-pins-fixup {
200 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
201 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
202 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
204 fsl,drive-strength = <2>;
207 mmc0_4bit_pins_a: mmc0-4bit@0 {
210 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
211 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
212 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
213 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
214 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
215 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
217 fsl,drive-strength = <1>;
222 mmc0_8bit_pins_a: mmc0-8bit@0 {
225 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
226 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
227 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
228 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
229 0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
230 0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
231 0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
232 0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
233 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
234 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
235 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
237 fsl,drive-strength = <1>;
242 mmc0_pins_fixup: mmc0-pins-fixup {
244 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
245 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
250 pwm2_pins_a: pwm2@0 {
253 0x11c0 /* MX23_PAD_PWM2__PWM2 */
255 fsl,drive-strength = <0>;
260 lcdif_24bit_pins_a: lcdif-24bit@0 {
263 0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */
264 0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */
265 0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */
266 0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */
267 0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */
268 0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */
269 0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */
270 0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */
271 0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */
272 0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */
273 0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */
274 0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */
275 0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */
276 0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */
277 0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */
278 0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */
279 0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */
280 0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */
281 0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */
282 0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */
283 0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */
284 0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */
285 0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */
286 0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */
287 0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */
288 0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */
289 0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */
290 0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */
292 fsl,drive-strength = <0>;
297 spi2_pins_a: spi2@0 {
300 0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */
301 0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */
302 0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */
303 0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */
305 fsl,drive-strength = <1>;
312 compatible = "fsl,imx23-digctl";
313 reg = <0x8001c000 2000>;
318 reg = <0x80020000 0x2000>;
322 dma_apbx: dma-apbx@80024000 {
323 compatible = "fsl,imx23-dma-apbx";
324 reg = <0x80024000 0x2000>;
325 interrupts = <7 5 9 26
329 interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
330 "saif0", "empty", "auart0-rx", "auart0-tx",
331 "auart1-rx", "auart1-tx", "saif1", "empty",
332 "empty", "empty", "empty", "empty";
339 reg = <0x80028000 0x2000>;
344 reg = <0x8002a000 0x2000>;
349 compatible = "fsl,ocotp";
350 reg = <0x8002c000 0x2000>;
355 reg = <0x8002e000 0x2000>;
360 compatible = "fsl,imx23-lcdif";
361 reg = <0x80030000 2000>;
362 interrupts = <46 45>;
368 reg = <0x80034000 0x2000>;
371 dmas = <&dma_apbh 2>;
373 fsl,ssp-dma-channel = <2>;
378 reg = <0x80038000 0x2000>;
384 compatible = "simple-bus";
385 #address-cells = <1>;
387 reg = <0x80040000 0x40000>;
390 clks: clkctrl@80040000 {
391 compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
392 reg = <0x80040000 0x2000>;
396 saif0: saif@80042000 {
397 reg = <0x80042000 0x2000>;
398 dmas = <&dma_apbx 4>;
404 reg = <0x80044000 0x2000>;
408 saif1: saif@80046000 {
409 reg = <0x80046000 0x2000>;
410 dmas = <&dma_apbx 10>;
416 reg = <0x80048000 0x2000>;
417 dmas = <&dma_apbx 1>;
423 reg = <0x8004c000 0x2000>;
424 dmas = <&dma_apbx 0>;
430 compatible = "fsl,imx23-lradc";
431 reg = <0x80050000 0x2000>;
432 interrupts = <36 37 38 39 40 41 42 43 44>;
437 reg = <0x80054000 2000>;
438 dmas = <&dma_apbx 2>;
444 reg = <0x80058000 0x2000>;
445 dmas = <&dma_apbx 3>;
451 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
452 reg = <0x8005c000 0x2000>;
457 compatible = "fsl,imx23-pwm";
458 reg = <0x80064000 0x2000>;
461 fsl,pwm-number = <5>;
466 compatible = "fsl,imx23-timrot", "fsl,timrot";
467 reg = <0x80068000 0x2000>;
468 interrupts = <28 29 30 31>;
472 auart0: serial@8006c000 {
473 compatible = "fsl,imx23-auart";
474 reg = <0x8006c000 0x2000>;
475 interrupts = <24 25 23>;
477 dmas = <&dma_apbx 6>, <&dma_apbx 7>;
478 dma-names = "rx", "tx";
482 auart1: serial@8006e000 {
483 compatible = "fsl,imx23-auart";
484 reg = <0x8006e000 0x2000>;
485 interrupts = <59 60 58>;
487 dmas = <&dma_apbx 8>, <&dma_apbx 9>;
488 dma-names = "rx", "tx";
492 duart: serial@80070000 {
493 compatible = "arm,pl011", "arm,primecell";
494 reg = <0x80070000 0x2000>;
496 clocks = <&clks 32>, <&clks 16>;
497 clock-names = "uart", "apb_pclk";
501 usbphy0: usbphy@8007c000 {
502 compatible = "fsl,imx23-usbphy";
503 reg = <0x8007c000 0x2000>;
511 compatible = "simple-bus";
512 #address-cells = <1>;
514 reg = <0x80080000 0x80000>;
518 compatible = "fsl,imx23-usb", "fsl,imx27-usb";
519 reg = <0x80080000 0x40000>;
521 fsl,usbphy = <&usbphy0>;